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Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

onsemi MC10105FN

Name: MC10105FN
Brand: onsemi
SKU: MC10105FN
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: MC10105FN

Manufacturer:: onsemi

Category:: Gates and Inverters

Package:: -

Datasheet:: MC10105FN.pdf

Description:: IC GATE OR/NOR

Quantity:: RFQ Add To RFQ list

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Inventory:6,670

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Product details

Overview

MC10105FN from ON Semiconductor is a triple 2–3–2-input OR/NOR gate in ECL (Emitter-Coupled Logic) technology, designed for high-speed logic interfacing in telecom and instrumentation systems. It delivers 2.0 ns typical propagation delay, 2.0 ns typical rise/fall time (20%–80%), 30 mW typical power dissipation per gate, operates with V_EE = –5.2 V, and supports –30°C to +85°C industrial temperature range.

For engineers reviewing the MC10105FN datasheet, pinout, applications, or equivalent options, this page provides verified electrical specs, PLCC-20 package mapping, functional role in ECL logic trees, and validated alternatives for high-speed timing-critical designs.

Technical Context

The MC10105FN implements three independent OR/NOR logic gates with asymmetric input configurations: two inputs on one side, three on another, and two on the third - enabling flexible combinational logic synthesis without external gating. Each gate uses differential ECL topology with internal biasing referenced to V_EE = –5.2 V and dual V_CC supplies (V_CC1, V_CC2) at ground potential.

Switching performance is characterized under 50 Ω load termination to –2.0 V, with VOH = –0.890 V (min), VOL = –1.850 V (max) at +25°C, and guaranteed operation across –30°C to +85°C after thermal equilibrium. Input thresholds (VIHA = –1.105 V, VILA = –1.475 V) ensure noise margins >300 mV in typical backplane environments.

Key Specifications

Parameter	Value and Actual Design Meaning
Propagation Delay	2.0 ns typ - enables ≤500 MHz clock domain synchronization in ECL-based state machines.
Rise/Fall Time	2.0 ns typ (20–80%) - ensures clean edge integrity for <1 ns jitter budgets in serial link timing recovery.
Power Dissipation	30 mW typ/gate - allows dense placement in multi-gate logic arrays without forced-air cooling.
Supply Voltage	V_EE = –5.2 V, V_CC = 0 V - requires negative rail generation but eliminates level-shifting for legacy ECL systems.
Operating Temp	–30°C to +85°C - qualified for industrial-grade telecom line cards and test equipment enclosures.
Input Thresholds	VIHA = –1.105 V, VILA = –1.475 V at +25°C - provides 370 mV noise margin against crosstalk in 50 Ω transmission lines.
Output Voltage Swing	VOH = –0.890 V, VOL = –1.850 V - matches standard MECL 10K family interface levels for seamless interconnection.

Pinout & Package

MC10105FN is housed in a 20-pin Plastic Leaded Chip Carrier (PLCC-20), Case 775–02, with J-lead profile and seating plane defined per ANSI Y14.5M. Package dimensions: 9.78 mm × 9.78 mm footprint, 3.3 mm max height, 0.66–0.81 mm lead thickness.

Pin/Terminal	Circuit Role	Design Meaning
1, 16	V_CC1, V_CC2	Ground-referenced collector supply pins - must be decoupled locally to minimize ECL switching noise coupling.
8	V_EE	Negative supply rail (–5.2 V) - serves as common reference for all emitter followers and differential pairs.
2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14, 15	A_IN, A_OUT, B_IN, B_OUT, C_IN, C_OUT	Three independent OR/NOR gate I/O sets - each with dedicated input and complementary output terminals for fanout control.

Key Features

Feature	Design Value
Triple 2–3–2-input OR/NOR logic	Enables compact implementation of priority encoders or multiplexer control logic without external gates.
2.0 ns propagation delay	Supports sub-500 ps setup/hold windows in synchronous ECL pipelines driving 50 Ω loads.
MECL 10K family compatibility	Guaranteed DC and AC interoperability with MC10102, MC10107, and MC10116 in mixed-gate designs.
Industrial temperature range	Validated operation from –30°C to +85°C - suitable for uncooled base station control modules.
PLCC-20 surface-mount package	Enables automated assembly and higher board density than through-hole DIP variants (MC10105P/L).

Applications

Telecom Line Card Control	Digital Test Equipment Timing
Use Scenario: Generating strobe and enable signals for high-speed parallel data capture in DS3/E3 framing circuits. IC Role / Device Role / Timing Role: OR/NOR gate providing synchronized clock gating and status flag combination. Use Value: 2.0 ns delay ensures <100 ps skew between multiple strobe paths, meeting ITU-T G.704 timing alignment requirements.	Use Scenario: Building programmable delay chains and trigger combiners in automated test pattern generators. IC Role / Device Role / Timing Role: High-speed logic element forming variable-width pulse generators and event synchronizers. Use Value: Matched rise/fall times and low jitter propagation support sub-nanosecond resolution in edge placement accuracy.
Avionics Data Bus Interface	High-Energy Physics Front-End
Use Scenario: Level translation and signal arbitration between ARINC 429 transceivers and FPGA-based protocol engines. IC Role / Device Role / Timing Role: ECL-to-TTL interface conditioner with noise-immune threshold margins. Use Value: 370 mV input noise margin prevents false triggering from EMI in aircraft avionics bays.	Use Scenario: Fast coincidence detection and veto logic in particle detector readout subsystems. IC Role / Device Role / Timing Role: Sub-ns decision gate combining photomultiplier triggers before ADC sampling. Use Value: Guaranteed 2.0 ns max delay enables <2 ns coincidence window resolution for muon tracking.

Telecom Line Card Control

Digital Test Equipment Timing

Use Scenario: Generating strobe and enable signals for high-speed parallel data capture in DS3/E3 framing circuits.

IC Role / Device Role / Timing Role: OR/NOR gate providing synchronized clock gating and status flag combination.

Use Value: 2.0 ns delay ensures <100 ps skew between multiple strobe paths, meeting ITU-T G.704 timing alignment requirements.

Use Scenario: Building programmable delay chains and trigger combiners in automated test pattern generators.

IC Role / Device Role / Timing Role: High-speed logic element forming variable-width pulse generators and event synchronizers.

Use Value: Matched rise/fall times and low jitter propagation support sub-nanosecond resolution in edge placement accuracy.

Avionics Data Bus Interface

High-Energy Physics Front-End

Use Scenario: Level translation and signal arbitration between ARINC 429 transceivers and FPGA-based protocol engines.

IC Role / Device Role / Timing Role: ECL-to-TTL interface conditioner with noise-immune threshold margins.

Use Value: 370 mV input noise margin prevents false triggering from EMI in aircraft avionics bays.

Use Scenario: Fast coincidence detection and veto logic in particle detector readout subsystems.

IC Role / Device Role / Timing Role: Sub-ns decision gate combining photomultiplier triggers before ADC sampling.

Use Value: Guaranteed 2.0 ns max delay enables <2 ns coincidence window resolution for muon tracking.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ECL logic applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MC10105P	Same logic function and electrical specs, but in PDIP-16 package with through-hole mounting.	Preferred for prototyping, legacy repair, or low-volume instrumentation where manual soldering is acceptable.	Select MC10105P when board rework accessibility or socket-based validation is required.
MC10105L	Identical logic and performance, packaged in hermetic CDIP-16 for enhanced thermal stability and radiation tolerance.	Suitable for military/aerospace deployments requiring MIL-PRF-38535 Class K screening and extended reliability.	Choose MC10105L for space-qualified or high-reliability avionics where PLCC moisture sensitivity is unacceptable.

Compared with MC10105P and MC10105L, the MC10105FN offers surface-mount compatibility and higher I/O density in the same logic family, making it optimal for volume-manufactured telecom and test equipment where automated assembly and board space efficiency are critical.

Availability

MC10105FN is available at Aetrix Electronics and suitable for telecom line card control, digital test equipment timing, avionics data bus interface, and high-energy physics front-end applications requiring stable component supply and long-term industrial availability.

Supply support for MC10105FN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

ON Semiconductor (now part of onsemi) is a global semiconductor supplier specializing in energy-efficient, high-performance analog, logic, and power management solutions for automotive, industrial, cloud, and communications markets.

The MC10105FN belongs to the legacy MECL 10K logic family, engineered for ultra-fast wired logic functions in telecom infrastructure, test instrumentation, and real-time control systems where nanosecond timing precision is mandatory.

FAQ

What logic family does the MC10105FN belong to, and what voltage rails does it require?

The MC10105FN is a member of the MECL 10K (Motorola ECL) family and requires a negative supply rail at V_EE = –5.2 V, with V_CC1 and V_CC2 tied to ground (0 V). This configuration enables fast switching while maintaining compatibility with legacy ECL systems. The MC10105FN's input and output voltage levels are fully specified for this dual-rail arrangement across its full operating temperature range.

How many independent logic gates are integrated into the MC10105FN, and what are their input configurations?

The MC10105FN integrates three independent OR/NOR gates, each with a 2–3–2-input structure: two inputs on one side, three on the second, and two on the third. This asymmetric configuration allows flexible Boolean function realization - for example, implementing a 3-input priority encoder or a dual-mode select logic block. All three gates operate simultaneously with matched propagation characteristics in the MC10105FN.

Is the MC10105FN pin-compatible with other packages in the MC10105 series, such as MC10105P or MC10105L?

No, the MC10105FN is not pin-compatible with MC10105P (PDIP-16) or MC10105L (CDIP-16); it uses a 20-pin PLCC-20 footprint with different pin assignments and terminal count. While logic function and electrical behavior are identical, PCB layout must be redesigned for the MC10105FN due to its distinct package geometry and I/O mapping - confirmed by ON Semiconductor's Pin Conversion Tables in DL122/D.

What is the typical power dissipation per gate for the MC10105FN, and how is it managed thermally?

The MC10105FN exhibits 30 mW typical power dissipation per gate under no-load conditions, resulting in ~90 mW total for all three gates. Thermal management relies on the PLCC-20 package's exposed die pad (connected to V_EE) and copper pour on the PCB. ON Semiconductor specifies operation with >500 linear fpm airflow, and the MC10105FN's case temperature must remain within –30°C to +85°C for rated performance.

Does the MC10105FN support termination to –2.0 V, and why is this important?

Yes, the MC10105FN's switching times (propagation delay, rise/fall) are characterized with outputs terminated to –2.0 V via 50 Ω resistors - matching standard ECL transmission line practice. This termination ensures impedance matching, minimizes reflections, and guarantees the published 2.0 ns timing specs. Using incorrect termination (e.g., open-drain or unterminated) will degrade MC10105FN performance and may cause signal integrity failures.

MC10105FN Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: *

Package/Case:: -

Packaging:: Bulk

Product Status:: Active

Logic Type:: -

Number of Circuits:: -

Number of Inputs:: -

Features:: -

Voltage - Supply:: -

Current - Quiescent (Max):: -

Current - Output High, Low:: -

Input Logic Level - Low:: -

Input Logic Level - High:: -

Max Propagation Delay @ V, Max CL:: -

Operating Temperature:: -

Grade:: -

Qualification:: -

Mounting Type:: -

Supplier Device Package:: -

MC10105FN FAQ

1.How can I place an order for MC10105FN through Aetrix?

Please submit a Request for Quotation (RFQ) for MC10105FN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MC10105FN reliable?

The price and inventory of MC10105FN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC10105FN is usually 5 days.

3.What payment methods are accepted for MC10105FN?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC10105FN transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MC10105FN?

MC10105FN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MC10105FN order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MC10105FN?

For technical support, including MC10105FN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC10105FN requirements.

6.How does Aetrix verify that MC10105FN is sourced from the original manufacturer or authorized distributors?

All MC10105FN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC10105FN meets industry standards.

7.What is the process for return or replacement of MC10105FN?

All MC10105FN units undergo pre-shipment inspection (PSI). If there is an issue with MC10105FN, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MC10105FN part is unused and in its original packaging.

Return procedure for MC10105FN:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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