onsemi MC10107FN

Overview

MC10107FN from ON Semiconductor is a triple 2-input ECL XOR/XNOR gate IC operating at –5.2 V VEE supply, delivering 2.8 ns typical propagation delay, 2.5 ns typical rise/fall time (20%–80%), and 40 mW typical power dissipation per gate - used in high-speed digital logic comparators, parity generators, and differential signal routing in telecom line cards.

For engineers reviewing the MC10107FN datasheet, pinout, applications, or equivalent options, this page provides verified functional identity, PLCC-20 package mapping, confirmed ECL-level voltage thresholds (VOH = –0.890 V, VOL = –1.850 V), and validated alternatives for high-speed logic replacement scenarios.

Technical Context

The MC10107FN implements three independent ECL-compatible XOR/XNOR gates using MECL 10,000 series bipolar transistor architecture, with dual VCC pins (VCC1, VCC2) referenced to –5.2 V VEE. Each gate supports complementary outputs (e.g., AOUT and AOUT) and accepts differential input pairs (AIN/AIN, BIN/BIN, CIN/CIN).

It operates across –30°C to +85°C with guaranteed VOHA = –0.980 V and VOLA = –1.630 V at +25°C, and requires 50 Ω termination to –2.0 V for specified switching performance. Input current remains below ±425 µA over temperature, enabling direct interfacing with other MECL 10K devices without level-shifting.

Key Specifications

Pinout & Package

MC10107FN is housed in a 20-lead Plastic Leaded Chip Carrier (PLCC-20), case 775–02, with J-lead profile and seating plane defined per ANSI Y14.5M. Dimensions: 9.78 mm × 9.78 mm body, 0.66–0.81 mm height, 0.350–0.356 mm lead span (R/U).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ECL logic applications.

Compared with MC10107FN, MC100EL07DTG offers faster timing but demands stricter supply regulation and layout controls, while SN65EL10 eliminates negative rails at the cost of fundamental incompatibility with existing ECL-terminated systems.

Availability

MC10107FN is available at Aetrix Electronics and suitable for telecom line card upgrades, legacy test equipment refurbishment, and industrial high-speed control systems requiring stable component supply with long-lifecycle assurance.

Supply support for MC10107FN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

ON Semiconductor (now part of onsemi) is a global semiconductor supplier specializing in energy-efficient and high-reliability silicon solutions for automotive, industrial, and communications markets.

The MC10107FN belongs to the legacy MECL 10,000 logic family, designed specifically for ultra-fast wired communication infrastructure requiring deterministic sub-3 ns gate delays and robust noise immunity in noisy RF-adjacent environments.

FAQ

What logic family does the MC10107FN belong to, and what supply voltages does it require?

The MC10107FN is a MECL 10,000 series ECL device requiring a –5.2 V VEE supply referenced to ground, with VCC1 and VCC2 tied to ground or +V depending on bias configuration. It does not operate from positive-only supplies. The MC10107FN uses bipolar transistors optimized for speed over power efficiency, making it distinct from TTL or CMOS logic families.

Does the MC10107FN support both XOR and XNOR functions simultaneously on each gate?

Yes - each of the three gates in the MC10107FN provides both XOR and XNOR outputs as complementary signals (e.g., AOUT and AOUT). This dual-output capability is hardwired and does not require external inversion. The MC10107FN achieves this through internal emitter-coupled pair topology, enabling zero-delay access to both logic states.

What is the correct termination scheme for MC10107FN outputs to achieve specified 2.8 ns propagation delay?

To meet the 2.8 ns typical propagation delay and 2.5 ns rise/fall times, MC10107FN outputs must be terminated with a 50 Ω resistor to –2.0 V. This matches the test condition documented in the datasheet and ensures proper waveform fidelity. Using alternative terminations (e.g., open-drain or unterminated) will degrade timing and increase jitter in the MC10107FN output signals.

Is the MC10107FN pin-compatible with the PDIP-16 or CDIP-16 versions of the same device?

No - the MC10107FN uses a PLCC-20 package with different pin count, layout, and terminal assignments than the PDIP-16 (MC10107P) or CDIP-16 (MC10107L) variants. While functionally identical, the MC10107FN requires a dedicated PLCC-20 footprint and cannot be mounted on DIP sockets or adapters without mechanical adaptation.

What is the maximum operating temperature range for the MC10107FN, and how do key parameters shift across that range?

The MC10107FN is rated for operation from –30°C to +85°C. Over this range, VOH degrades from –0.890 V to –0.700 V, VOL shifts from –1.850 V to –1.615 V, and propagation delay increases from 2.8 ns (typ) at +25°C to 4.0 ns (max) at extremes. These shifts are fully characterized in the datasheet's Electrical Characteristics tables for the MC10107FN.