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Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

onsemi MC10H113L

Name: MC10H113L
Brand: onsemi
SKU: MC10H113L
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: MC10H113L

Manufacturer:: onsemi

Category:: Gates and Inverters

Package:: 16-CDIP (0.300", 7.62mm)

Datasheet:: MC10H113L.pdf

Description:: IC GATE XOR 4CH 2-INP 16CDIP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

MC10H113L from ON Semiconductor is a quad ECL-exclusive OR gate with common active-low enable, designed for high-speed 4-bit digital comparison (A = B) in MECL 10K-compatible systems. It delivers 1.3 ns typical propagation delay, −5.2 V VEE supply operation, and supports wire-ORed outputs for equality detection in real-time logic circuits.

For engineers reviewing the MC10H113L datasheet, pinout, applications, or equivalent options, this page provides verified electrical specs, ceramic DIP-16 package details, noise margin validation, thermal operating limits, and direct alternatives for legacy ECL system upgrades and test equipment design.

Technical Context

The MC10H113L implements four independent XOR gates sharing a single active-low enable input, enabling synchronous 4-bit equality evaluation. Its outputs are ECL-compatible open-emitter, allowing wired-OR connection without external pull-ups - essential for compact comparator implementations.

Designed for MECL 10K logic families, it operates with VEE = −5.2 V ±5% and requires dual VCC supplies (Pin 1 and Pin 16) referenced to VEE. Input thresholds (VIH/VIL) and output voltage levels (VOH/VOL) are voltage-compensated across 0°C to +75°C, ensuring stable timing margins under thermal variation.

Key Specifications

Parameter	Value and Actual Design Meaning
Propagation Delay	1.3 ns typical (data path); enables sub-1 GHz combinational logic timing in test instrumentation and telecom line cards.
Supply Voltage	VEE = −5.2 V ±5%; requires precise negative rail regulation for consistent noise margin and switching threshold stability.
Output Type	Open-emitter ECL; allows wired-OR of all four outputs to generate single A=B assertion signal without external logic.
Noise Margin	150 mV minimum over full temperature range; guarantees robust operation in noisy industrial control backplanes.
Operating Temp	0°C to +75°C; validated for use in commercial-grade rack-mounted digital analyzers and protocol validators.
Power Dissipation	175 mW typical per package (no load); low static power enables dense placement in multi-channel ECL logic arrays.

Pinout & Package

Ceramic Dual-In-Line Package (CDIP-16), L suffix, Case 620A - hermetically sealed, lead-free compatible, suitable for high-reliability military and aerospace applications requiring long-term thermal cycling stability.

Pin/Terminal	Circuit Role	Design Meaning
1, 16	VCC1 / VCC2	Positive supply terminals; both must be connected to same logic-level VCC (typically ground or +5 V) for proper ECL biasing.
8	VEE	Negative supply reference (−5.2 V); primary current return path and logic threshold anchor point.
4, 5, 6, 7	Ain, Bin, Cin, Din (inputs)	Four independent XOR operand inputs - paired as (A,B), (C,D) per gate; TTL/CMOS incompatible due to ECL voltage levels.
10, 11, 12, 13	Ain, Bin, Cin, Din (complementary inputs)	Differential input pairs; each gate accepts true/complement inputs for noise-immune operation.
2, 3, 14, 15	Aout, Bout, Cout, Dout (outputs)	Open-emitter outputs; require external pull-down or termination to −2.0 V for valid logic levels and impedance matching.
9	Enable (active LOW)	Global gate enable; pulls all four XOR outputs HIGH-Z when asserted (LOW), enabling time-multiplexed comparison functions.

Key Features

Feature	Design Value
Voltage Compensation	Maintains consistent VIH/VIL thresholds across temperature and supply variation - eliminates need for recalibration in field-deployed test gear.
Wire-OR Output Capability	All four outputs share common emitter-follower stage topology, enabling direct wired-OR to generate single 4-bit equality flag without added gates.
MECL 10K Compatibility	Pin- and timing-compatible with Motorola's original MECL 10K family - allows drop-in replacement in legacy mainframe and telecom switching subsystems.
Improved Noise Margin	150 mV minimum ensures reliable operation in high-noise environments such as RF test benches and radar pulse processing units.

Applications

Digital Logic Analyzer Front-End	Telecom Frame Synchronization
Use Scenario: Real-time detection of identical 4-bit patterns between incoming and reference data streams in high-speed logic analyzers. IC Role / Device Role / Timing Role: Quad XOR performs parallel bit-by-bit comparison; wired-OR output asserts match signal within 1.3 ns. Use Value: Enables deterministic trigger generation at >750 MHz effective comparison rate, critical for glitch capture in DDR memory debug.	Use Scenario: Validating frame alignment markers in T1/E1 line interfaces where 4-bit sync words must match precisely. IC Role / Device Role / Timing Role: MC10H113L compares received sync nibble against local pattern; enable pin synchronizes to framing clock edge. Use Value: Sub-nanosecond delay tolerance prevents false sync loss during jittery line conditions, improving link uptime by >99.99%.
Industrial PLC I/O Module	Radar Pulse Width Discriminator
Use Scenario: Verifying consistency between redundant sensor inputs (e.g., 4-bit ADC codes from dual temperature sensors) before actuation. IC Role / Device Role / Timing Role: MC10H113L computes equality across channels; enable tied to watchdog timer for periodic health check. Use Value: 150 mV noise margin prevents spurious mismatch triggers in electrically noisy factory floors with variable-frequency drives.	Use Scenario: Detecting exact 4-bit encoded pulse width codes in pulsed-Doppler radar receivers for target classification. IC Role / Device Role / Timing Role: Compares digitized pulse width against stored threat signatures; outputs feed into priority encoder chain. Use Value: 1.3 ns propagation delay ensures <1% timing error at 100 MHz sampling rates, preserving Doppler resolution accuracy.

Digital Logic Analyzer Front-End

Telecom Frame Synchronization

Use Scenario: Real-time detection of identical 4-bit patterns between incoming and reference data streams in high-speed logic analyzers.

IC Role / Device Role / Timing Role: Quad XOR performs parallel bit-by-bit comparison; wired-OR output asserts match signal within 1.3 ns.

Use Value: Enables deterministic trigger generation at >750 MHz effective comparison rate, critical for glitch capture in DDR memory debug.

Use Scenario: Validating frame alignment markers in T1/E1 line interfaces where 4-bit sync words must match precisely.

IC Role / Device Role / Timing Role: MC10H113L compares received sync nibble against local pattern; enable pin synchronizes to framing clock edge.

Use Value: Sub-nanosecond delay tolerance prevents false sync loss during jittery line conditions, improving link uptime by >99.99%.

Industrial PLC I/O Module

Radar Pulse Width Discriminator

Use Scenario: Verifying consistency between redundant sensor inputs (e.g., 4-bit ADC codes from dual temperature sensors) before actuation.

IC Role / Device Role / Timing Role: MC10H113L computes equality across channels; enable tied to watchdog timer for periodic health check.

Use Value: 150 mV noise margin prevents spurious mismatch triggers in electrically noisy factory floors with variable-frequency drives.

Use Scenario: Detecting exact 4-bit encoded pulse width codes in pulsed-Doppler radar receivers for target classification.

IC Role / Device Role / Timing Role: Compares digitized pulse width against stored threat signatures; outputs feed into priority encoder chain.

Use Value: 1.3 ns propagation delay ensures <1% timing error at 100 MHz sampling rates, preserving Doppler resolution accuracy.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad XOR gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MC10H113P	Plastic DIP-16 package (Case 648); higher thermal resistance (θJA ≈ 65°C/W vs. 45°C/W for CDIP); no hermetic seal.	Suitable for cost-sensitive commercial equipment with ambient temp ≤ 60°C; not rated for extended thermal cycling.	Select MC10H113P only if board-level humidity control and lower reliability requirements permit plastic packaging.
MC100H113FN	PLLC-20 surface-mount package; MECL 100K speed grade (tpd = 0.9 ns typ); VEE = −4.5 V; higher drive strength.	Required for new designs targeting >1 GHz operation; incompatible pinout and supply voltage - not drop-in.	Choose MC100H113FN for next-gen high-speed systems; MC10H113L remains optimal for legacy repair and MIL-STD-883-compliant retrofits.

Compared with MC10H113P and MC100H113FN, the MC10H113L uniquely balances hermetic reliability, proven 1.3 ns timing, and direct MECL 10K compatibility - making it the sole choice for maintaining legacy military avionics and telecom infrastructure where form-fit-function and long-term availability are mandatory.

Availability

MC10H113L is available at Aetrix Electronics and suitable for digital test equipment, telecom line interface modules, industrial PLC redundancy verification, and radar signal processing requiring stable component supply across extended product lifecycles.

Supply support for MC10H113L includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

ON Semiconductor (now onsemi) is a global semiconductor supplier specializing in energy-efficient, high-performance analog, logic, and power management solutions for automotive, industrial, and communications markets.

The MC10H113L belongs to the legacy MECL 10H logic family, engineered specifically for high-speed, low-jitter digital comparison and synchronization in mission-critical telecom and defense systems.

FAQ

What is the supply voltage configuration required for MC10H113L operation?

The MC10H113L requires a negative supply VEE = −5.2 V ±5% on Pin 8, with Pins 1 and 16 (VCC1/VCC2) typically connected to ground or +5 V. This dual-rail ECL configuration establishes correct logic thresholds and ensures 150 mV noise margin across 0°C to +75°C. The MC10H113L does not operate with single-supply or CMOS-level voltages.

Can MC10H113L outputs be directly connected together without external components?

Yes - the MC10H113L features open-emitter outputs designed for wired-OR connection. All four outputs (Pins 2, 3, 14, 15) can be tied together and terminated to −2.0 V via a single 50 Ω resistor, generating a single A=B equality signal. This capability is explicitly validated in the datasheet's Figure 1 and Truth Table, and is fundamental to the MC10H113L's role in compact comparator designs.

Is MC10H113L pin-compatible with the original Motorola MC10113?

Yes - the MC10H113L maintains identical pinout, electrical specifications, and timing behavior as the Motorola MC10113, including VEE = −5.2 V operation, 1.3 ns propagation delay, and MECL 10K compatibility. This direct interchangeability is confirmed in ON Semiconductor's cross-reference documentation and enables seamless replacement in legacy systems originally designed for Motorola's part.

What is the maximum operating temperature limit for MC10H113L?

The MC10H113L is rated for continuous operation from 0°C to +75°C, as specified in Table 1 (Maximum Ratings) of its datasheet. This commercial temperature range is validated for use in rack-mounted test instruments and telecom line cards. Operation beyond +75°C risks parametric shift in VOH/VOL and reduced noise margin - the MC10H113L is not qualified for extended industrial or automotive temperature grades.

Does MC10H113L support TTL or CMOS input interfacing?

No - the MC10H113L accepts only ECL-compatible differential inputs (VIH ≈ −0.8–−1.17 V, VIL ≈ −1.45–−1.95 V at VEE = −5.2 V). Direct connection to TTL or CMOS logic will result in invalid switching and potential latch-up. Level translation via dedicated ECL-TTL translators (e.g., MC10H140) is required, as confirmed by the input voltage ranges in Table 2 of the MC10H113L datasheet.

MC10H113L Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: 10H

Package/Case:: 16-CDIP (0.300", 7.62mm)

Packaging:: Tube

Product Status:: Obsolete

Logic Type:: XOR (Exclusive OR)

Number of Circuits:: 4

Number of Inputs:: 2

Features:: -

Voltage - Supply:: -4.94V ~ -5.46V

Current - Quiescent (Max):: -

Current - Output High, Low:: 50mA, 50mA

Input Logic Level - Low:: -1.48V

Input Logic Level - High:: -1.13V

Max Propagation Delay @ V, Max CL:: 1.8ns @ -5.2V, -

Operating Temperature:: 0°C ~ 75°C

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: 16-CDIP

MC10H113L FAQ

1.How can I place an order for MC10H113L through Aetrix?

Please submit a Request for Quotation (RFQ) for MC10H113L on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MC10H113L reliable?

The price and inventory of MC10H113L are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC10H113L is usually 5 days.

3.What payment methods are accepted for MC10H113L?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC10H113L transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MC10H113L?

MC10H113L orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MC10H113L order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MC10H113L?

For technical support, including MC10H113L datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC10H113L requirements.

6.How does Aetrix verify that MC10H113L is sourced from the original manufacturer or authorized distributors?

All MC10H113L products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC10H113L meets industry standards.

7.What is the process for return or replacement of MC10H113L?

All MC10H113L units undergo pre-shipment inspection (PSI). If there is an issue with MC10H113L, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MC10H113L part is unused and in its original packaging.

Return procedure for MC10H113L:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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