onsemi MC33762DM-2828R2
- Part No.:
- MC33762DM-2828R2
- Manufacturer:
- onsemi
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
MC33762DM-2828R2.pdf
- Description:
- IC REG LINEAR 2.8V/2.8V MICRO8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MC33762DM-2828R2 from onsemi is a dual ultra-low-noise, low-dropout linear regulator delivering two independent 2.8 V outputs with 80 mA nominal current per channel, 40 µVRMS noise (100 Hz–100 kHz), and 40 µs typical startup time - designed for RF-sensitive portable systems such as TDMA phones and VCO power rails.
For engineers reviewing the MC33762DM-2828R2 datasheet, pinout, applications, or equivalent options, key selection criteria include dual-channel isolation, absence of external bypass capacitor requirement, fast transient recovery in bursting loads, ±1.5% output accuracy at 25°C, and Micro8 package compatibility with space-constrained PCB layouts.
Technical Context
The MC33762DM-2828R2 integrates two fully independent LDO regulators on separate dice to maximize channel-to-channel isolation-critical for noise-sensitive RF subsystems. Each regulator features dedicated enable inputs (En1/En2), ground pins (GND1/GND2), and input/output paths (VCC1/VOUT1 and VCC2/VOUT2), eliminating shared impedance coupling.
Its proprietary load transient improvement architecture actively detects output voltage overshoot decay and forces rapid return to steady state-reducing undershoot during burst-mode load reactivation. Combined with 70 dB ripple rejection at 1 kHz and −75 dB static line regulation, it maintains stable 2.8 V outputs under dynamic supply and load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 2.8 V per channel, ±1.5% tolerance at 25°C - ensures precise biasing for analog/RF circuits without post-regulation trimming. |
| Noise Performance | 150 nV/√Hz @ 100 Hz; 40 µVRMS (100 Hz–100 kHz) - enables direct powering of VCOs and RF front-ends without external filtering. |
| Dropout Voltage | 90 mV @ 30 mA, 160 mV @ 80 mA - supports operation from low-input sources like single-cell Li-ion (3.0 V min) with margin. |
| Startup Time | 40 µs typical from OFF to ON - eliminates need for external bypass capacitor while maintaining ultra-low noise. |
| Enable Threshold | 900 mV logic high to activate; 150 mV logic low to disable - compatible with 1.0 V platform I/O and low-voltage microcontrollers. |
| Ripple Rejection | 70 dB @ 1 kHz - suppresses switching noise from upstream DC/DC converters feeding the LDO input. |
| Operating Temperature | −40°C to +85°C ambient - validated for industrial and automotive cabin applications without derating. |
Pinout & Package
MC33762DM-2828R2 is housed in an 8-pin Micro8 (Case 846A) surface-mount package with exposed thermal pad, optimized for compact layout and thermal dissipation in portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Dedicated ground return for Regulator 1 - prevents noise coupling into Regulator 2 via shared ground path. |
| 2 | En1 | Active-high enable for Regulator 1 - 900 mV threshold allows control from 1.0 V logic; 150 mV disables regulator. |
| 3 | GND2 | Dedicated ground return for Regulator 2 - ensures full channel isolation for dual-rail RF systems. |
| 4 | En2 | Active-high enable for Regulator 2 - independent control enables staggered power-up or selective channel shutdown. |
| 5 | VCC2 | Input supply pin for Regulator 2 - requires local 1.0 µF decoupling; accepts 2.8 V + 1.0 V ≤ VIN ≤ 12 V. |
| 6 | VOUT2 | 2.8 V regulated output for Regulator 2 - stable with 1.0 µF ceramic or tantalum output capacitor; no ESR constraints. |
| 7 | VCC1 | Input supply pin for Regulator 1 - electrically isolated from VCC2; same input voltage range and decoupling requirement. |
| 8 | VOUT1 | 2.8 V regulated output for Regulator 1 - identical performance and stability requirements as VOUT2. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent LDOs on separate dice | Eliminates crosstalk between channels - critical for simultaneous RF transmit/receive or mixed-signal SoC power domains. |
| No external bypass capacitor required | Reduces BOM count and board area while achieving 40 µVRMS noise - simplifies layout and improves reliability. |
| Load transient improvement architecture | Minimizes undershoot during rapid load reactivation in TDMA burst systems - prevents VCO frequency pulling or PLL unlock. |
| Thermal shutdown protection | Activates at 125°C junction temperature - safeguards against overcurrent or poor heatsinking in sealed enclosures. |
| 1.5% output accuracy at 25°C | Meets tight voltage tolerance requirements for precision analog circuitry without calibration or feedback adjustment. |
Applications
| TDMA Mobile Handsets | VCO Power Supply |
|---|---|
Use Scenario: Powering RF transceiver ICs in time-division multiple access (TDMA) cellular handsets where transmit/receive bursts occur every 4.615 ms. IC Role / Device Role / Timing Role: Dual-channel LDO supplying clean 2.8 V to PA driver and VCO circuits with independent enable control for burst synchronization. Use Value: Load transient improvement prevents >100 mV undershoot during TX burst activation - avoiding VCO frequency drift and adjacent channel interference. |
Use Scenario: Providing ultra-low-noise bias to voltage-controlled oscillators in wireless infrastructure and test equipment. IC Role / Device Role / Timing Role: Low-noise 2.8 V regulator replacing discrete filtered supplies - directly connected to VCO core with minimal trace length. Use Value: 150 nV/√Hz spectral density and 40 µVRMS integrated noise reduce phase noise by up to 6 dBc/Hz at 10 kHz offset versus standard LDOs. |
| Battery-Powered IoT Sensors | Dual-Rail Mixed-Signal SoCs |
Use Scenario: Power management for ultra-low-power sensor nodes using coin-cell or single Li-ion batteries with intermittent wake-up cycles. IC Role / Device Role / Timing Role: Dual-output LDO enabling independent power gating of MCU core (VOUT1) and analog front-end (VOUT2) via En1/En2 signals. Use Value: 0.1 µA OFF-state quiescent current extends battery life; 40 µs startup allows sub-millisecond wake-up from deep sleep. |
Use Scenario: Supplying isolated analog and digital rails for mixed-signal SoCs in medical wearables and audio codecs. IC Role / Device Role / Timing Role: Two 2.8 V LDOs powering ADC reference and DSP core - physically separated dice prevent digital switching noise from corrupting analog measurements. Use Value: >60 dB channel-to-channel isolation measured at 1 MHz - reduces measurement error in 16-bit ADCs by >2 LSB. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A2028PDQNR | Single-channel 2.8 V LDO; 12 µVRMS noise (10 Hz–100 kHz); 0.7 µA quiescent current; no enable pin in base variant. | Lacks dual output and independent enable control; requires two devices for same functionality; lower noise but no burst-mode optimization. | Select when ultra-low IQ dominates design priority and dual-channel integration is not required. |
| NCP1117ST28T3G | Single-channel 2.8 V LDO; 45 µVRMS noise (10 Hz–100 kHz); 8 mA quiescent current; fixed 2.8 V output; no enable pin. | No enable function or dual output; higher dropout (1.2 V typical); lacks load transient improvement; requires external bypass for lowest noise. | Choose only for cost-sensitive, non-burst, non-noise-critical applications where PCB area is not constrained. |
Compared with TPS7A2028PDQNR and NCP1117ST28T3G, the MC33762DM-2828R2 uniquely delivers dual 2.8 V outputs with burst-optimized transient response, no external bypass requirement, and true channel isolation - making it the only solution meeting TDMA handset and RF VCO power integrity requirements in a single Micro8 package.
Availability
MC33762DM-2828R2 is available at Aetrix Electronics and suitable for TDMA mobile handsets, RF VCO power supplies, and battery-powered IoT sensors requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for MC33762DM-2828R2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, and sensor solutions for automotive, industrial, and communications markets.
The MC33762DM-2828R2 belongs to onsemi's ultra-low-noise LDO family, engineered specifically for RF and portable applications where power integrity, fast transient response, and minimal board area are critical design constraints.
FAQ
What is the maximum input voltage rating for the MC33762DM-2828R2?
The MC33762DM-2828R2 supports a maximum input voltage of 12 V across both VCC1 and VCC2 pins, as specified in the Absolute Maximum Ratings table. Operation above this level risks permanent damage. For reliable 2.8 V output regulation, the recommended minimum input is VOUT + 1.0 V (i.e., ≥3.8 V), with dropout increasing linearly with load current.
Does the MC33762DM-2828R2 require an external bypass capacitor to achieve its specified noise performance?
No, the MC33762DM-2828R2 achieves its 40 µVRMS noise specification (100 Hz–100 kHz) without any external bypass capacitor - a key differentiator enabled by its proprietary internal bandgap and error amplifier design. This eliminates associated startup delay and PCB area, unlike conventional LDOs that mandate 10 nF–100 nF bypass caps.
How does the load transient improvement feature of the MC33762DM-2828R2 benefit TDMA applications?
The MC33762DM-2828R2's load transient improvement architecture detects output voltage overshoot decay and forces rapid return to regulation - reducing undershoot by up to 70% during burst-mode load reactivation. In TDMA systems, this prevents VCO frequency pulling and maintains EVM compliance during 4.615 ms transmit slots.
What is the thermal shutdown threshold and behavior of the MC33762DM-2828R2?
The MC33762DM-2828R2 activates thermal shutdown at a typical junction temperature of 125°C, disabling both regulators until die temperature falls below the hysteresis threshold (~15°C below trip point). This protects against catastrophic failure during sustained overload or inadequate heatsinking in enclosed environments.
Can the two outputs of the MC33762DM-2828R2 be used with different input voltages?
No - the MC33762DM-2828R2 requires the same input voltage applied to both VCC1 and VCC2 pins. Its internal architecture does not support split-input operation. However, each regulator operates independently with dedicated grounds (GND1/GND2) and enables (En1/En2), allowing asynchronous control and isolation despite shared input rail.
MC33762DM-2828R2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 12V
- Voltage - Output (Min/Fixed):
- 2.8V, 2.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 80mA, 0.25V @ 80mA
- Current - Output:
- 80mA, 80mA
- Current - Quiescent (Iq):
- 180 µA
- Current - Supply (Max):
- -
- PSRR:
- 70dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Antisaturation, Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
MC33762DM-2828R2 FAQ
1.How can I place an order for MC33762DM-2828R2 through Aetrix?
Please submit a Request for Quotation (RFQ) for MC33762DM-2828R2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC33762DM-2828R2 reliable?
The price and inventory of MC33762DM-2828R2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC33762DM-2828R2 is usually 5 days.
3.What payment methods are accepted for MC33762DM-2828R2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC33762DM-2828R2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC33762DM-2828R2?
MC33762DM-2828R2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC33762DM-2828R2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC33762DM-2828R2?
For technical support, including MC33762DM-2828R2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC33762DM-2828R2 requirements.
6.How does Aetrix verify that MC33762DM-2828R2 is sourced from the original manufacturer or authorized distributors?
All MC33762DM-2828R2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC33762DM-2828R2 meets industry standards.
7.What is the process for return or replacement of MC33762DM-2828R2?
All MC33762DM-2828R2 units undergo pre-shipment inspection (PSI). If there is an issue with MC33762DM-2828R2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC33762DM-2828R2 part is unused and in its original packaging.
Return procedure for MC33762DM-2828R2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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