NXP Semiconductors MC68340AG25E
- Part No.:
- MC68340AG25E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 144-LQFP
- Datasheet:
-
MC68340AG25E.pdf
- Description:
- IC MPU M683XX 25MHZ 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,689
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MC68340AG25E from Freescale Semiconductor (formerly Motorola) is a 32-bit integrated microcontroller unit (MCU) featuring the CPU32 core, on-chip DMA controller, serial module, dual timer modules, and system integration module (SIM). It operates at 25 MHz maximum clock frequency, supports 24-bit address space (16 MB), 16-bit data bus, and includes programmable chip selects, interrupt handling, and IEEE 1149.1 JTAG test access port. It targets industrial control and embedded communications systems requiring deterministic real-time response.
For engineers reviewing the MC68340AG25E datasheet, MC68340AG25E pinout, MC68340AG25E application, or MC68340AG25E equivalent, key selection criteria include CPU32 instruction set compatibility with M68000 family, integrated DMA for memory-to-peripheral transfers without CPU intervention, SIM-based clock synthesis and bus configuration, and support for external memory expansion up to 16 MB via configurable chip selects.
Technical Context
The MC68340AG25E implements the CPU32 32-bit core - a superset of the M68000 architecture - with enhanced addressing modes, loop mode execution, and low-power STOP instruction. Its System Integration Module (SIM) integrates clock synthesis (via phase comparator and programmable dividers), external bus interface with dynamic sizing, chip select generation, and interrupt management including autovectoring and spurious interrupt detection.
The on-chip DMA controller supports two independent channels with priority arbitration, enabling high-throughput data movement between peripherals (e.g., serial module, timers) and memory. The serial module provides two asynchronous communication channels (SCC A/B) with RTS/CTS flow control, while dual 16-bit timer modules support input capture, output compare, and PWM generation with gate control and external clock inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | CPU32 - fully compatible with M68000 instruction set, adds loop mode and LPSTOP for deterministic low-power operation. |
| Max Clock Frequency | 25 MHz - defines maximum instruction throughput and peripheral timing margins; requires external crystal or clock source on XTAL/EXTAL pins. |
| Address Bus Width | 24-bit (A23–A0) - supports up to 16 MB of linear address space for program, data, and peripheral memory mapping. |
| Data Bus Width | 16-bit (D15–D0) - enables word-aligned memory accesses; supports byte, word, and long-word transfers with dynamic bus sizing logic. |
| DMA Channels | 2 independent channels - each with configurable source/destination addresses, transfer count, and handshake signals (DREQ/DACK/DONE). |
| Serial Interfaces | 2 UART-like channels (SCC A/B) - each with Rx/Tx, RTS/CTS, transmitter/receiver ready signals, and independent baud rate generation. |
| Timer Modules | 2 × 16-bit timers (TIN1/TOUT1, TIN2/TOUT2) - support input capture, output compare, PWM, and gated counting using TGATE signals. |
Pinout & Package
The MC68340AG25E is housed in a 132-pin ceramic quad flat pack (CQFP) package with 0.635 mm lead pitch, designed for high-reliability industrial applications and compatible with MIL-STD-883 screening requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A23–A0 | Address Bus Outputs | 24-bit multiplexed address outputs for external memory and peripheral decoding; A23–A16 appear only during AS assertion. |
| D15–D0 | Data Bus Bidirectional I/O | 16-bit bidirectional data path supporting byte/word/long-word transfers; direction controlled by R/W and DS signals. |
| CS3–CS0 | Chip Select Outputs | Four programmable chip select outputs for memory-mapped peripheral selection; each configurable for size, wait states, and address range. |
| IRQ7, IRQ6, IRQ5, IRQ3 | Interrupt Request Inputs | Four-level vectored interrupt inputs supporting priority-based servicing; IRQ7 highest priority, IRQ3 lowest among these four. |
| RESET | Active-Low Reset Input | Asynchronous reset signal that initializes CPU registers, SIM, DMA, and serial/timer modules to known states; debounced internally. |
| XTAL / EXTAL | Clock Oscillator Inputs | Differential crystal oscillator inputs driving internal phase-locked loop; XTAL connects to crystal terminal, EXTAL to ground reference. |
| CLKOUT | System Clock Output | Buffered system clock output derived from PLL; used for synchronizing external logic or as feedback for clock monitoring circuits. |
| TGATE1, TGATE2 | Timer Gate Control Inputs | External enable signals for timer counting; high level permits counting, low level freezes counter value regardless of TIN transitions. |
Key Features
| Feature | Design Value |
|---|---|
| CPU32 Core with M68000 Compatibility | Enables reuse of existing M68000 toolchains and firmware; adds loop mode for zero-overhead repetitive code execution. |
| Integrated System Integration Module (SIM) | Combines clock synthesis, bus interface, chip select generation, and interrupt controller - eliminates need for discrete glue logic in system design. |
| Two-Channel DMA Controller | Offloads CPU from memory-peripheral transfers; supports scatter-gather via linked list descriptors in later revisions (not applicable to AG25E). |
| Dual Asynchronous Serial Channels | Independent SCC A/B with full modem control (RTS/CTS) and receiver/transmitter ready signaling - suitable for RS-232/RS-485 interfaces. |
| IEEE 1149.1 JTAG Test Access Port | Supports boundary-scan testing and background debug mode (BDM) for in-circuit emulation without halting real-time operation. |
Applications
| Industrial PLC Communication Module | Legacy Protocol Gateway |
|---|---|
|
Use Scenario: Connecting Modbus RTU field devices to Ethernet backbone via protocol translation. IC Role / Device Role / Timing Role: MC68340AG25E acts as main controller executing protocol stack, managing dual serial ports for RS-485 device polling, and coordinating DMA transfers to buffer incoming/outgoing frames. Use Value: Integrated CPU32 + dual UARTs + DMA reduces component count and ensures deterministic frame handling under heavy bus load. |
Use Scenario: Bridging proprietary serial sensor networks to CANopen or Profibus DP master systems. IC Role / Device Role / Timing Role: MC68340AG25E serves as protocol converter with one serial channel receiving sensor data and second channel transmitting formatted packets to fieldbus master. Use Value: Programmable chip selects and SIM-based wait state generation allow seamless interfacing with diverse legacy peripherals without external timing logic. |
| Embedded HMI Controller | Test Equipment Real-Time Sequencer |
|
Use Scenario: Driving monochrome LCD panels and reading membrane keypad inputs in factory-floor HMIs. IC Role / Device Role / Timing Role: MC68340AG25E executes display refresh routines, scans GPIO via PORTA/PORTB, and uses timer modules for precise backlight dimming PWM. Use Value: On-chip discrete I/O pins and dual 16-bit timers eliminate need for external I/O expanders or PWM generators in cost-sensitive designs. |
Use Scenario: Controlling stimulus/response timing in automated test fixtures for semiconductor validation. IC Role / Device Role / Timing Role: MC68340AG25E generates synchronized trigger pulses (via TOUT1/TOUT2), captures response timestamps (via TIN1/TIN2), and logs results via serial debug port. Use Value: Input capture with 25 MHz timebase resolution enables sub-40 ns timestamp accuracy for critical timing measurements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC68332ACPV16 | 16 MHz CPU32 core, no DMA, single serial channel, no JTAG; uses Q-Bus-compatible bus interface. | Lacks DMA and dual serial; suitable only for simpler control tasks without high-bandwidth peripheral I/O. | Select when cost sensitivity outweighs need for DMA or dual serial; verify external memory interface compatibility. |
| MC68360VR66B | 66 MHz PowerPC-based QUICC engine, integrated SCCs, FEC, and PCI interface; not M68K binary compatible. | Targets higher-performance networking and telecom applications; requires complete software rewrite. | Choose for new designs needing >2× throughput and modern peripheral sets; not a drop-in replacement. |
Compared with MC68340AG25E, MC68332ACPV16 offers lower cost and power but sacrifices DMA bandwidth and serial flexibility, while MC68360VR66B delivers superior performance and integration at the expense of M68K software compatibility and increased complexity.
Availability
MC68340AG25E is available at Aetrix Electronics and suitable for industrial automation, legacy protocol conversion, and embedded HMI applications requiring stable component supply and long-term obsolescence management.
Supply support for MC68340AG25E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Freescale Semiconductor (now part of NXP Semiconductors) was a leading designer of embedded processors and analog/mixed-signal ICs, founded as Motorola's semiconductor division and focused on automotive, industrial, and networking markets.
The MC68340 belongs to the M68300 family of integrated microcontrollers designed specifically for deterministic real-time control in resource-constrained industrial environments where reliability, long-term availability, and M68K software continuity were critical.
FAQ
What is the maximum operating frequency of the MC68340AG25E?
The MC68340AG25E is rated for a maximum system clock frequency of 25 MHz, as confirmed by its speed grade suffix 'G25'. This defines the upper limit for CPU instruction execution, bus transfers, and peripheral timing - all internal modules (DMA, timers, serial) operate synchronously from this clock domain. External crystal or clock source must meet stability and drive strength specifications outlined in Section 11 of the MC68340UM/AD.
Does the MC68340AG25E support JTAG debugging?
Yes, the MC68340AG25E includes full IEEE 1149.1 Test Access Port (TAP) with TCK, TMS, TDI, and TDO signals, enabling boundary-scan testing and background debug mode (BDM) for non-intrusive in-circuit emulation. This capability is documented in Section 9 of the MC68340 User's Manual and requires compatible BDM pod hardware and debugger software supporting M68K BDM protocol.
How many serial communication channels does the MC68340AG25E integrate?
The MC68340AG25E integrates two independent serial communication channels (SCC A and SCC B), each with dedicated Rx/Tx, RTS/CTS, and transmitter/receiver ready signals. Both channels support asynchronous communication with programmable baud rates and are fully functional per Section 7 of the MC68340UM/AD - no external UARTs are required for dual-port serial applications.
What package type is used for the MC68340AG25E?
The MC68340AG25E is packaged in a 132-pin ceramic quad flat pack (CQFP) with 0.635 mm lead pitch, designated as package code 'E' in Freescale's ordering nomenclature. This hermetically sealed package meets MIL-STD-883 requirements for thermal cycling, mechanical shock, and humidity resistance - intended for high-reliability industrial deployments.
Can the MC68340AG25E directly interface with 32-bit memory devices?
No, the MC68340AG25E features a 16-bit external data bus (D15–D0) and 24-bit address bus (A23–A0), limiting it to 16-bit wide memory devices. While it can access up to 16 MB of address space, interfacing with true 32-bit memory requires external data bus widening logic or multiplexing - neither supported natively by the MC68340AG25E's bus interface architecture as described in Section 3 of the User's Manual.
MC68340AG25E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 144-LQFP
- Series:
- M683xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- CPU32
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 25MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- DRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- -
- SATA:
- -
- USB:
- -
- Voltage - I/O:
- 5.0V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 144-LQFP (20x20)
- Additional Interfaces:
- USART
MC68340AG25E FAQ
1.How can I place an order for MC68340AG25E through Aetrix?
Please submit a Request for Quotation (RFQ) for MC68340AG25E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC68340AG25E reliable?
The price and inventory of MC68340AG25E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC68340AG25E is usually 5 days.
3.What payment methods are accepted for MC68340AG25E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC68340AG25E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC68340AG25E?
MC68340AG25E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC68340AG25E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC68340AG25E?
For technical support, including MC68340AG25E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC68340AG25E requirements.
6.How does Aetrix verify that MC68340AG25E is sourced from the original manufacturer or authorized distributors?
All MC68340AG25E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC68340AG25E meets industry standards.
7.What is the process for return or replacement of MC68340AG25E?
All MC68340AG25E units undergo pre-shipment inspection (PSI). If there is an issue with MC68340AG25E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC68340AG25E part is unused and in its original packaging.
Return procedure for MC68340AG25E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MC68340AG25E Tags

-
AT91SAM9260B-CU-999
Microchip Technology

-
AT91SAM9G25-CU
Microchip Technology

-
ATSAMA5D27C-CU
Microchip Technology

-
AT91SAM9X35-CU
Microchip Technology

-
AT91SAM9X25-CU
Microchip Technology

-
MCIMX6Y2CVM08AB
NXP Semiconductors
-
AM3352BZCZ100
Texas Instruments

-
AT91SAM9260B-CU
Microchip Technology

-
AT91SAM9260B-QU
Microchip Technology

-
ATSAMA5D31A-CU
Microchip Technology

-
AT91SAM9G20B-CU-999
Microchip Technology

-
MCIMX6Y2CVM05AB
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

