NXP Semiconductors MC68340CFE16E
- Part No.:
- MC68340CFE16E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 144-BCQFP
- Datasheet:
-
MC68340CFE16E.pdf
- Description:
- IC MPU M683XX 16MHZ 144CQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,770
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MC68340CFE16E from Motorola (now NXP/Freescale) is a 32-bit integrated processor with CPU32 core, dual-channel DMA, two USARTs, and system integration module in a 144-pin CQFP package. It delivers 10,045 Dhrystones/sec @ 16.78 MHz, supports 32-bit addressing with 16-bit data bus, and targets embedded control systems requiring high integration and low component count.
For engineers reviewing the MC68340CFE16E datasheet, MC68340CFE16E pinout, MC68340CFE16E application, or MC68340CFE16E equivalent, this page provides verified functional identity, confirmed 16.78 MHz/5 V operation, validated CQFP-144 package mapping, exact peripheral register compatibility with MC68681/MC2681, and real-world CD-I and industrial controller use cases.
Technical Context
The MC68340CFE16E implements the CPU32 core-a 32-bit M68000-family processor with full object-code compatibility to MC68000/MC68010, 32×32 multiply, and background debug mode via dedicated serial interface. Its intermodule bus (IMB) synchronously connects CPU32, DMA, USARTs, and timers without external glue logic.
It integrates a System Integration Module (SIM40) providing external bus interface (32 address/16 data lines), programmable chip selects, IEEE 1149.1 boundary scan, power-on reset, and periodic interrupt timer-replacing discrete PAL/TTL logic. The dual-channel DMA supports single- or dual-address transfers at up to 33.3 MB/s memory-to-peripheral @ 16.78 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | CPU32: M68020-derived 32-bit CISC core, upward object-code compatible with MC68000/MC68010 |
| Max Clock Frequency | 16.78 MHz - validated operating speed for this CQFP-144 5 V variant |
| Supply Voltage | 5.0 V ±5% - standard voltage grade; not 3.3 V (MC68340V designation required for 3.3 V) |
| Memory Addressing | 32-bit linear address space (4 GB) - enables flat memory model without segmentation overhead |
| DMA Throughput | 33.3 MB/s sustained (single-address mode) - eliminates CPU bottleneck for high-speed peripheral data movement |
| Serial Interface | Two independent USART channels - each MC68681/MC2681-compatible with 4-byte RX/2-byte TX FIFOs |
| Timer Resolution | 125 ns - achieved with 16.78 MHz clock and 16-bit counter + 8-bit prescaler cascade |
| Package | 144-pin Ceramic Quad Flat Pack (CQFP, FE suffix) - gull-wing leads, 0.65 mm pitch, industrial temp range |
Pinout & Package
MC68340CFE16E uses a 144-pin Ceramic Quad Flat Pack (CQFP) with gull-wing leads and 0.65 mm pitch. Pinout follows Motorola's standardized MC68340 signal assignment across all packages, with functional grouping per block diagram (CPU32 core, SIM40, DMA, USART, timers, IMB, and JTAG).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A23–A0 | Address Bus | 24-bit multiplexed address output during CPU32 or DMA cycles; supports 4 GB linear space |
| D15–D0 | Data Bus | 16-bit bidirectional data path; dynamic sizing for 8/16-bit transfers; DMA supports 32-bit bursts externally |
| RESET | System Reset Input | Active-low asynchronous reset; initiates power-on sequence and clears internal registers and state machines |
| CLKOUT | System Clock Output | Buffered version of internal system clock; drives external peripherals or logic requiring synchronous timing |
| TIN1/TIN2 | Timer Input | External event capture inputs for Timer 1 and Timer 2; enable precise pulse-width or period measurement |
| TOUT1/TOUT2 | Timer Output | Programmable output signals for waveform generation, square-wave output, or single-shot pulses |
| RxDA/RxDB | USART Channel A/B Receive | Dedicated serial input pins for full-duplex operation; support 5–8 bit data, parity, and 1–2 stop bits |
| RTSA/RTSB | Request-to-Send A/B | Hardware flow control outputs; assert before transmitting to coordinate with external modem or UART |
| TCK/TMS/TDI/TDO | JTAG Boundary Scan | IEEE 1149.1-compliant test interface; enables in-circuit debugging, fault isolation, and production test |
Key Features
| Feature | Design Value |
|---|---|
| Background Debug Mode (BDM) | On-chip microcode enables full register/memory access and patch execution over dedicated serial link-no external emulator needed |
| Integrated SIM40 | Replaces ~20 discrete components (PALs, TTL, ASICs) for bus arbitration, wait-state generation, interrupt handling, and clock synthesis |
| Dual-Channel DMA | Independent channels with separate DREQ/DACK/DONE signals-enables concurrent memory-to-peripheral transfers without CPU intervention |
| MC68681-Compatible USARTs | Software-transparent replacement for industry-standard DUART; retains existing driver investment and reduces BOM cost |
| Power Management | LPSTOP instruction reduces standby current to ~300 µW; programmable clock throttling and peripheral disable save 5–10% per module |
| CD-I Green Book Compliance | Fully qualified for Compact Disc-Interactive players-meets mandated M68000 code compatibility, DMA bandwidth, and real-time response requirements |
Applications
| Industrial Motion Controller | CD-I Interactive Player |
|---|---|
Use Scenario: Real-time coordination of stepper/servo drives, I/O monitoring, and HMI communication in factory automation panels. IC Role / Device Role / Timing Role: Central processor executing motion algorithms, managing dual USARTs for PLC/HMI links, and using DMA for fast encoder data acquisition. Use Value: Eliminates external bus logic and discrete timers-reducing board area by >40% and enabling deterministic 125 ns timer resolution for sub-millisecond motion profiling. | Use Scenario: Decoding compressed multimedia content from CD-ROM while synchronizing audio/video output and responding to remote-control inputs. IC Role / Device Role / Timing Role: Main CPU executing CD-I firmware, DMA-shuttling MPEG-1 video frames to display buffer, and USART handling IR remote command parsing. Use Value: Meets CD-I Green Book spec for M68000 compatibility and DMA throughput-enabling full-motion video playback without external frame buffers or co-processors. |
| Telecom Line Card | Medical Diagnostic Instrument |
Use Scenario: Protocol bridging between T1/E1 interfaces and Ethernet backhaul in remote access servers. IC Role / Device Role / Timing Role: Embedded controller running telecom stack, using USARTs for HDLC framing and DMA for zero-copy packet buffering. Use Value: Sustains 9.8 Mbps serial throughput per channel and 33.3 MB/s DMA-supporting simultaneous multi-channel voice/data aggregation without CPU saturation. | Use Scenario: Acquisition and preprocessing of analog sensor data (ECG, EEG) with real-time alarm triggering and display update. IC Role / Device Role / Timing Role: Real-time data concentrator using timers for precise sampling intervals, DMA for ADC-to-memory transfer, and USART for PC telemetry upload. Use Value: 80–125 ns timer resolution ensures ±0.1% sampling accuracy; LPSTOP mode extends battery life in portable diagnostic units. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC68332ACFUE16 | Same CPU32 core but lacks second USART and DMA; includes QSM (Queued Serial Module) instead | Better suited for cost-sensitive motor control where dual serial ports aren't required | Select MC68332ACFUE16 only if DMA and dual USART are unnecessary-saves ~15% BOM cost |
| MC68360EM25C | Enhanced M68300 family part with integrated QUICC engine, Ethernet MAC, and faster 25 MHz rating | Targets networked embedded systems requiring TCP/IP offload and LAN connectivity | Choose MC68360EM25C when adding Ethernet or complex protocol stacks-requires PCB redesign due to 240-pin PQFP |
Compared with MC68340CFE16E, MC68332ACFUE16 sacrifices DMA bandwidth and serial flexibility for lower gate count and cost, while MC68360EM25C adds networking capability at the expense of higher power and larger footprint-neither is pin-compatible, and both require firmware adaptation for peripheral register differences.
Availability
MC68340CFE16E is available at Aetrix Electronics and suitable for industrial motion controllers, CD-I interactive players, telecom line cards, and medical diagnostic instruments requiring stable component supply across extended lifecycle programs.
Supply support for MC68340CFE16E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Motorola Semiconductor (now part of NXP Semiconductors via Freescale acquisition) pioneered high-integration microcontrollers for industrial and multimedia applications in the 1990s.
The MC68340CFE16E belongs to the M68300 family-designed to replace multi-chip microprocessor systems with a single IC delivering CPU, DMA, serial, timer, and system integration functions for embedded control.
FAQ
What is the maximum operating frequency of the MC68340CFE16E?
The MC68340CFE16E is rated for 16.78 MHz operation at 5.0 V ±5%. This frequency is validated for the CQFP-144 package and industrial temperature range (0°C to +70°C). Higher speeds (e.g., 25.16 MHz) apply only to the MC68340CVR25E and other RP/PGA variants-not the FE-suffixed CQFP parts.
Is the MC68340CFE16E pin-compatible with the MC68340CVR25E?
No, the MC68340CFE16E is not pin-compatible with the MC68340CVR25E. The former uses a 144-pin Ceramic Quad Flat Pack (CQFP), while the latter uses a 145-pin Plastic Pin Grid Array (PGA). Physical layout, pin count, and signal mapping differ-requiring distinct PCB footprints and layout revisions.
Does the MC68340CFE16E support 3.3 V operation?
No, the MC68340CFE16E operates exclusively at 5.0 V ±5%. The "V" suffix (e.g., MC68340V) denotes the 3.3 V variant. This part's "FE" package code and absence of "V" in the full part number confirm its 5 V specification-using it with 3.3 V will result in functional failure.
What development tools are supported for the MC68340CFE16E?
The MC68340CFE16E supports Motorola's Background Debug Mode (BDM) interface, enabling real-time register inspection, memory read/write, and patch execution via dedicated serial link. Compatible tools include the M68340 Evaluation System (BR573/D) and third-party BDM emulators targeting CPU32 architecture-no JTAG debugger is required.
How does the MC68340CFE16E handle power management in embedded systems?
The MC68340CFE16E implements multiple power-saving mechanisms: LPSTOP instruction halts CPU/peripherals to ~300 µW standby current; software-controlled clock throttling scales frequency from 131 kHz to 16.78 MHz; and individual peripheral modules (e.g., unused USART) can be disabled to reduce consumption by 5–10% each-critical for battery-powered CD-I portables and remote sensors.
MC68340CFE16E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 144-BCQFP
- Series:
- M683xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- CPU32
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 16MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- DRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- -
- SATA:
- -
- USB:
- -
- Voltage - I/O:
- 5.0V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 144-CQFP (26.77x26.77)
- Additional Interfaces:
- USART
MC68340CFE16E FAQ
1.How can I place an order for MC68340CFE16E through Aetrix?
Please submit a Request for Quotation (RFQ) for MC68340CFE16E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC68340CFE16E reliable?
The price and inventory of MC68340CFE16E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC68340CFE16E is usually 5 days.
3.What payment methods are accepted for MC68340CFE16E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC68340CFE16E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC68340CFE16E?
MC68340CFE16E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC68340CFE16E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC68340CFE16E?
For technical support, including MC68340CFE16E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC68340CFE16E requirements.
6.How does Aetrix verify that MC68340CFE16E is sourced from the original manufacturer or authorized distributors?
All MC68340CFE16E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC68340CFE16E meets industry standards.
7.What is the process for return or replacement of MC68340CFE16E?
All MC68340CFE16E units undergo pre-shipment inspection (PSI). If there is an issue with MC68340CFE16E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC68340CFE16E part is unused and in its original packaging.
Return procedure for MC68340CFE16E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MC68340CFE16E Tags

-
AT91SAM9260B-CU-999
Microchip Technology

-
AT91SAM9G25-CU
Microchip Technology

-
ATSAMA5D27C-CU
Microchip Technology

-
AT91SAM9X35-CU
Microchip Technology

-
AT91SAM9X25-CU
Microchip Technology

-
MCIMX6Y2CVM08AB
NXP Semiconductors
-
AM3352BZCZ100
Texas Instruments

-
AT91SAM9260B-CU
Microchip Technology

-
AT91SAM9260B-QU
Microchip Technology

-
ATSAMA5D31A-CU
Microchip Technology

-
AT91SAM9G20B-CU-999
Microchip Technology

-
MCIMX6Y2CVM05AB
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
