onsemi MC74AC652DWR2G
- Part No.:
- MC74AC652DWR2G
- Manufacturer:
- onsemi
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
MC74AC652DWR2G.pdf
- Description:
- IC TXRX NON-INVERT 6V 24SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,910
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Product details
Overview
MC74AC652DWR2G from onsemi is an octal registered bus transceiver with non-inverting 3-state outputs, supporting bidirectional data flow between A and B buses via independent D-type flip-flop registers. It operates at 2.0–6.0 V supply, delivers ±24 mA output drive, and features simultaneous clocking for register-to-register transfer. Used in high-speed bus interface applications such as backplane data routing in industrial controllers.
For engineers reviewing the MC74AC652DWR2G datasheet, pinout, applications, or equivalent options, key selection criteria include real-time vs. registered transfer modes, dual-clock edge-triggered storage, 3-state output control timing, and SOIC-24 package compatibility with legacy 300-mil DIP footprints.
Technical Context
The MC74AC652DWR2G implements two independent 8-bit register banks (A and B), each with dedicated clock (CAB/CBA), select (SAB/SBA), and output-enable (GAB/GBA) controls. Data transfers occur either in real time (bus-to-bus) or from stored register contents, enabling multiplexed data handling without external latching logic.
Its AC performance is characterized at VCC = 3.0 V and 5.0 V, with propagation delays as low as 1.5 ns (tPHL, A→B at 5 V) and output enable/disable times under 13 ns. The device supports TTL-compatible operation only in ACT variant; this AC version uses CMOS input thresholds (VIH = 2.1 V min at VCC = 3.0 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.0 V to 6.0 V - Enables direct interface with 3.3 V and 5 V logic systems without level shifters. |
| Output Drive Strength | ±24 mA - Sufficient to drive standard TTL loads and multiple CMOS inputs across PCB traces up to 15 cm. |
| Propagation Delay (A→B) | 1.5–11.0 ns at 5 V - Supports >80 MHz bus toggle rates in registered mode with setup/hold margins. |
| 3-State Output Leakage | ±0.6 μA max - Ensures minimal bus contention current when outputs are disabled in high-density backplane designs. |
| Input Capacitance | 4.5 pF - Low capacitive loading preserves signal integrity on high-speed parallel buses with stub-free routing. |
| Operating Temperature | −40 °C to +85 °C - Qualified for industrial automation and programmable logic controller (PLC) environments. |
Pinout & Package
MC74AC652DWR2G is housed in a 24-pin SOIC wide-body (SOIC-24 WB) package per case 751E, 300-mil width, with gull-wing leads and Pb-free finish (G suffix). Pin pitch is 1.27 mm; body dimensions are 15.4 mm × 7.5 mm × 2.5 mm (L × W × H).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A7 | A-Bus Data Inputs/Outputs | Bidirectional I/O pins connected to A-side bus; register-stored or real-time data appears here based on SAB/GAB control. |
| B0–B7 | B-Bus Data Inputs/Outputs | Bidirectional I/O pins connected to B-side bus; function mirrors A0–A7 with independent register and control path. |
| CAB, CBA | Register Clock Inputs | LOW-to-HIGH transitions load data from A or B bus into respective registers; simultaneous clocks allow atomic A↔B register exchange. |
| SAB, SBA | Data Path Select Inputs | Selects source: L = real-time bus data, H = stored register data for transfer to opposite bus. |
| GAB, GBA | Output Enable Inputs | Active-Low enables A→B or B→A 3-state outputs; independent control permits asymmetric bus driving (e.g., A active, B high-Z). |
| VCC, GND | Power Supply Pins | Single 2.0–6.0 V supply; decoupling required within 1 cm of VCC/GND pair to maintain AC noise margin. |
Key Features
| Feature | Design Value |
|---|---|
| Independent A/B Registers | Enables asynchronous data capture on each bus-A can store sensor data while B streams actuator commands without interference. |
| Multiplexed Real-Time & Stored Transfer | Eliminates need for external multiplexers in bus arbitration logic; single device handles both live and buffered data paths. |
| Simultaneous Clock Edge Triggering | Allows atomic swap of A and B register contents on one clock edge-critical for coherent status/command exchange in safety-critical I/O modules. |
| 3-State Output Control per Bus | Permits dynamic bus ownership assignment in multi-master systems; GAB/GBA can be driven by priority encoder logic. |
| Pb-Free SOIC-24 Package | Complies with RoHS Directive 2011/65/EU and JEDEC J-STD-020 moisture sensitivity level 1-suitable for standard reflow profiles. |
Applications
| Industrial PLC Backplane Interface | Test Equipment Digital Pattern Generator |
|---|---|
|
Use Scenario: Bidirectional data exchange between CPU module and I/O expansion slots in modular PLC chassis. IC Role / Device Role / Timing Role: Registered transceiver managing time-aligned command/status transfers between isolated bus segments with glitch-free handshaking. Use Value: Simultaneous CAB/CBA clocking ensures deterministic register-to-register updates, eliminating race conditions during hot-swap I/O module insertion. |
Use Scenario: Generating synchronized stimulus and capture waveforms across 16-bit digital channels in automated test equipment. IC Role / Device Role / Timing Role: Dual-register buffer staging pattern data from memory and feeding it to output drivers with precise edge alignment. Use Value: Independent SAB/SBA control allows interleaving of real-time trigger signals with preloaded register data-enabling complex sequence generation without FPGA overhead. |
| Medical Imaging Data Aggregation | Avionics Sensor Data Multiplexer |
|
Use Scenario: Consolidating parallel pixel data streams from multiple X-ray detector ASICs into a unified LVDS serializer interface. IC Role / Device Role / Timing Role: High-drive transceiver buffering and registering burst-mode image frames before compression, minimizing skew across 8-bit lanes. Use Value: ±24 mA drive strength maintains signal fidelity over 10 cm FR4 traces to serializer IC, while 3-state isolation prevents crosstalk during frame blanking intervals. |
Use Scenario: Routing discrete sensor outputs (temperature, pressure, vibration) from distributed avionics bays to central flight computer via shared MIL-STD-1553 bus interface. IC Role / Device Role / Timing Role: Registered bus interface providing EMI-hardened, latch-up immune data aggregation with controlled output enable sequencing. Use Value: −40 °C to +85 °C rating and ±100 mA latchup immunity meet DO-160 Section 22 environmental stress requirements for airborne electronics. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal registered transceiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT652DW | TTL-compatible inputs (VIH = 2.0 V), otherwise identical AC/DC specs and pinout. | Required where legacy 5 V TTL drivers feed the transceiver; not suitable for pure CMOS 3.3 V systems without level translation. | Choose SN74ACT652DW only if upstream logic is TTL-family; MC74AC652DWR2G is preferred for mixed-voltage or low-power CMOS designs. |
| 74LVTH16652DL | 16-bit, 3.3 V only (3.0–3.6 V), lower drive (±24 mA same), but includes bus-hold and advanced power-down mode. | Targets high-density, low-voltage embedded systems; lacks dual-clock simultaneous register update capability. | Use 74LVTH16652DL for space-constrained 3.3 V applications needing bus-hold; retain MC74AC652DWR2G for 2.0–6.0 V flexibility and atomic A/B register swap. |
Compared with SN74ACT652DW and 74LVTH16652DL, MC74AC652DWR2G uniquely supports full 2.0–6.0 V operation with simultaneous CAB/CBA triggering-making it the only option for industrial systems requiring seamless interoperability between 3.3 V microcontrollers and 5 V legacy peripherals while maintaining deterministic register exchange.
Availability
MC74AC652DWR2G is available at Aetrix Electronics and suitable for industrial PLC backplanes, automated test equipment, medical imaging subsystems, and avionics sensor interfaces requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for MC74AC652DWR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, and medical applications.
The MC74AC652DWR2G belongs to onsemi's legacy AC logic family, designed specifically for robust, high-speed bus interfacing in industrial control and instrumentation systems where reliability across voltage and temperature extremes is critical.
FAQ
What is the maximum clock frequency supported by MC74AC652DWR2G?
The MC74AC652DWR2G does not specify a maximum clock frequency in its datasheet; instead, timing is defined by propagation delays and setup/hold requirements. At VCC = 5.0 V, minimum CPAB/CBA pulse width is 6.0 ns, supporting effective clock rates up to ~80 MHz in register-load operations. Real-time transfer bypasses registers and is limited only by propagation delay (as low as 1.5 ns), enabling >100 MHz data throughput in non-registered mode. Always verify timing margins against your specific PCB trace lengths and load capacitance when using MC74AC652DWR2G.
Does MC74AC652DWR2G support simultaneous loading of both A and B registers?
Yes, MC74AC652DWR2G supports simultaneous loading of both A and B registers on the same LOW-to-HIGH clock transition when both CAB and CBA are asserted. This is explicitly confirmed in the Function Table (page 3) under "Store A and B Data" with inputs CAB = ⇑, CBA = ⇑, and all other controls set appropriately. Simultaneous operation ensures atomic data exchange between buses-a key feature distinguishing MC74AC652DWR2G from basic transceivers.
What is the difference between MC74AC652DWR2G and MC74ACT652DWR2G?
The core functional difference is input threshold compatibility: MC74AC652DWR2G uses CMOS-compatible inputs (VIH = 2.1 V min at 3.0 V), while MC74ACT652DWR2G has TTL-compatible inputs (VIH = 2.0 V min at 4.5 V). Both share identical pinout, package, output drive (±24 mA), and AC/DC specifications otherwise. MC74AC652DWR2G is preferred in mixed-voltage or low-power systems; MC74ACT652DWR2G suits legacy 5 V TTL environments. The 'C' and 'T' suffixes denote these input families-not speed grades.
Can MC74AC652DWR2G operate at 3.3 V supply?
Yes, MC74AC652DWR2G is fully specified for operation at 3.0 V, 4.5 V, and 5.5 V supply voltages per Recommended Operating Conditions (page 4). At VCC = 3.0 V, it guarantees VIH ≥ 1.5 V, VOL ≤ 0.1 V at 50 μA, and tPLH/tPHL ≤ 19.0 ns-making it suitable for direct interface with 3.3 V microcontrollers and FPGAs without level shifting. Its 2.0–6.0 V range provides design margin for brown-out conditions and supply tolerance.
Is MC74AC652DWR2G pin-compatible with older 74-series transceivers like 74LS652?
No, MC74AC652DWR2G is not pin-compatible with 74LS652. While both are octal registered transceivers, the pin assignments differ significantly: 74LS652 uses a 24-pin DIP with different clock, select, and enable pin locations (e.g., CLK1/CLK2 vs. CAB/CBA), and lacks independent GAB/GBA enables. MC74AC652DWR2G follows modern SOIC-24 layout per case 751E. Direct replacement requires PCB redesign; use MC74AC652DWR2G only in new designs or with adapter boards.
MC74AC652DWR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74AC
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Transceiver, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
MC74AC652DWR2G FAQ
1.How can I place an order for MC74AC652DWR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for MC74AC652DWR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC74AC652DWR2G reliable?
The price and inventory of MC74AC652DWR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC74AC652DWR2G is usually 5 days.
3.What payment methods are accepted for MC74AC652DWR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC74AC652DWR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC74AC652DWR2G?
MC74AC652DWR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC74AC652DWR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC74AC652DWR2G?
For technical support, including MC74AC652DWR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC74AC652DWR2G requirements.
6.How does Aetrix verify that MC74AC652DWR2G is sourced from the original manufacturer or authorized distributors?
All MC74AC652DWR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC74AC652DWR2G meets industry standards.
7.What is the process for return or replacement of MC74AC652DWR2G?
All MC74AC652DWR2G units undergo pre-shipment inspection (PSI). If there is an issue with MC74AC652DWR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC74AC652DWR2G part is unused and in its original packaging.
Return procedure for MC74AC652DWR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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