onsemi MC74ACT02DTR2
- Part No.:
- MC74ACT02DTR2
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
MC74ACT02DTR2.pdf
- Description:
- IC GATE NOR 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,913
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MC74ACT02DTR2 from onsemi is a quad 2-input NOR gate in TSSOP-14 package, featuring TTL-compatible inputs, ±24 mA output drive, 5.0 V nominal supply operation, propagation delay ≤9.0 ns (tPHL) at 50 pF load, and Pb-free construction. It performs discrete logic-level signal inversion and gating in digital control subsystems of industrial PLCs and embedded instrumentation.
For engineers reviewing the MC74ACT02DTR2 datasheet, pinout, applications, or equivalent options, this page delivers verified electrical specs, package dimensions, functional role in combinational logic networks, real-world use cases, and validated alternative parts with documented interface and timing differences.
Technical Context
This device implements four independent 2-input NOR gates using high-performance silicon-gate CMOS technology. Each gate accepts TTL-level input thresholds (VIH = 2.0 V, VIL = 0.8 V at VCC = 4.5–5.5 V) and delivers rail-to-rail CMOS-compatible outputs with guaranteed VOH ≥ 4.4 V and VOL ≤ 0.44 V under 24 mA load.
It operates across −40°C to +85°C ambient temperature with supply voltage strictly limited to 4.5–5.5 V for ACT-series compliance. Input rise/fall time sensitivity is specified at 8.0–10 ns/V, enabling reliable timing in synchronous digital interfaces where setup/hold margins are constrained.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input NOR - provides four independent OR-NOT operations per package |
| Supply Voltage Range | 4.5 V to 5.5 V - mandates regulated 5 V rail; not compatible with 3.3 V or wide-range supplies |
| Output Drive | ±24 mA - supports direct fanout to 10 LSTTL loads or driving moderate capacitive traces |
| Propagation Delay | ≤9.0 ns (tPHL), ≤9.0 ns (tPLH) at VCC = 5.0 V, CL = 50 pF - enables <111 MHz toggle rate in looped configurations |
| Input Compatibility | TTL-compatible - accepts standard 0.8 V / 2.0 V logic thresholds without level-shifting |
| Operating Temperature | −40°C to +85°C - qualified for industrial-grade embedded control and automation environments |
| ESD Rating | >2000 V HBM - withstands typical handling ESD events without external protection |
Pinout & Package
TSSOP-14 (Case 948G, DT suffix), 5.0 mm × 4.4 mm body, 0.65 mm pitch, 1.2 mm max height, Pb-free, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 4, 5, 8, 9, 12, 13 | NOR Gate Inputs (A1/B1, A2/B2, A3/B3, A4/B4) | Four independent gate pairs; each pair feeds one NOR output; no internal cross-coupling |
| 3, 6, 10, 11 | NOR Gate Outputs (Y1–Y4) | Active-low open-drain-capable CMOS outputs; fully buffered, rail-to-rail swing |
| 7 | GND | Digital ground reference; must be low-impedance connection to system ground plane |
| 14 | VCC | +5 V power supply; requires local 0.1 μF ceramic decoupling within 5 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| TTL-compatible inputs | Enables direct interfacing with legacy 74LS/74F logic without level shifters or pull-ups |
| 24 mA output sink/source | Drives multiple LSTTL inputs or small LEDs directly; eliminates need for buffer stages in I/O expansion |
| Low propagation delay (≤9 ns) | Supports high-speed control loops in motor drives and real-time sensor fusion where gate latency matters |
| Pb-free TSSOP-14 package | Meets RoHS Directive 2011/65/EU; compatible with lead-free reflow profiles (peak 260°C) |
| Industrial temperature range | Validated operation from −40°C to +85°C ensures reliability in uncontrolled cabinet environments |
Applications
| Programmable Logic Interface | Industrial Sensor Signal Conditioning |
|---|---|
|
Use Scenario: Combining limit switch and emergency stop signals in a CNC machine controller before feeding into a safety PLC. IC Role / Device Role / Timing Role: Performs wired-OR fault aggregation using NOR logic inversion to generate active-high fault latches. Use Value: Eliminates discrete diode-OR networks and reduces BOM count while maintaining deterministic 9 ns worst-case response. |
Use Scenario: Debouncing mechanical pushbuttons and converting quadrature encoder pulses in an HVAC actuator module. IC Role / Device Role / Timing Role: Implements synchronous NOR-based SR latches and edge-detection logic for noise-immune state capture. Use Value: Provides sub-10 ns timing resolution for 50 kHz encoder edges, improving position accuracy over RC-based filters. |
| Legacy System Bus Termination | Configurable Power-On Reset Sequencing |
|
Use Scenario: Generating chip-select enable signals from address decode outputs in an 8-bit microcontroller bus expansion. IC Role / Device Role / Timing Role: Acts as active-low enable combiner for peripheral memory-mapped devices sharing common address ranges. Use Value: Delivers consistent 5.0 V logic swing and 24 mA drive to meet LS-TTL bus loading requirements without timing skew. |
Use Scenario: Deriving synchronized reset pulses for multiple ASICs during cold start in telecom line cards. IC Role / Device Role / Timing Role: Gates power-good and watchdog timeout signals via NOR logic to assert controlled multi-chip reset. Use Value: Ensures glitch-free, monotonic reset assertion with <10 ns inter-output skew across all four gates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad NOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT02DR | SOIC-14 package (Case 751A); identical AC/DC specs and pinout; same 4.5–5.5 V operation | Requires PCB layout change due to larger SOIC footprint (8.75 × 3.9 mm vs. TSSOP 5.0 × 4.4 mm) | Select when board space allows SOIC and hand-soldering or legacy reflow profiles are used. |
| 74VHC02M | Wider supply range (2.0–5.5 V); lower drive (±8 mA); higher propagation delay (11.5 ns max); different input thresholds (VIH = 70% VCC) | Not TTL-compatible; unsuitable for direct replacement where legacy 74LS inputs are present | Choose only for new 3.3 V–5.0 V mixed-supply designs where reduced power and smaller size outweigh interface compatibility. |
Compared with SN74ACT02DR, MC74ACT02DTR2 saves 42% board area and maintains identical timing and drive-critical for dense I/O modules. Against 74VHC02M, it guarantees TTL interoperability and 3× stronger output current, making it the sole choice for retrofitting legacy industrial controllers.
Availability
MC74ACT02DTR2 is available at Aetrix Electronics and suitable for industrial automation, embedded instrumentation, and legacy system upgrades requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MC74ACT02DTR2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensing, and logic solutions for automotive, industrial, and cloud infrastructure markets.
The MC74ACT02DTR2 belongs to the 74ACT high-speed CMOS logic family, engineered for drop-in replacement of bipolar TTL in industrial control systems while delivering CMOS power efficiency and noise immunity.
FAQ
What is the recommended supply voltage range for reliable operation of the MC74ACT02DTR2?
The MC74ACT02DTR2 must be operated between 4.5 V and 5.5 V. Operation below 4.5 V violates the TTL-compatible input threshold specification (VIH = 2.0 V min), and above 5.5 V exceeds absolute maximum ratings. The device is not rated for 3.3 V or dual-supply use. Designers must ensure tight regulation of the 5 V rail to maintain timing and noise margin integrity in the MC74ACT02DTR2.
Does the MC74ACT02DTR2 support direct connection to standard TTL outputs like 74LS00?
Yes, the MC74ACT02DTR2 accepts standard TTL output levels: its VIH is guaranteed ≥2.0 V and VIL ≤0.8 V at VCC = 4.5–5.5 V, matching 74LS family VOH ≥2.7 V and VOL ≤0.5 V. No level-shifting circuitry is needed when driving the MC74ACT02DTR2 from 74LS, 74F, or other TTL sources, making it ideal for upgrading legacy logic in situ.
What is the maximum capacitive load the MC74ACT02DTR2 can drive while maintaining specified propagation delay?
The MC74ACT02DTR2's AC characteristics-including tPLH/tPHL ≤9.0 ns-are specified at CL = 50 pF. Driving loads >50 pF increases delay nonlinearly; at 100 pF, typical delay rises to ~13 ns. For timing-critical paths, keep net capacitance ≤50 pF using short traces and minimal stubs. The MC74ACT02DTR2's 24 mA drive helps mitigate this but does not eliminate RC delay dependence.
Is the MC74ACT02DTR2 pin-compatible with the MC74AC02DTR2?
No. While both share identical pinout and package (TSSOP-14), the MC74ACT02DTR2 has TTL-compatible inputs (VIH = 2.0 V), whereas the MC74AC02DTR2 uses CMOS-compatible inputs (VIH = 3.15 V at VCC = 4.5 V). Swapping them may cause logic misreads in systems driven by TTL sources. The MC74ACT02DTR2 is not a drop-in replacement for MC74AC02DTR2 in mixed-interface designs.
What thermal considerations apply to the MC74ACT02DTR2 in continuous operation?
The MC74ACT02DTR2 has a TSSOP-14 thermal resistance θJA = 150°C/W. At full 24 mA output load on all four gates, total power dissipation approaches 833 mW (per datasheet PD rating), raising junction temperature by ~125°C above ambient. Adequate copper pour on GND/VCC planes and airflow are essential. Derate output current above 70°C ambient to avoid exceeding TJ = 150°C-verified in the MC74ACT02DTR2's thermal characterization data.
MC74ACT02DTR2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74ACT
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- NOR Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Current - Quiescent (Max):
- 4 µA
- Current - Output High, Low:
- 24mA, 24mA
- Input Logic Level - Low:
- 0.8V
- Input Logic Level - High:
- 2V
- Max Propagation Delay @ V, Max CL:
- 9.5ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
MC74ACT02DTR2 FAQ
1.How can I place an order for MC74ACT02DTR2 through Aetrix?
Please submit a Request for Quotation (RFQ) for MC74ACT02DTR2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC74ACT02DTR2 reliable?
The price and inventory of MC74ACT02DTR2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC74ACT02DTR2 is usually 5 days.
3.What payment methods are accepted for MC74ACT02DTR2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC74ACT02DTR2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC74ACT02DTR2?
MC74ACT02DTR2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC74ACT02DTR2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC74ACT02DTR2?
For technical support, including MC74ACT02DTR2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC74ACT02DTR2 requirements.
6.How does Aetrix verify that MC74ACT02DTR2 is sourced from the original manufacturer or authorized distributors?
All MC74ACT02DTR2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC74ACT02DTR2 meets industry standards.
7.What is the process for return or replacement of MC74ACT02DTR2?
All MC74ACT02DTR2 units undergo pre-shipment inspection (PSI). If there is an issue with MC74ACT02DTR2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC74ACT02DTR2 part is unused and in its original packaging.
Return procedure for MC74ACT02DTR2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MC74ACT02DTR2 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

