onsemi MC74HC08ADTR2G-Q
- Part No.:
- MC74HC08ADTR2G-Q
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
MC74HC08ADTR2G-Q.pdf
- Description:
- IC GATE AND 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MC74HC08ADTR2G-Q from onsemi is a quad 2-input AND gate in TSSOP-14 package, operating from 2.0 V to 6.0 V supply, delivering 10 LSTTL load drive capability with propagation delay as low as 13 ns at 6.0 V, used for digital logic control in automotive body electronics and industrial I/O modules.
For engineers reviewing the MC74HC08ADTR2G-Q datasheet, pinout, applications, or equivalent options, this page provides verified functional identity, AEC-Q100 qualified timing behavior, input/output voltage thresholds across temperature, and validated automotive-grade alternatives.
Technical Context
This device implements four independent CMOS AND gates with high noise immunity and rail-to-rail input compatibility-inputs accept standard CMOS levels and, with pullup resistors, interface directly to LSTTL outputs. It uses silicon-gate technology with 24 FETs per package (6 equivalent gates) and complies with JEDEC Std No. 7A.
The MC74HC08ADTR2G-Q variant is AEC-Q100 qualified and PPAP capable, with −55 °C to +125 °C operating range, 10 pF maximum input capacitance, and guaranteed VOH ≥ 5.9 V / VOL ≤ 0.1 V at 6.0 V supply and 20 µA load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input AND gate (Y = A·B per channel) |
| Supply Voltage Range | 2.0 V to 6.0 V - supports wide-input industrial and automotive battery-supplied systems |
| Propagation Delay (tPLH/tPHL) | 13 ns max at VCC = 6.0 V - enables reliable operation up to ~30 MHz toggle rate |
| Output Drive | 10 LSTTL loads - sufficient to drive multiple legacy TTL inputs without buffering |
| Input Thresholds (VIH/VIL) | VIH = 4.20 V, VIL = 1.80 V at VCC = 6.0 V - ensures robust noise margin >1.2 V |
| Operating Temperature | −55 °C to +125 °C - certified for under-hood and engine-control module deployment |
| ESD Rating | HBM >2000 V - meets automotive ESD robustness requirements per AEC-Q100 |
Pinout & Package
TSSOP-14 (Case 948G), 4.9 mm × 4.4 mm × 1.2 mm body, 0.65 mm pitch, Pb-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A1 (Input) | First input of Gate 1 - must be tied to defined logic level if unused |
| 2 | B1 (Input) | Second input of Gate 1 - compatible with CMOS and LSTTL (with pullup) |
| 3 | Y1 (Output) | AND result of A1·B1 - drives up to 10 LSTTL loads or CMOS/NMOS/TTL directly |
| 4 | A2 (Input) | First input of Gate 2 - electrically identical to Pin 1 |
| 5 | B2 (Input) | Second input of Gate 2 - shares same VIH/VIL specs and noise immunity |
| 6 | Y2 (Output) | AND result of A2·B2 - low output impedance supports fast edge transitions |
| 7 | GND | Ground reference for all logic and power paths - mandatory low-impedance connection |
| 8 | Y3 (Output) | AND result of A3·B3 - matches Y1/Y2 electrical performance and loading capability |
| 9 | A3 (Input) | First input of Gate 3 - no internal connection to other gates; fully isolated |
| 10 | B3 (Input) | Second input of Gate 3 - supports same input leakage (±0.1 µA max) and capacitance (10 pF) |
| 11 | Y4 (Output) | AND result of A4·B4 - identical AC/DC characteristics to other outputs |
| 12 | A4 (Input) | First input of Gate 4 - usable across full temperature and voltage range |
| 13 | B4 (Input) | Second input of Gate 4 - meets VIH ≥ 4.20 V / VIL ≤ 1.80 V at VCC = 6.0 V |
| 14 | VCC | Positive supply rail - decoupling capacitor required within 1 cm for stable switching |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input compatibility | Accepts CMOS outputs natively; interfaces to LSTTL with external pullups - eliminates level-shifter need in mixed-logic systems |
| High noise immunity | CMOS architecture with >1.2 V noise margin at 6.0 V - resists EMI in automotive harness environments |
| AEC-Q100 qualification | Qualified to Grade 1 (−40 °C to +125 °C ambient) with PPAP documentation support - meets OEM automotive release requirements |
| Low quiescent current | ICC ≤ 40 µA at 125 °C - enables always-on logic functions in low-power wake-up circuits |
| Pb-free and RoHS compliant | Meets J-STD-609 Category 1 moisture sensitivity (MSL Level 1) - supports standard reflow without baking |
Applications
| Automotive Body Control Module | Industrial PLC Input Conditioning |
|---|---|
|
Use Scenario: Combining door lock status and ignition signal to enable window motor power only when vehicle is running and doors are unlocked. IC Role / Device Role / Timing Role: Logic gating function - performs real-time AND of two safety-critical signals before enabling power path. Use Value: Eliminates microcontroller GPIO overhead and provides deterministic sub-20 ns response - critical for fail-safe interlock timing. |
Use Scenario: Validating dual-channel sensor redundancy by requiring both analog-to-digital converter ready flags before latching data. IC Role / Device Role / Timing Role: Synchronous enable gate - ensures data capture occurs only when both ADCs report valid conversion completion. Use Value: Prevents corrupted readings due to single-point failure; leverages <13 ns propagation delay for tight synchronization. |
| Medical Infusion Pump Safety Interlock | Consumer Appliance Door Lock Logic |
|
Use Scenario: Enabling motor drive only when both occlusion detection and air-in-line sensor outputs are low (indicating safe condition). IC Role / Device Role / Timing Role: Hardware-level safety AND gate - operates independently of firmware to enforce dual-sensor requirement. Use Value: Meets IEC 62304 Class C software safety requirements by providing redundant hardware validation path. |
Use Scenario: Preventing washing machine drum rotation unless door latch switch and water-level sensor both indicate closed and filled conditions. IC Role / Device Role / Timing Role: Electromechanical interlock enabler - gates main motor driver enable signal based on two physical state inputs. Use Value: Reduces MCU polling burden and guarantees immediate mechanical lock enforcement with no software latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad 2-input AND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC08QPWRQ1 | TI AEC-Q100 Grade 1 part; identical 2–6 V supply, but tPLH = 19 ns @ 6 V (vs. 13 ns for MC74HC08ADTR2G-Q) | Valid for automotive use but slower propagation limits high-speed sampling circuits | Select when TI supply chain alignment is prioritized over minimal propagation delay |
| 74HC08D,118 | Nexperia SOIC-14 version; same logic and DC specs, but not AEC-Q100 qualified and rated only to +85 °C | Suitable for commercial/industrial use only - not approved for automotive under-hood placement | Choose for cost-sensitive non-automotive designs where extended temperature is not required |
Compared with SN74HC08QPWRQ1 and 74HC08D,118, the MC74HC08ADTR2G-Q delivers the fastest propagation (13 ns), full AEC-Q100 Grade 1 qualification, and TSSOP-14 footprint - making it optimal for space-constrained, safety-critical automotive logic gating where timing and reliability are jointly essential.
Availability
MC74HC08ADTR2G-Q is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC input conditioning, and medical infusion pump safety interlocks requiring stable component supply across extended temperature and long production lifecycles.
Supply support for MC74HC08ADTR2G-Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The MC74HC08ADTR2G-Q belongs to onsemi's high-reliability HC logic family, designed specifically for automotive and industrial systems demanding AEC-Q100 compliance, wide temperature operation, and robust noise immunity in noisy electrical environments.
FAQ
What is the maximum operating temperature range for the MC74HC08ADTR2G-Q?
The MC74HC08ADTR2G-Q is rated for −55 °C to +125 °C operating free-air temperature, meeting AEC-Q100 Grade 1 requirements. This range is validated across all DC and AC parameters in the official datasheet, including propagation delay, output drive, and input thresholds - ensuring reliable operation in under-hood automotive locations and industrial enclosures without forced cooling.
Is the MC74HC08ADTR2G-Q pin-compatible with standard LS08 devices?
Yes, the MC74HC08ADTR2G-Q is identical in pinout to the 74LS08, as explicitly stated in the datasheet. All 14 pins - including VCC (Pin 14), GND (Pin 7), and the four A/B/Y signal pairs - match LS08 layout. However, note that while pinout aligns, electrical behavior differs: MC74HC08ADTR2G-Q operates at 2.0–6.0 V and offers CMOS input compatibility, unlike bipolar LS08's 5 V-only and TTL-level inputs.
Does the MC74HC08ADTR2G-Q support mixed-voltage interfacing with TTL logic?
Yes - the MC74HC08ADTR2G-Q inputs are compatible with standard CMOS outputs natively, and with pullup resistors, they interface directly to LSTTL outputs. Its VIH minimum of 4.20 V and VIL maximum of 1.80 V at 6.0 V supply provide sufficient margin for TTL logic high (2.4 V min) and low (0.8 V max), enabling seamless integration into legacy TTL-based subsystems without level shifters.
What is the propagation delay of the MC74HC08ADTR2G-Q at 5.0 V supply?
At VCC = 5.0 V and −55 °C to +25 °C, the MC74HC08ADTR2G-Q has a maximum propagation delay (tPLH/tPHL) of 15 ns, as specified in the AC Characteristics table. This value is measured from input transition (50% point) to output transition (50% point) under 50 pF load and 1 kΩ termination, confirming suitability for 30+ MHz digital control loops in automotive and industrial timing-critical applications.
How does the −Q suffix affect the MC74HC08ADTR2G-Q compared to non-Q variants?
The −Q suffix on MC74HC08ADTR2G-Q indicates automotive qualification: it is AEC-Q100 Grade 1 certified, PPAP capable, and manufactured under unique site and control change requirements. Unlike standard MC74HC08ADTR2G, the −Q version undergoes additional stress testing, lot traceability, and process controls - ensuring consistent performance and reliability for automotive safety-critical functions such as body control and powertrain interlocks.
MC74HC08ADTR2G-Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74HC
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- AND Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 6V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Input Logic Level - Low:
- 0.5V ~ 1.8V
- Input Logic Level - High:
- 1.5V ~ 4.2V
- Max Propagation Delay @ V, Max CL:
- 13ns @ 6V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
MC74HC08ADTR2G-Q FAQ
1.How can I place an order for MC74HC08ADTR2G-Q through Aetrix?
Please submit a Request for Quotation (RFQ) for MC74HC08ADTR2G-Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC74HC08ADTR2G-Q reliable?
The price and inventory of MC74HC08ADTR2G-Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC74HC08ADTR2G-Q is usually 5 days.
3.What payment methods are accepted for MC74HC08ADTR2G-Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC74HC08ADTR2G-Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC74HC08ADTR2G-Q?
MC74HC08ADTR2G-Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC74HC08ADTR2G-Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC74HC08ADTR2G-Q?
For technical support, including MC74HC08ADTR2G-Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC74HC08ADTR2G-Q requirements.
6.How does Aetrix verify that MC74HC08ADTR2G-Q is sourced from the original manufacturer or authorized distributors?
All MC74HC08ADTR2G-Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC74HC08ADTR2G-Q meets industry standards.
7.What is the process for return or replacement of MC74HC08ADTR2G-Q?
All MC74HC08ADTR2G-Q units undergo pre-shipment inspection (PSI). If there is an issue with MC74HC08ADTR2G-Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC74HC08ADTR2G-Q part is unused and in its original packaging.
Return procedure for MC74HC08ADTR2G-Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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