Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

onsemi MC74VHC1G09DBVT1G

Name: MC74VHC1G09DBVT1G
Brand: onsemi
SKU: MC74VHC1G09DBVT1G
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: MC74VHC1G09DBVT1G

Manufacturer:: onsemi

Category:: Gates and Inverters

Package:: SC-74A, SOT-753

Datasheet:: MC74VHC1G09DBVT1G.pdf

Description:: IC GATE AND 1CH 2-INP SC74A

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,819

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

MC74VHC1G09DBVT1G from onsemi is a single 2-input AND gate with open-drain output, designed for level-shifting and wired-OR logic in mixed-voltage systems. It operates from 2.0 V to 5.5 V, delivers 4.3 ns propagation delay at 5 V (typ), supports ±8 mA output drive at 3.0 V, and features overvoltage-tolerant inputs/outputs up to 5.5 V - enabling reliable interfacing between 3 V and 5 V domains in industrial control I/O modules.

For engineers reviewing the MC74VHC1G09DBVT1G datasheet, pinout, applications, or equivalent options, key selection criteria include open-drain compatibility with I²C pull-up networks, IOFF partial power-down protection during hot-swap events, and SC-74A package suitability for space-constrained PCB layouts.

Technical Context

This device implements standard positive-logic AND functionality with an open-drain output stage, requiring an external pull-up resistor to define the high-level voltage. Its input structure tolerates voltages up to 5.5 V regardless of VCC, allowing safe operation when driven by 5 V signals while powered from 3 V or lower.

The IOFF feature disables input leakage paths when VCC = 0 V, preventing back-powering of upstream circuits during partial power-down sequences. Propagation delays are specified across temperature (−55 °C to +125 °C) and supply (2.0–5.5 V) ranges, with tPZL/tPLZ values tightly characterized for CL = 15 pF and CL = 50 pF loads.

Key Specifications

Parameter	Value and Actual Design Meaning
VCC Range	2.0 V to 5.5 V - enables direct use in both 3.3 V and 5 V systems without level translators.
tPD (typ)	4.3 ns at VCC = 5 V, CL = 15 pF - supports >100 MHz toggle rates in low-load digital control paths.
IOL / IOS	±8 mA at VCC = 3.0 V - sufficient to drive standard LED indicators or interface with 74LVC-series inputs.
Input Voltage Tolerance	Up to 5.5 V independent of VCC - eliminates risk of damage when interfacing legacy 5 V logic to modern 3 V microcontrollers.
IOFF Leakage	≤10 µA at VCC = 0 V - prevents unintended current flow during system sleep or hot-insertion scenarios.
Operating Temp	−55 °C to +125 °C - qualified for under-hood automotive, industrial motor drives, and outdoor telecom equipment.

Pinout & Package

MC74VHC1G09DBVT1G is packaged in SC-74A (SOT-23-5), a 3.00 mm × 1.50 mm × 0.95 mm surface-mount package with 0.95 mm lead pitch and moisture sensitivity level 1.

Pin/Terminal	Circuit Role	Design Meaning
1	Input B	Second AND operand; accepts overvoltage-tolerant logic signals up to 5.5 V.
2	Input A	Primary AND operand; electrically identical to Pin 1 with same voltage tolerance.
3	GND	Ground reference for all internal circuitry and ESD protection structures.
4	Output Y	Open-drain output requiring external pull-up; sinks current only, cannot source.
5	VCC	Positive supply rail; powers internal logic and enables IOFF behavior when at 0 V.

Key Features

Feature	Design Value
Overvoltage-Tolerant I/O	Inputs and outputs withstand 5.5 V regardless of VCC - simplifies mixed-voltage board design without external clamps.
IOFF Partial Power-Down	Input leakage drops to ≤10 µA when VCC = 0 V - prevents backfeeding and ensures clean power sequencing.
Open-Drain Output	Enables wired-AND bus architectures and I²C-compatible communication with shared pull-up resistors.
High-Speed CMOS	4.3 ns tPD at 5 V matches TTL speed while consuming <1 µA quiescent current - ideal for low-power real-time logic.

Applications

Industrial PLC I/O Expansion	I²C Bus Level Translation
Use Scenario: Adding isolated digital input channels to a 3.3 V PLC controller that must accept 5 V sensor signals. IC Role / Device Role / Timing Role: Logic-level translator and signal conditioner; performs AND gating of enable + status before driving optocoupler input. Use Value: Eliminates need for discrete MOSFET translators; overvoltage tolerance protects MCU GPIOs during field wiring faults.	Use Scenario: Connecting a 3.3 V microcontroller's I²C port to a 5 V EEPROM or sensor with different supply domains. IC Role / Device Role / Timing Role: Open-drain buffer on SDA/SCL lines; provides bidirectional voltage translation via shared pull-ups. Use Value: Maintains I²C timing compliance (tPD ≤ 4.3 ns) while supporting mixed-supply interoperability without timing skew.
Hot-Swappable Module Detection	Power Sequencing Supervisor
Use Scenario: Detecting insertion/removal of daughterboards in telecom line cards where main power may be active before module power. IC Role / Device Role / Timing Role: Enables safe detection logic using IOFF mode to isolate unpowered modules from live backplane signals. Use Value: Prevents latch-up and back-powering during hot-swap events; validated for −55 °C to +125 °C operation.	Use Scenario: Generating synchronized reset pulses across multiple voltage rails (e.g., 1.2 V core, 3.3 V I/O, 5 V analog) in FPGA-based systems. IC Role / Device Role / Timing Role: Combines power-good signals from three regulators into a single ANDed reset assertion using open-drain wired-OR. Use Value: Ensures all rails are stable before releasing reset; open-drain output avoids contention between independent PG sources.

Industrial PLC I/O Expansion

I²C Bus Level Translation

Use Scenario: Adding isolated digital input channels to a 3.3 V PLC controller that must accept 5 V sensor signals.

IC Role / Device Role / Timing Role: Logic-level translator and signal conditioner; performs AND gating of enable + status before driving optocoupler input.

Use Value: Eliminates need for discrete MOSFET translators; overvoltage tolerance protects MCU GPIOs during field wiring faults.

Use Scenario: Connecting a 3.3 V microcontroller's I²C port to a 5 V EEPROM or sensor with different supply domains.

IC Role / Device Role / Timing Role: Open-drain buffer on SDA/SCL lines; provides bidirectional voltage translation via shared pull-ups.

Use Value: Maintains I²C timing compliance (tPD ≤ 4.3 ns) while supporting mixed-supply interoperability without timing skew.

Hot-Swappable Module Detection

Power Sequencing Supervisor

Use Scenario: Detecting insertion/removal of daughterboards in telecom line cards where main power may be active before module power.

IC Role / Device Role / Timing Role: Enables safe detection logic using IOFF mode to isolate unpowered modules from live backplane signals.

Use Value: Prevents latch-up and back-powering during hot-swap events; validated for −55 °C to +125 °C operation.

Use Scenario: Generating synchronized reset pulses across multiple voltage rails (e.g., 1.2 V core, 3.3 V I/O, 5 V analog) in FPGA-based systems.

IC Role / Device Role / Timing Role: Combines power-good signals from three regulators into a single ANDed reset assertion using open-drain wired-OR.

Use Value: Ensures all rails are stable before releasing reset; open-drain output avoids contention between independent PG sources.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input AND gate with open-drain output applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC1G09DBVR	Same SC-74A package; 1.65–5.5 V VCC range; slightly higher tPD (5.5 ns typ at 3.3 V).	LVC family offers tighter VIH/VIL thresholds but lacks 5.5 V overvoltage tolerance on inputs.	Select when operating strictly within 1.8–3.3 V domains and tighter logic thresholds are required.
74AUP1G09GW,125	SC-70-5 package; ultra-low ICC (0.9 µA max); VCC = 0.8–3.6 V only; no overvoltage tolerance.	Optimized for battery-powered IoT nodes; incompatible with 5 V signal domains or industrial temperature range.	Select for sub-1 µA standby power in portable devices where 5 V interfacing is unnecessary.

Compared with SN74LVC1G09DBVR and 74AUP1G09GW,125, the MC74VHC1G09DBVT1G uniquely combines 5.5 V overvoltage tolerance, −55 °C to +125 °C operation, and open-drain output in SC-74A - making it the only choice for robust industrial level-shifting where signal integrity across voltage domains is critical.

Availability

MC74VHC1G09DBVT1G is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, I²C bus level translation, hot-swappable module detection, and power sequencing supervisor circuits requiring stable component supply across extended temperature and mixed-voltage environments.

Supply support for MC74VHC1G09DBVT1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.

The MC74VHC1G09DBVT1G belongs to the VHC (Very High Speed CMOS) logic family, engineered for high-speed, low-power interfacing in mixed-voltage embedded systems requiring robustness against supply mismatch and hot-swap conditions.

FAQ

What is the maximum input voltage rating for MC74VHC1G09DBVT1G?

The MC74VHC1G09DBVT1G supports DC input voltages up to 5.5 V regardless of VCC level, as confirmed in the Absolute Maximum Ratings table. This overvoltage tolerance allows safe interfacing of 5 V signals into 3.3 V or 2.5 V systems without external clamping diodes or level shifters - a key advantage over standard LVC or AUP logic families.

Does MC74VHC1G09DBVT1G support partial power-down operation?

Yes, the MC74VHC1G09DBVT1G implements IOFF functionality: when VCC = 0 V, input leakage current is limited to ≤10 µA (max), preventing back-powering of upstream circuits. This behavior is explicitly verified in the DC Electrical Characteristics table under the IOFF parameter and is essential for hot-swap and power-gating applications.

What is the output configuration of MC74VHC1G09DBVT1G?

The MC74VHC1G09DBVT1G features an open-drain output (Pin 4, Y), meaning it can only sink current and requires an external pull-up resistor to define the high logic level. This configuration enables wired-AND bus topologies, I²C compatibility, and level translation - distinct from push-pull outputs found in standard AND gates like MC74VHC1G08.

Which package does MC74VHC1G09DBVT1G use, and what are its dimensions?

The MC74VHC1G09DBVT1G uses the SC-74A (SOT-23-5) package, measuring 3.00 mm × 1.50 mm × 0.95 mm with 0.95 mm lead pitch. This is confirmed in the Ordering Information table and Mechanical Case Outline diagram (Case 318BQ), distinguishing it from the SC-88A variant (MC74VHC1G09DFT1G/DFT2G).

What is the typical propagation delay of MC74VHC1G09DBVT1G at 3.3 V operation?

At VCC = 3.3 V and CL = 15 pF, the MC74VHC1G09DBVT1G exhibits tPZL/tPLZ = 6.2 ns (typ) and tPLZ/tPZL = 6.5 ns (typ), per the AC Electrical Characteristics table. These values are measured across the full industrial temperature range (−40 °C to +85 °C) and confirm consistent high-speed performance in 3.3 V embedded control applications.

MC74VHC1G09DBVT1G Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: 74VHC

Package/Case:: SC-74A, SOT-753

Packaging:: Tape & Reel (TR)

Product Status:: Active

Logic Type:: AND Gate

Number of Circuits:: 1

Number of Inputs:: 2

Features:: Open Drain

Voltage - Supply:: 2V ~ 5.5V

Current - Quiescent (Max):: 1 µA

Current - Output High, Low:: -, 8mA

Input Logic Level - Low:: 0.5V ~ 1.65V

Input Logic Level - High:: 1.5V ~ 3.85V

Max Propagation Delay @ V, Max CL:: 7.9ns @ 5V, 50pF

Operating Temperature:: -55°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: SC-74A

MC74VHC1G09DBVT1G FAQ

1.How can I place an order for MC74VHC1G09DBVT1G through Aetrix?

Please submit a Request for Quotation (RFQ) for MC74VHC1G09DBVT1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MC74VHC1G09DBVT1G reliable?

The price and inventory of MC74VHC1G09DBVT1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC74VHC1G09DBVT1G is usually 5 days.

3.What payment methods are accepted for MC74VHC1G09DBVT1G?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MC74VHC1G09DBVT1G transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MC74VHC1G09DBVT1G?

MC74VHC1G09DBVT1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MC74VHC1G09DBVT1G order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MC74VHC1G09DBVT1G?

For technical support, including MC74VHC1G09DBVT1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC74VHC1G09DBVT1G requirements.

6.How does Aetrix verify that MC74VHC1G09DBVT1G is sourced from the original manufacturer or authorized distributors?

All MC74VHC1G09DBVT1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC74VHC1G09DBVT1G meets industry standards.

7.What is the process for return or replacement of MC74VHC1G09DBVT1G?

All MC74VHC1G09DBVT1G units undergo pre-shipment inspection (PSI). If there is an issue with MC74VHC1G09DBVT1G, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MC74VHC1G09DBVT1G part is unused and in its original packaging.

Return procedure for MC74VHC1G09DBVT1G:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…