onsemi MC74VHC1GT126MU1TCG
- Part No.:
- MC74VHC1GT126MU1TCG
- Manufacturer:
- onsemi
- Package:
- 6-UFDFN
- Datasheet:
-
MC74VHC1GT126MU1TCG.pdf
- Description:
- IC BUFFER NON-INVERT 5.5V 6UDFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MC74VHC1GT126MU1TCG from onsemi is a single-channel noninverting 3-state buffer with TTL-level input thresholds, designed for level-shifting and bus isolation in mixed-voltage systems. It operates from 2.0 V to 5.5 V, delivers 3.5 ns typical propagation delay at 5 V, supports ±8 mA output drive at 3.0 V, and features overvoltage-tolerant inputs/outputs up to 5.5 V - enabling safe interfacing between 3 V and 5 V logic domains in portable instrumentation and industrial control I/O modules.
For engineers reviewing the MC74VHC1GT126MU1TCG datasheet, pinout, applications, or equivalent options, key selection criteria include its TTL-compatible VIH/VIL thresholds (1.4 V / 0.45 V at 3.0 V), IOFF partial power-down protection, UDFN6 (1.45 × 1.0 mm) package with exposed thermal pad, and guaranteed operation across −55 °C to +125 °C.
Technical Context
The MC74VHC1GT126MU1TCG implements a three-stage CMOS buffer architecture with a buffered 3-state output stage that ensures high noise immunity and stable signal integrity. Its input structure tolerates voltages up to 5.5 V independent of VCC, allowing robust 5 V-to-3 V bidirectional interfacing without external clamping diodes.
Output structures support operation with VCC = 0 V and tolerate output voltages exceeding VCC, preventing latch-up or damage during hot insertion, battery backup transitions, or supply sequencing mismatches. The device integrates IOFF circuitry that disables I/O leakage when VCC is unpowered, satisfying partial power-down requirements in multi-rail systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.0 V to 5.5 V - enables direct use in 2.5 V, 3.3 V, and 5 V systems without level translators. |
| tPD (typ) | 3.5 ns at VCC = 5 V, CL = 15 pF - supports high-speed data routing in compact timing-critical paths. |
| VIH / VIL | 1.4 V / 0.45 V at VCC = 3.0 V - TTL-compatible thresholds ensure reliable recognition of legacy 5 V logic outputs at 3 V supply. |
| IOUT | ±8 mA at VCC = 3.0 V - sufficient drive strength for fan-out to multiple CMOS loads or resistive pull-ups in sensor interface buses. |
| Input/Output Voltage Tolerance | Up to 5.5 V regardless of VCC - eliminates need for external overvoltage protection in mixed-supply interconnects. |
| IOFF Leakage | ≤10 µA at VCC = 0 V - prevents back-powering or signal corruption in powered-down subsystems. |
| Operating Temperature | −55 °C to +125 °C - qualified for under-hood automotive, industrial PLC, and aerospace edge-node applications. |
Pinout & Package
MC74VHC1GT126MU1TCG is housed in a 6-pin UDFN package (1.45 mm × 1.0 mm, 0.5 mm pitch) with wettable flank leads and an exposed thermal pad (Case 517AQ). This ultra-compact, low-profile package supports automated optical inspection (AOI) and provides enhanced thermal dissipation versus SC-88A or SOT-953 variants.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OE (Output Enable) | Active-high enable controlling 3-state output; drives Y high-impedance when low. |
| 2 | A (Input) | Noninverting data input with TTL-level thresholds and 5.5 V overvoltage tolerance. |
| 3 | GND | Ground reference for all internal circuitry and I/O structures. |
| 4 | Y (Output) | Buffered, 3-state noninverting output with ±8 mA drive and overvoltage-safe clamping. |
| 5 | NC | No internal connection - must be left floating or grounded per layout best practices. |
| 6 | VCC | Positive supply rail; powers internal logic and output stage; supports IOFF when at 0 V. |
Key Features
| Feature | Design Value |
|---|---|
| TTL-level input thresholds | VIH = 1.4 V, VIL = 0.45 V at 3.0 V - ensures compatibility with standard 5 V TTL outputs in 3 V systems. |
| Overvoltage-tolerant I/O | Inputs and outputs withstand 5.5 V regardless of VCC - enables safe 5 V ↔ 3 V interfacing without external components. |
| IOFF partial power-down | Leakage ≤10 µA when VCC = 0 V - prevents current backflow and maintains signal integrity in unpowered sections. |
| High noise immunity | Three-stage buffered output architecture - suppresses transients and improves signal fidelity in noisy industrial environments. |
| Wide temperature range | −55 °C to +125 °C operation - meets AEC-Q100 Grade 1 requirements for automotive body electronics and engine control modules. |
Applications
| Industrial Sensor Interface | Automotive Body Control Module |
|---|---|
|
Use Scenario: Isolating analog sensor ADC lines from microcontroller GPIOs while sharing a common 3.3 V rail and accommodating 5 V supply spikes. IC Role / Device Role / Timing Role: Noninverting 3-state buffer providing voltage-domain decoupling and bus contention prevention during ADC sampling bursts. Use Value: Overvoltage-tolerant I/O eliminates external TVS diodes; IOFF prevents sensor bias leakage when MCU enters deep sleep. |
Use Scenario: Driving LIN bus transceiver enable signals from a 3.3 V microcontroller in a 12 V vehicle electrical system with load-dump transients. IC Role / Device Role / Timing Role: Level-shifting buffer translating 3.3 V logic to 5 V-compatible enable inputs while surviving 5.5 V surges. Use Value: Guaranteed 5.5 V input tolerance and −55 °C to +125 °C operation ensure reliability during cold cranking and under-hood thermal cycling. |
| Portable Medical Instrumentation | Programmable Logic Controller I/O Expansion |
|
Use Scenario: Interfacing low-power 1.8 V/3.3 V FPGA I/O banks to legacy 5 V peripheral modules in handheld diagnostic devices. IC Role / Device Role / Timing Role: Bidirectional voltage translator enabling FPGA-controlled 5 V peripherals without dedicated level-shifters. Use Value: 3.5 ns tPD preserves timing margins in real-time data acquisition paths; UDFN6 footprint saves PCB area in space-constrained enclosures. |
Use Scenario: Adding isolated digital output channels to modular PLC backplanes where field-side 24 V logic coexists with 3.3 V controller logic. IC Role / Device Role / Timing Role: Output driver buffer isolating controller-side logic from field-side EMI and ground bounce. Use Value: High noise immunity and ±8 mA drive support direct connection to optocoupler inputs or relay drivers without buffering stages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar noninverting 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G126DBVR | CMOS-input thresholds (VIH = 2.1 V at 3.3 V); slightly higher ICC (max 10 µA vs 40 µA); same UDFN6 package. | Lacks TTL-level compatibility - unsuitable for interfacing legacy 5 V TTL sources at 3 V supply. | Select when interfacing modern 3.3 V CMOS logic only; avoid for mixed 5 V/3 V systems requiring TTL recognition. |
| 74LVC1G125GW,125 | Inverting function (A → Y̅); identical VCC range, drive strength, and UDFN6 footprint; same −55 °C to +125 °C rating. | Requires logic inversion in signal path - adds design complexity if noninverting behavior is mandatory. | Choose only if system-level logic allows inversion; otherwise, MC74VHC1GT126MU1TCG remains the functional match. |
Compared with SN74LVC1G126DBVR and 74LVC1G125GW,125, the MC74VHC1GT126MU1TCG uniquely delivers TTL-level input compatibility in a thermally enhanced UDFN6 package, making it the sole option for robust 5 V-to-3 V interfacing without redesigning signal polarity or adding external threshold translation.
Availability
MC74VHC1GT126MU1TCG is available at Aetrix Electronics and suitable for industrial sensor interface, automotive body control, portable medical instrumentation, and programmable logic controller I/O expansion requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for MC74VHC1GT126MU1TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The MC74VHC1GT126MU1TCG belongs to onsemi's VHC logic family, engineered for low-voltage, high-speed, mixed-signal interfacing in space-constrained and thermally demanding environments.
FAQ
What is the input voltage threshold behavior of the MC74VHC1GT126MU1TCG?
The MC74VHC1GT126MU1TCG features TTL-level input thresholds: VIH = 1.4 V and VIL = 0.45 V at VCC = 3.0 V. This allows reliable recognition of standard 5 V TTL logic levels when operating from a 3 V supply - a key differentiator from CMOS-threshold buffers like the SN74LVC1G126. These values are specified across −55 °C to +125 °C and do not scale with VCC.
Does the MC74VHC1GT126MU1TCG support partial power-down operation?
Yes, the MC74VHC1GT126MU1TCG includes IOFF circuitry that actively disables I/O leakage when VCC = 0 V. Measured IOFF leakage is ≤10 µA, preventing back-powering of upstream circuits or signal corruption in unpowered subsystems - critical for hot-swap and multi-rail power sequencing applications.
What package type and dimensions does the MC74VHC1GT126MU1TCG use?
The MC74VHC1GT126MU1TCG uses a UDFN6 package (Case 517AQ) measuring 1.45 mm × 1.0 mm with 0.5 mm pitch and an exposed thermal pad. Its wettable flank leads support automated optical inspection, and its 0.55 mm max height enables ultra-thin PCB designs in portable and automotive modules.
Can the MC74VHC1GT126MU1TCG safely interface 5 V and 3 V logic domains?
Yes - the MC74VHC1GT126MU1TCG has overvoltage-tolerant inputs and outputs rated to 5.5 V regardless of VCC. When VCC = 3.3 V, it accepts 5 V inputs without damage or clamping current, and drives 5 V-tolerant loads directly. This eliminates external level-shifting components in mixed-voltage signal paths.
What is the maximum operating temperature range for the MC74VHC1GT126MU1TCG?
The MC74VHC1GT126MU1TCG is fully specified from −55 °C to +125 °C ambient temperature. This wide range, combined with AEC-Q100 qualification (with −Q suffix variants), makes it suitable for under-hood automotive, industrial motor drives, and outdoor infrastructure equipment where thermal extremes are routine.
MC74VHC1GT126MU1TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74VHC
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 8mA, 8mA
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-UDFN (1.45x1)
MC74VHC1GT126MU1TCG FAQ
1.How can I place an order for MC74VHC1GT126MU1TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for MC74VHC1GT126MU1TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC74VHC1GT126MU1TCG reliable?
The price and inventory of MC74VHC1GT126MU1TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC74VHC1GT126MU1TCG is usually 5 days.
3.What payment methods are accepted for MC74VHC1GT126MU1TCG?
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4.How is shipping managed for MC74VHC1GT126MU1TCG?
MC74VHC1GT126MU1TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC74VHC1GT126MU1TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC74VHC1GT126MU1TCG?
For technical support, including MC74VHC1GT126MU1TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC74VHC1GT126MU1TCG requirements.
6.How does Aetrix verify that MC74VHC1GT126MU1TCG is sourced from the original manufacturer or authorized distributors?
All MC74VHC1GT126MU1TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC74VHC1GT126MU1TCG meets industry standards.
7.What is the process for return or replacement of MC74VHC1GT126MU1TCG?
All MC74VHC1GT126MU1TCG units undergo pre-shipment inspection (PSI). If there is an issue with MC74VHC1GT126MU1TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC74VHC1GT126MU1TCG part is unused and in its original packaging.
Return procedure for MC74VHC1GT126MU1TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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