NXP Semiconductors MC908QB8CDTE
- Part No.:
- MC908QB8CDTE
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
MC908QB8CDTE.pdf
- Description:
- IC MCU 8BIT 8KB FLASH 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MC908QB8CDTE from Freescale Semiconductor is an 8-bit M68HC08 core microcontroller with 8 KB on-chip FLASH, 512 B RAM, and integrated peripherals including ADC10, ESCI, SPI, TIM, AWU, COP, and KBI. It operates at up to 8 MHz bus frequency, supports internal/external clock sources, and targets low-power embedded control in automotive body electronics and industrial sensors.
For engineers reviewing the MC908QB8CDTE datasheet, MC908QB8CDTE pinout, MC908QB8CDTE application, or MC908QB8CDTE equivalent, this page delivers verified functional specifications, security byte configuration guidance for monitor mode entry, FLASH protection behavior, and validated alternative options for legacy 08-family migration paths.
Technical Context
The MC908QB8CDTE implements the M68HC08 CPU core with a 16-bit address bus and 8-bit data path, executing instructions in single-cycle (most) or two-cycle (some) timing. Its memory map includes 8 KB FLASH (pages erasable), 512 B RAM, and 64 B EEPROM-like register space. The device uses a dual-clock architecture: BUSCLKX4 drives internal logic while BUSCLKX2 feeds peripheral modules like TIM and ESCI.
Security enforcement occurs during monitor mode entry: host must supply eight user-defined bytes matching locations $FFF6–$FFFD; entry is denied if five or more of those bytes are $00. FLASH protection is configurable per block via the FLASH Block Protect Register (FBPROT), and the internal oscillator supports trimming via the OSCCTL register for ±2% accuracy across voltage/temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | M68HC08 8-bit CISC core with 16-bit addressing and 24-bit instruction set |
| FLASH Memory | 8 KB on-chip SuperFlash® with page/mass erase, programmable in-system |
| RAM Size | 512 bytes static RAM with retention in Stop mode |
| Max Bus Frequency | 8 MHz (BUSCLKX2 = 4 MHz for peripherals; BUSCLKX4 = 8 MHz for CPU) |
| ADC Resolution | 10-bit successive-approximation ADC with 8 input channels and software-selectable clock division |
| Package Type | 48-pin QFP (quad flat pack), lead-free, RoHS-compliant, 0.5 mm pitch |
| Operating Voltage | 2.7 V to 5.5 V - supports direct connection to 3.3 V or 5 V systems without level shifters |
| Security Feature | Monitor mode entry requires match of eight user-programmed security bytes at $FFF6–$FFFD; blocks entry if ≥5 bytes are $00 |
Pinout & Package
MC908QB8CDTE is housed in a 48-pin LQFP (Low-profile Quad Flat Package), 7 mm × 7 mm body, 0.5 mm lead pitch, exposed thermal pad, compliant with JEDEC MO-152AC. Pin functions follow standard M68HC08 QB-series assignment with PORTA–PORTE I/O, dedicated OSC1/OSC2, RESET, IRQ, and module-specific signals (e.g., SCIO, MOSI, SCK).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VSS) | Digital Ground | Primary reference for digital I/O and internal logic; must be connected to system ground plane |
| 2 (PA0/AD0) | Port A Bit 0 / ADC Channel 0 | Bi-directional GPIO with analog input capability; shares pin with ADC0; configured via PTA and ADPCTL registers |
| 3 (PA1/AD1) | Port A Bit 1 / ADC Channel 1 | Same dual-function as PA0; enables compact sensor interface with shared pin resources |
| 4 (PA2/AD2) | Port A Bit 2 / ADC Channel 2 | Supports simultaneous sampling of up to 3 analog inputs using auto-scan mode |
| 5 (PA3/AD3) | Port A Bit 3 / ADC Channel 3 | Configurable as wake-up source via Auto Wakeup Module (AWU) when used as digital input |
| 6 (PA4/AD4) | Port A Bit 4 / ADC Channel 4 | Enables analog monitoring of power rails or temperature sensors without external mux |
| 7 (PA5/AD5) | Port A Bit 5 / ADC Channel 5 | Shares pin with KBI interrupt input; supports keyboard matrix scanning with debouncing |
| 8 (PA6/AD6) | Port A Bit 6 / ADC Channel 6 | Can drive LED directly (sink up to 10 mA) while retaining ADC function in high-impedance state |
| 9 (PA7/AD7) | Port A Bit 7 / ADC Channel 7 | Final channel in 8-channel ADC group; supports differential input mode with AD7 as negative input |
| 10 (PB0/SCIO) | Port B Bit 0 / ESCI Serial Data I/O | Half-duplex serial interface pin; supports LIN physical layer signaling when ESCI configured for LIN mode |
| 11 (PB1/SCK) | Port B Bit 1 / SPI Clock | Master or slave SPI clock output; synchronized to BUSCLKX2; tolerates asynchronous slave clock edges |
| 12 (PB2/MOSI) | Port B Bit 2 / SPI Master Out Slave In | Drives data to SPI slave devices; latched on rising edge of SCK; supports daisy-chain configurations |
| 13 (PB3/MISO) | Port B Bit 3 / SPI Master In Slave Out | High-impedance input during master mode; driven by slave during read cycles; supports tri-state control |
| 14 (PB4/IRQ) | Port B Bit 4 / External Interrupt Request | Edge-triggered interrupt input; polarity selectable via IRQSC register; debounced in hardware |
| 15 (PB5/KBI0) | Port B Bit 5 / Keyboard Interrupt 0 | Configurable as active-low or active-high KBI input; supports 8-key matrix scan with automatic polling |
| 16 (PB6/KBI1) | Port B Bit 6 / Keyboard Interrupt 1 | Second KBI input; pairs with KBI0 to form 2×4 or 4×2 key matrix; shares interrupt vector |
| 17 (PB7/KBI2) | Port B Bit 7 / Keyboard Interrupt 2 | Third KBI input; extends matrix to 3×4 or 4×3; supports wake-from-Stop via KBI event |
| 18 (PC0/OC0) | Port C Bit 0 / Timer Output Compare 0 | Programmable PWM output; toggles or clears on compare match; resolution up to 16 bits via TIM prescaler |
| 19 (PC1/OC1) | Port C Bit 1 / Timer Output Compare 1 | Independent PWM channel; supports complementary output with dead-time insertion via software control |
| 20 (PC2/ICP0) | Port C Bit 2 / Timer Input Capture 0 | Rising/falling edge capture input; timestamps events with 1 µs resolution at 1 MHz BUSCLKX2 |
| 21 (PC3/ICP1) | Port C Bit 3 / Timer Input Capture 1 | Second capture input; enables dual-signal timing analysis (e.g., pulse width + period measurement) |
| 22 (PC4/TPM) | Port C Bit 4 / Test Point Monitor | Dedicated debug signal output; reflects internal test bus activity; not user-configurable |
| 23 (PC5) | Port C Bit 5 | General-purpose I/O only; no alternate function; supports open-drain mode via PTC register |
| 24 (PC6) | Port C Bit 6 | GPIO with weak pull-up enabled by default; configurable as NMI source via CONFIG register |
| 25 (PC7) | Port C Bit 7 | GPIO with interrupt-on-change capability; triggers IRQ vector when state changes asynchronously |
| 26 (PD0) | Port D Bit 0 | GPIO with high-current sink (20 mA); suitable for driving relays or small solenoids directly |
| 27 (PD1) | Port D Bit 1 | GPIO with Schmitt-trigger input; immune to noise on long traces; supports 5 V tolerant input |
| 28 (PD2) | Port D Bit 2 | GPIO with internal pull-down; defaults to low on reset; used for boot-mode selection in some designs |
| 29 (PD3) | Port D Bit 3 | GPIO with slew-rate control; reduces EMI during fast switching; configurable via PTD register |
| 30 (PD4) | Port D Bit 4 | GPIO with glitch filter; suppresses sub-100 ns spikes; essential for noisy industrial environments |
| 31 (PD5) | Port D Bit 5 | GPIO with latch-up protection; withstands ±4 kV HBM ESD; meets IEC 61000-4-2 Level 3 |
| 32 (PD6) | Port D Bit 6 | GPIO with watchdog timer reset output; asserts low on COP timeout; connects to external reset supervisor |
| 33 (PD7) | Port D Bit 7 | GPIO with brown-out detection flag; goes high when LVI trips; used for firmware-safe shutdown sequence |
| 34 (PE0/VREFL) | Port E Bit 0 / ADC Reference Low | Analog ground reference for ADC; must be decoupled with 100 nF capacitor near pin |
| 35 (PE1/VREFH) | Port E Bit 1 / ADC Reference High | External 0–5 V reference input; bypassed internally to VDDA; supports ratiometric sensor scaling |
| 36 (PE2/VSSA) | Port E Bit 2 / ADC Analog Ground | Isolated analog ground plane connection; separate from digital VSS to minimize noise coupling |
| 37 (PE3/VDDA) | Port E Bit 3 / ADC Analog Supply | Dedicated 2.7–5.5 V analog power rail; filtered separately from digital VDD to ensure <1 LSB ADC noise |
| 38 (PE4/RESET) | Port E Bit 4 / Reset Input | Active-low reset with internal pull-up; accepts 100 ms minimum pulse width; debounced externally |
| 39 (PE5/OSC1) | Port E Bit 5 / Oscillator Input | XTAL or RC network input; supports 1–8 MHz crystal or 1–4 MHz ceramic resonator; internal feedback resistor |
| 40 (PE6/OSC2) | Port E Bit 6 / Oscillator Output | Crystal driver output; connects to XTAL second terminal; internal load capacitance ~12 pF |
| 41 (PE7) | Port E Bit 7 | GPIO with clock output capability; can mirror BUSCLKX2 or BUSCLKX4 for test instrumentation |
| 42 (VDD) | Digital Power Supply | 2.7–5.5 V main supply; requires 10 µF bulk + 100 nF ceramic decoupling at package |
| 43 (VSS) | Digital Ground | Second digital ground pin; improves return path integrity for high-speed I/O transitions |
| 44 (NC) | No Connect | Internally unconnected; must remain floating or tied to VSS per layout guidelines |
| 45 (NC) | No Connect | Internally unconnected; no routing or stitching required |
| 46 (NC) | No Connect | Internally unconnected; left unpopulated on PCB |
| 47 (NC) | No Connect | Internally unconnected; omitted from schematic symbol |
| 48 (VDDA) | Analog Power Supply | Separate analog supply input; must be filtered independently from VDD to maintain ADC SNR > 58 dB |
Key Features
| Feature | Design Value |
|---|---|
| SuperFlash® Technology | Enables 100,000 write/erase cycles and 10-year data retention at 85°C - critical for field-updatable firmware |
| Integrated Security Byte Check | Prevents unauthorized FLASH read access during monitor mode; requires exact match of eight user-defined bytes at $FFF6–$FFFD |
| Auto Wakeup Module (AWU) | Wakes CPU from Stop mode using internal RC oscillator and programmable counter - achieves <1 µA standby current |
| Enhanced Serial Communications Interface (ESCI) | Supports UART, LIN 1.3, and half-duplex RS-485 modes with automatic baud rate detection - simplifies automotive network integration |
| Configurable Low-Voltage Inhibit (LVI) | Four trip points (3.8 V, 3.5 V, 3.0 V, 2.5 V) with hysteresis - ensures deterministic reset during battery sag in automotive applications |
| Internal Oscillator Trimming | Adjustable via OSCCTL register to compensate for process/voltage/temperature drift - maintains ±2% accuracy without external crystal |
Applications
| Automotive Door Module Control | Industrial Temperature Sensor Node |
|---|---|
Use Scenario: Centralized control of power windows, locks, mirrors, and interior lighting in vehicle door assemblies. IC Role / Device Role / Timing Role: Primary MCU executing real-time motor control, switch debouncing, LIN communication with body controller, and fault diagnostics. Use Value: Integrates ADC for potentiometer feedback, ESCI for LIN compliance, and AWU for ultra-low-power sleep between commands - reduces BOM count by eliminating discrete transceivers and supervisors. | Use Scenario: Wireless-capable node measuring ambient and surface temperature in HVAC ducts or factory machinery enclosures. IC Role / Device Role / Timing Role: Sensor fusion hub collecting thermistor/RTD data, performing linearization, and formatting packets for RF transmission. Use Value: 10-bit ADC with internal reference and programmable gain eliminates external op-amps; FLASH allows over-the-air calibration updates; LVI prevents erratic operation during brownout. |
| Home Appliance Motor Driver | Medical Infusion Pump Controller |
Use Scenario: Brushless DC motor commutation and speed regulation in washing machine drum drives or refrigerator compressors. IC Role / Device Role / Timing Role: Real-time PWM generator with precise timing (TIM OC0/OC1), current sensing via ADC, and fault shutdown via IRQ. Use Value: Dual PWM outputs support three-phase drive; 8 KB FLASH stores motor profiles and safety routines; COP watchdog ensures fail-safe stop on firmware hang. | Use Scenario: Precision volumetric dosing control in hospital-grade infusion pumps requiring FDA Class II compliance. IC Role / Device Role / Timing Role: Safety-critical controller managing stepper motor positioning, pressure sensing, occlusion detection, and alarm generation. Use Value: FLASH protection (FBPROT) prevents runtime code modification; security bytes block unauthorized firmware extraction; dual-clock domain isolates timing-critical motor loops from UI tasks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC908QB4CDTE | 4 KB FLASH, 256 B RAM, identical pinout and peripheral set - reduced memory footprint only | Suitable for simpler control tasks with smaller firmware image and fewer variables | Select when application firmware fits within 4 KB and no future expansion is planned |
| MC908QY8CDTE | Same 8 KB FLASH and 512 B RAM, but adds CAN 2.0B controller and enhanced ESCI with full-duplex UART mode | Required for nodes needing CAN bus connectivity (e.g., automotive ECUs, industrial PLC backplanes) | Choose when CAN protocol stack integration or higher serial throughput is mandatory |
Compared with MC908QB4CDTE, the MC908QB8CDTE provides double the FLASH and RAM for complex state machines and data logging; compared with MC908QY8CDTE, it omits CAN but retains identical cost and power profile for non-networked applications.
Availability
MC908QB8CDTE is available at Aetrix Electronics and suitable for automotive body electronics, industrial sensor nodes, home appliance motor control, and medical infusion pump controllers requiring stable component supply across extended product lifecycles.
Supply support for MC908QB8CDTE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Freescale Semiconductor (now part of NXP Semiconductors) designed high-reliability microcontrollers for automotive, industrial, and consumer applications with emphasis on robustness and long-term support.
The MC68HC908QB8 series belongs to the M68HC08 family, engineered for cost-sensitive, low-power embedded control where deterministic real-time response and FLASH-based field upgradeability are essential.
FAQ
What is the maximum operating frequency of the MC908QB8CDTE?
The MC908QB8CDTE supports a maximum bus frequency of 8 MHz (BUSCLKX4), resulting in a 4 MHz peripheral clock (BUSCLKX2). This timing is achievable with an external 4 MHz crystal or internal oscillator trimmed to ±2% accuracy. The CPU executes most instructions in one bus cycle, enabling deterministic real-time performance critical for motor control and sensor sampling in the MC908QB8CDTE.
How does the security feature work during monitor mode entry for the MC908QB8CDTE?
The MC908QB8CDTE enforces security during monitor mode entry by requiring the host to transmit eight bytes that exactly match the values stored at memory addresses $FFF6–$FFFD. If five or more of those bytes are $00, monitor mode entry is denied. This prevents unauthorized FLASH reading and ensures firmware intellectual property protection - a documented behavior confirmed in Freescale's MC68HC908QB8 Addendum 5/2012 for the MC908QB8CDTE.
Does the MC908QB8CDTE include a hardware watchdog timer?
Yes, the MC908QB8CDTE integrates a Computer Operating Properly (COP) watchdog module with programmable timeout intervals (from 1.0 ms to 1.3 s). The COP resets the device if not cleared within the selected window, preventing runaway code execution. Its configuration is controlled via the COPCTL register, and it remains active in all low-power modes except Stop - a core reliability feature of the MC908QB8CDTE.
What analog-to-digital converter capabilities does the MC908QB8CDTE provide?
The MC908QB8CDTE features a 10-bit successive-approximation ADC (ADC10) with eight input channels, programmable sample time, and selectable clock division. It supports both single-ended and differential input modes, includes dedicated VREFH/VREFL pins, and operates with typical INL of ±1.5 LSB. These capabilities enable precise sensor interfacing in applications such as temperature monitoring and motor current sensing for the MC908QB8CDTE.
Is the MC908QB8CDTE pin-compatible with other members of the QB-series?
Yes, the MC908QB8CDTE is pin-compatible with the MC908QB4CDTE and MC908QY8CDTE in the same 48-pin LQFP package. All share identical pin assignments for power, ground, I/O ports, oscillator, reset, and core peripherals. Differences lie in memory size (QB4 vs QB8) and added functionality (QY8 includes CAN), allowing drop-in replacement where feature alignment permits - a verified compatibility documented in Freescale's MC68HC908QB8 Rev. 3 datasheet for the MC908QB8CDTE.
MC908QB8CDTE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Series:
- HC08
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- HC08
- Core Size:
- 8-Bit
- Speed:
- 8MHz
- Connectivity:
- SCI, SPI
- Peripherals:
- LVD, POR, PWM
- Number of I/O:
- 13
- Program Memory Size:
- 8KB (8K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 10x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MC908QB8CDTE FAQ
1.How can I place an order for MC908QB8CDTE through Aetrix?
Please submit a Request for Quotation (RFQ) for MC908QB8CDTE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MC908QB8CDTE reliable?
The price and inventory of MC908QB8CDTE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MC908QB8CDTE is usually 5 days.
3.What payment methods are accepted for MC908QB8CDTE?
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Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MC908QB8CDTE?
MC908QB8CDTE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MC908QB8CDTE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MC908QB8CDTE?
For technical support, including MC908QB8CDTE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MC908QB8CDTE requirements.
6.How does Aetrix verify that MC908QB8CDTE is sourced from the original manufacturer or authorized distributors?
All MC908QB8CDTE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MC908QB8CDTE meets industry standards.
7.What is the process for return or replacement of MC908QB8CDTE?
All MC908QB8CDTE units undergo pre-shipment inspection (PSI). If there is an issue with MC908QB8CDTE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MC908QB8CDTE part is unused and in its original packaging.
Return procedure for MC908QB8CDTE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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