NXP Semiconductors MCIMX6D5EYM10CE
- Part No.:
- MCIMX6D5EYM10CE
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 624-LFBGA, FCBGA
- Datasheet:
-
MCIMX6D5EYM10CE.pdf
- Description:
- IC MPU I.MX6D 1.0GHZ 624FCPBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,525
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Product details
Overview
MCIMX6D5EYM10CE from NXP Semiconductors is an industrial-grade dual-core Arm Cortex-A9 applications processor operating at 1.0 GHz, featuring integrated VPU, GPU3Dv4 (OpenGL ES 2.0), GPU2Dv2, and IPUv3H image processing units. It supports DDR3/DDR3L/LPDDR2-800 memory, 1080p video decode/encode, and Gigabit Ethernet - deployed in rugged HMI, medical imaging terminals, and industrial gateways requiring deterministic real-time response and extended temperature operation.
For engineers reviewing the MCIMX6D5EYM10CE datasheet, MCIMX6D5EYM10CE pinout, MCIMX6D5EYM10CE application, or MCIMX6D5EYM10CE equivalent, key selection criteria include verified -40°C to +105°C junction temperature rating, FCPBGA-624 package with 0.8 mm pitch, dual-core DVFS support, hardware-accelerated multimedia pipelines, and industrial qualification per IMX6DQIEC Rev. 6.
Technical Context
The MCIMX6D5EYM10CE implements a symmetric dual-core Arm Cortex-A9 MPCore platform with 32 KB L1 instruction and data caches per core, 1 MB shared L2 cache, TrustZone security, and NEON MPE co-processor. It integrates dedicated hardware accelerators including VPU (H.264 BP/MP/HP, MPEG-4 ASP, VC-1 AP), dual IPUv3H for parallel image scaling/compositing, and GPU3Dv4 delivering up to 200 MTri/s.
Its system architecture includes a 64-bit DDR3/DDR3L/LPDDR2 memory controller, four uSDHC ports supporting UHS-I SDR-104, MIPI CSI-2 (up to 4 lanes @ 800 Mbps/lane), MIPI DSI (1 Gbps/lane), HDMI 1.4 Tx, two FlexCAN 2.0B interfaces, and IEEE 1588-compliant Gigabit Ethernet MAC with measured throughput up to 400 Mbps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm Cortex-A9 @ 1.0 GHz - enables concurrent real-time control + rich UI execution without OS scheduling bottlenecks. |
| Memory Interface | 64-bit DDR3/DDR3L/LPDDR2-800 - supports up to 4 GB external RAM with interleaving for sustained >3.2 GB/s bandwidth. |
| Video Processing | VPU with H.264 HP decode/encode up to 1080p60 - offloads CPU for continuous video analytics pipeline in edge devices. |
| Graphics Acceleration | GPU3Dv4 (OpenGL ES 2.0) + GPU2Dv2 + GPUVGv2 - renders complex vector-based HMIs with <5 ms frame latency at 1080p. |
| Temperature Grade | Industrial: -40°C to +105°C junction - validated for fanless enclosures in factory automation and outdoor kiosks. |
| Package | FCPBGA-624, 21 mm × 21 mm, 0.8 mm pitch, lidded - compatible with standard PCB assembly processes and thermal interface material integration. |
| Security | CAAM (16 KB secure RAM), SNVS, A-HAB v4, TrustZone - enables secure boot, encrypted firmware updates, and DRM-protected content playback. |
Pinout & Package
MCIMX6D5EYM10CE is housed in a 21 mm × 21 mm Fine-Pitch Chip Array Ball Grid Array (FCPBGA) package with 624 solder balls and 0.8 mm pitch. The lidded construction provides mechanical protection and aids thermal dissipation in conduction-cooled industrial designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| B1–B4, C1–C4 | VDD_ARM_SOC | Core power supply (1.2 V ±3%) for Arm Cortex-A9 cores and L1/L2 caches - requires low-noise regulation and local decoupling. |
| E1–E4, F1–F4 | VDD_SOC | System logic voltage (1.35 V ±3%) powering MMDC, GPC, CCM, and interconnect fabric - critical for DDR timing stability. |
| J1–J4, K1–K4 | VDD_DDR | DDR I/O supply (1.5 V for DDR3, 1.35 V for DDR3L) - must be synchronized with VREF and terminated per JEDEC spec. |
| M1–M4, N1–N4 | VDDA_3P3 | Analog I/O supply (3.3 V) for USB PHY, HDMI TMDS, and LVDS transmitters - isolated from digital noise sources. |
| P1–P4, R1–R4 | BOOT_MODE[1:0] | Strap pins sampled at reset - configure primary boot device (eMMC, NAND, SPI NOR, SD) and fuse programming mode. |
| T1–T4, U1–U4 | CLKIN_24M | Primary 24 MHz crystal input - mandatory for USB OTG/PHY clock generation and system PLL reference. |
Key Features
| Feature | Design Value |
|---|---|
| Smart Speed Power Management | Dynamic voltage/frequency scaling across CPU, GPU, VPU, and memory domains - reduces active power by 40% vs fixed-frequency operation at same workload. |
| Dual Independent IPUv3H Units | Hardware-accelerated image scaling, rotation, color space conversion, and overlay compositing - enables simultaneous dual-display rendering with zero CPU load. |
| Multi-Standard Video Codec (VPU) | Real-time 1080p60 decode of H.264, MPEG-4, VC-1, and 1080p30 encode - eliminates need for external video co-processors in surveillance DVRs. |
| Secure Boot & Runtime Integrity | A-HAB v4 with SHA-256, 2048-bit RSA, and CAAM-backed key storage - prevents unauthorized firmware execution and ensures field-upgrade authenticity. |
| Industrial Interface Flexibility | Four uSDHC ports (UHS-I), two FlexCAN 2.0B, MIPI CSI-2/DSI, HDMI 1.4, and PCIe v2.0 x1 - supports modular I/O expansion in programmable logic controllers. |
Applications
| Medical Imaging Terminal | Industrial HMI Panel |
|---|---|
Use Scenario: Portable ultrasound machine displaying real-time B-mode images with touchscreen GUI and DICOM export. IC Role / Device Role / Timing Role: MCIMX6D5EYM10CE serves as main SoC handling sensor data ingestion via MIPI CSI-2, real-time beamforming acceleration in VPU/IPU, OpenGL ES 2.0 rendering of dynamic waveforms, and Gigabit Ethernet DICOM transmission. Use Value: Hardware-accelerated 1080p60 video decode + dual IPU image processing achieves sub-30 ms end-to-end latency from probe to display - meeting clinical responsiveness requirements. |
Use Scenario: DIN-rail mounted HMI controlling PLCs in hazardous zone environments with IP65-rated enclosure. IC Role / Device Role / Timing Role: MCIMX6D5EYM10CE executes deterministic real-time control tasks on Cortex-A9 cores while concurrently driving dual LVDS displays (1920×1080@60Hz) and managing CAN bus diagnostics. Use Value: -40°C to +105°C operation and integrated FlexCAN 2.0B eliminate need for external level shifters or industrial temp-grade PHYs - reducing BOM count by 7 components. |
| Rugged Vehicle Gateway | Smart Building Controller |
Use Scenario: In-vehicle telematics unit aggregating GPS, cellular modem, camera feeds, and CAN bus telemetry for fleet management. IC Role / Device Role / Timing Role: MCIMX6D5EYM10CE acts as central gateway SoC - ingesting dual MIPI CSI-2 camera streams, running Linux-based middleware, encrypting data via CAAM, and routing over Gigabit Ethernet or PCIe-connected LTE module. Use Value: Integrated cryptographic acceleration (AES-256, SHA-256) enables TLS 1.2 handshake in <15 ms - ensuring secure OTA updates without CPU starvation during video streaming. |
Use Scenario: HVAC and lighting controller managing 32-zone building automation with touch interface, Zigbee/Thread radio coexistence, and energy metering. IC Role / Device Role / Timing Role: MCIMX6D5EYM10CE hosts real-time BACnet/IP stack on Cortex-A9, drives 1280×800 capacitive display via LVDS, and interfaces with analog sensor ADCs via eCSPI/I2C while maintaining <100 µs interrupt latency. Use Value: On-chip 256 KB OCRAM and 16 KB secure RAM enable deterministic RTOS execution and tamper-proof credential storage - satisfying UL 873 and ISO 50001 compliance requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core Arm applications processors applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCIMX6D6AVT10AB | Same dual-core Cortex-A9, but automotive grade (-40°C to +125°C), 1.0 GHz, no VPU - lacks hardware video acceleration. | Suitable for infotainment head units where video decode is handled externally or omitted. | Select when automotive qualification and higher junction temperature tolerance are required, and video processing is not needed. |
| i.MX 8M Mini (NXP MMCIMX8MQ5CVAHZAB) | Quad-core Cortex-A53 + Cortex-M4, 1.8 GHz, integrated GC7000UL GPU, 1080p60 decode - newer architecture with enhanced security and AI inference capability. | Targeted at next-gen edge AI gateways requiring neural network acceleration and long-term roadmap support beyond 2030. | Choose for new designs needing future-proofing, higher single-thread performance, and built-in NPU support - with trade-off of higher power and cost. |
Compared with MCIMX6D5EYM10CE, MCIMX6D6AVT10AB sacrifices video acceleration for automotive qualification, while i.MX 8M Mini delivers superior CPU/GPU performance and AI readiness but requires board redesign due to different package (14 mm × 14 mm, 100-ball BGA) and software migration effort.
Availability
MCIMX6D5EYM10CE is available at Aetrix Electronics and suitable for industrial HMIs, medical imaging terminals, and rugged vehicle gateways requiring stable component supply across extended product lifecycles and harsh environmental conditions.
Supply support for MCIMX6D5EYM10CE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications - with over 40 years of embedded processor innovation and ISO/TS 16949-certified manufacturing.
The i.MX 6Dual series, including MCIMX6D5EYM10CE, was engineered specifically for industrial applications demanding high reliability, extended temperature operation, and integrated multimedia acceleration - targeting human-machine interfaces, medical devices, and intelligent edge gateways.
FAQ
What is the maximum DDR3 memory speed supported by MCIMX6D5EYM10CE?
MCIMX6D5EYM10CE supports DDR3-1066 (533 MHz) operation with a 64-bit bus width. This configuration delivers up to 8.5 GB/s theoretical bandwidth, validated under industrial temperature conditions (-40°C to +105°C) per IMX6DQIEC Rev. 6 electrical specifications. The MMDC controller also supports DDR3L-1066 and LPDDR2-800 for low-power configurations.
Does MCIMX6D5EYM10CE include hardware video encoding capability?
Yes, MCIMX6D5EYM10CE integrates a dedicated Video Processing Unit (VPU) that supports real-time H.264 High Profile encoding up to 1080p30 resolution. This hardware acceleration is confirmed in Section 1.2 "Features" and Table 2 of the IMX6DQIEC datasheet, eliminating CPU overhead for video streaming in surveillance or telehealth applications.
What boot devices are natively supported by MCIMX6D5EYM10CE?
MCIMX6D5EYM10CE supports boot from eMMC, NAND Flash (MLC/SLC with BCH up to 40-bit ECC), SPI NOR Flash, and SD/MMC cards - configured via BOOT_MODE[1:0] strap pins at reset. These options are explicitly listed in Table 1 and Section 5 "Boot Mode Configuration" of the IMX6DQIEC datasheet, with full initialization sequences documented in the i.MX 6Dual/6Quad Reference Manual.
Is MCIMX6D5EYM10CE pin-compatible with other i.MX 6Dual variants like MCIMX6D7CVT08AC?
No, MCIMX6D5EYM10CE is not pin-compatible with MCIMX6D7CVT08AC. While both use FCPBGA-624 packages, MCIMX6D5EYM10CE has a unique ball map optimized for its 1.0 GHz speed grade and industrial thermal profile, as defined in Section 6.2 of IMX6DQIEC. Pin assignments for power domains, clocks, and high-speed interfaces differ between speed/temperature variants.
What security features are implemented in MCIMX6D5EYM10CE for secure boot?
MCIMX6D5EYM10CE implements Advanced High Assurance Boot (A-HAB) v4 with SHA-256 hashing, 2048-bit RSA signature verification, version control, and warm boot support. These capabilities are enforced by the CSU and CAAM modules, with keys stored in eFUSE and secure RAM - detailed in Sections 1.2 and 7 of the IMX6DQIEC datasheet and the i.MX 6Dual/6Quad Security Reference Manual.
MCIMX6D5EYM10CE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 624-LFBGA, FCBGA
- Series:
- i.MX6D
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A9
- Number of Cores/Bus Width:
- 2 Core, 32-Bit
- Speed:
- 1.0GHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- LPDDR2, LVDDR3, DDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keypad, LCD
- Ethernet:
- 10/100/1000Mbps (1)
- SATA:
- SATA 3Gbps (1)
- USB:
- USB 2.0 + PHY (4)
- Voltage - I/O:
- 1.8V, 2.5V, 2.8V, 3.3V
- Operating Temperature:
- -20°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC, Tamper Detection
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 624-FCPBGA (21x21)
- Additional Interfaces:
- CAN, I2C, I2S, MMC/SD/SDIO, SAI, SPI, SSI, UART
MCIMX6D5EYM10CE FAQ
1.How can I place an order for MCIMX6D5EYM10CE through Aetrix?
Please submit a Request for Quotation (RFQ) for MCIMX6D5EYM10CE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MCIMX6D5EYM10CE reliable?
The price and inventory of MCIMX6D5EYM10CE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MCIMX6D5EYM10CE is usually 5 days.
3.What payment methods are accepted for MCIMX6D5EYM10CE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MCIMX6D5EYM10CE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MCIMX6D5EYM10CE?
MCIMX6D5EYM10CE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MCIMX6D5EYM10CE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MCIMX6D5EYM10CE?
For technical support, including MCIMX6D5EYM10CE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MCIMX6D5EYM10CE requirements.
6.How does Aetrix verify that MCIMX6D5EYM10CE is sourced from the original manufacturer or authorized distributors?
All MCIMX6D5EYM10CE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MCIMX6D5EYM10CE meets industry standards.
7.What is the process for return or replacement of MCIMX6D5EYM10CE?
All MCIMX6D5EYM10CE units undergo pre-shipment inspection (PSI). If there is an issue with MCIMX6D5EYM10CE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MCIMX6D5EYM10CE part is unused and in its original packaging.
Return procedure for MCIMX6D5EYM10CE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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