NXP Semiconductors MCIMX6Q5EYM10ACR
- Part No.:
- MCIMX6Q5EYM10ACR
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 624-LFBGA, FCBGA
- Datasheet:
-
MCIMX6Q5EYM10ACR.pdf
- Description:
- IC MPU I.MX6Q 1.0GHZ 624FCPBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,235
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Product details
Overview
MCIMX6Q5EYM10ACR from NXP Semiconductors is an industrial-grade quad-core Arm Cortex-A9 applications processor operating at 1.0 GHz, featuring integrated VPU, GPU3Dv4 (OpenGL ES 2.0), GPU2Dv2, and IPUv3H for 1080p video decode/encode and dual-display support. It integrates a 64-bit DDR3/DDR3L/LPDDR2-800 memory controller, Gigabit Ethernet, dual CAN, MIPI CSI-2/DSI, HDMI 1.4, and hardware security modules (CAAM, SNVS, TrustZone) - deployed in rugged HMI, industrial gateways, and medical imaging systems.
For engineers reviewing the MCIMX6Q5EYM10ACR datasheet, MCIMX6Q5EYM10ACR pinout, MCIMX6Q5EYM10ACR application, or MCIMX6Q5EYM10ACR equivalent, key selection criteria include confirmed 1.0 GHz core speed under industrial temperature (−40°C to +105°C), FCPBGA-624 package with 0.8 mm pitch, verified 1 MB shared L2 cache, and documented support for eMMC 4.41, NAND with 40-bit BCH ECC, and IEEE 1588-compliant ENET.
Technical Context
The MCIMX6Q5EYM10ACR implements a symmetric quad-core Arm Cortex-A9 MPCore platform with TrustZone, each core including 32 KB L1 instruction and data caches, private timers, and NEON MPE co-processors. The SoC integrates a unified 1 MB L2 cache, SCU, GIC supporting 128 interrupts, and dual 64-bit AXI master interfaces.
Its multimedia subsystem includes dedicated hardware accelerators: VPU for H.264/VC-1/MPEG-4 decode/encode up to 1080p60, dual IPUv3H for image scaling/composition, GPU3Dv4 delivering up to 200 MTri/s, GPU2Dv2 for BitBLT operations, and GPUVGv2 for OpenVG 1.1 vector graphics - all operating independently of CPU cores to reduce system latency and power.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Quad-core Arm Cortex-A9 r2p10 with TrustZone, NEON MPE, and 1 MB shared L2 cache - enables concurrent real-time OS tasks and secure domain isolation. |
| Max Core Frequency | 1.0 GHz (confirmed for industrial grade with 24 MHz crystal input per IMX6DQIEC Rev. 6, Sec. 1.1 Table 1 footnote 3) - supports deterministic high-throughput processing in extended temperature range. |
| Memory Interface | 64-bit DDR3/DDR3L/LPDDR2-800 controller with interleaving support - delivers ≥6.4 GB/s theoretical bandwidth for multi-stream video buffering and UI rendering. |
| Video Acceleration | VPU supporting H.264 BP/MP/HP, VC-1 AP, MPEG-4 ASP decode/encode up to 1080p60 - offloads 100% of full-HD video pipeline from CPU, reducing active power by >40% vs. software-only implementation. |
| Security Modules | CAAM (16 KB secure RAM, NIST-certified DRBG/SHS), SNVS with SRTC, CSU, and A-HABv4 (SHA-256, 2048-bit RSA) - enables secure boot, encrypted firmware updates, and DRM-compliant content playback. |
| Industrial Temp Range | −40°C to +105°C junction temperature (confirmed by "C" suffix in part number nomenclature and IMX6DQIEC coverage per Fig. 1) - qualified for deployment in uncooled factory automation and outdoor edge infrastructure. |
| Package | FCPBGA-624, 21 mm × 21 mm, 0.8 mm pitch, lidded (per Package Information section and Table 1) - compatible with standard industrial PCB assembly processes and thermal interface material integration. |
Pinout & Package
MCIMX6Q5EYM10ACR is housed in a 21 mm × 21 mm FCBGA package with 624 solder balls and 0.8 mm pitch. Pin assignments follow the standardized i.MX 6 series signal naming convention (EB792), with functional contact mapping defined in Section 6 of IMX6DQIEC Rev. 6.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK_24M_IN | Oscillator Input | Mandatory 24 MHz crystal reference for USB PHY and system clock generation; deviation >±50 ppm invalidates USB compliance. |
| VDD_ARM | Core Power Supply | 1.2 V ±3% supply for Arm Cortex-A9 cores and L1/L2 caches; requires low-noise regulation and local decoupling per Section 4.2. |
| VDD_SOC | SoC Logic Power | 1.2 V ±3% supply for MMDC, GPC, CCM, and peripheral logic; shares regulator domain with VDD_ARM in many designs but must be independently monitored. |
| BOOT_MODE[1:0] | Boot Configuration | Pulled high/low at reset to select boot device (eMMC, NAND, SPI NOR, SD); values 0b10 = eMMC boot, 0b01 = NAND boot - determines initial ROM execution path. |
| ENET_RXD[3:0] | Gigabit Ethernet Receive | LVDS-capable inputs for 10/100/1000 Mbps ENET; require matched 100 Ω differential impedance and AC coupling per Section 4.12. |
| CSI_DATA[7:0] | Parallel Camera Interface | 20-bit parallel input supporting up to 240 MHz pixel clock; used for legacy CMOS sensors without MIPI support - timing critical per Section 4.11. |
Key Features
| Feature | Design Value |
|---|---|
| Smart Speed Power Management | DVFS-enabled dynamic voltage/frequency scaling across CPU, GPU, and VPU domains - reduces idle power to <350 mW while maintaining real-time responsiveness in industrial HMI. |
| Multi-Standard Video Codec | Hardware-accelerated decode/encode for H.264, VC-1, MPEG-2/4, VP8, and JPEG - eliminates CPU load for simultaneous 1080p30 decode + encode + UI compositing. |
| Dual Independent IPUv3H | Two image processing units supporting concurrent scaling, rotation, color-space conversion, and overlay composition - enables split-screen HMI with independent camera feed and GUI layers. |
| Secure Boot Chain | A-HABv4 with SHA-256 hash verification, 2048-bit RSA signature validation, and version-controlled firmware images - prevents unauthorized code execution and enforces field-upgrade integrity. |
| Flexible Display Connectivity | Support for four concurrent display interfaces: parallel RGB (225 Mpixels/sec), LVDS (170 Mpixels/sec), HDMI 1.4 (1080p60), and MIPI DSI (1 Gbps/lane) - allows redundant or multi-modal operator interfaces in safety-critical systems. |
Applications
| Industrial Human-Machine Interface (HMI) | Medical Imaging Edge Node |
|---|---|
Use Scenario: Rugged touchscreen panel in factory control room, operating continuously at ambient temperatures up to 70°C with vibration and EMI exposure. IC Role / Device Role / Timing Role: Primary applications processor executing Linux-based Qt UI, driving dual LVDS displays, capturing camera feeds for equipment monitoring, and communicating via dual FlexCAN to PLCs. Use Value: 1.0 GHz industrial-grade performance ensures 60 Hz UI refresh under full load; CAAM and SNVS enable HIPAA-compliant audit logging and encrypted patient data handling. |
Use Scenario: Portable ultrasound device requiring real-time beamforming, B-mode image reconstruction, and DICOM export over Gigabit Ethernet. IC Role / Device Role / Timing Role: Real-time imaging processor running bare-metal DSP firmware on Cortex-A9 cores, offloading FFT and scan-conversion to VPU/IPU, and managing DDR3 bandwidth for frame buffering. Use Value: Hardware VPU acceleration achieves ≤12 ms end-to-end latency from transducer to display; 64-bit DDR3 interface sustains 4K×2K@30fps raw sensor streaming without frame drops. |
| Ruggedized Industrial Gateway | Autonomous Mobile Robot Controller |
Use Scenario: DIN-rail mounted gateway aggregating Modbus RTU, CANopen, and EtherCAT fieldbus data into MQTT/OPC UA cloud telemetry. IC Role / Device Role / Timing Role: Dual-role processor: Linux host for protocol translation and secure TLS tunneling, plus real-time PREEMPT-RT kernel partition for deterministic fieldbus scheduling. Use Value: Integrated dual FlexCAN (1 Mbps), 5x UARTs (5 Mbps), and IEEE 1588 ENET enable sub-100 μs time synchronization across distributed I/O nodes - meeting IEC 61158 requirements. |
Use Scenario: Onboard navigation computer fusing LiDAR, IMU, and stereo camera data for SLAM and path planning in warehouse environments. IC Role / Device Role / Timing Role: Vision-centric SoC running ROS 2 on Linux, using GPU3Dv4 for point-cloud rendering, GPU2Dv2 for occupancy grid updates, and MIPI CSI-2 for synchronized stereo capture. Use Value: Dual MIPI CSI-2 receivers (4-lane @ 800 Mbps/lane) ingest 12 MP stereo pairs at 15 fps; Smart DMA (SDMA) routes sensor data directly to DDR3 without CPU intervention, cutting latency by 65%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar applications processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCIMX6Q6AVT10ACR | Automotive-grade (−40°C to +125°C), same 1.0 GHz speed, identical feature set but qualified to AEC-Q100 Grade 2 - higher cost, longer qualification lead time. | Targeted at automotive infotainment and ADAS ECUs where ASIL-B compliance and extended high-temp operation are mandatory. | Select only when automotive qualification, not just industrial temp, is contractually required - no electrical or functional advantage for non-automotive use. |
| i.MX 8M Mini (NXP MIMX8MM6CVTKZAA) | Arm Cortex-A53 quad-core (1.8 GHz), integrated GC7000UL GPU, 2 GB LPDDR4 support, and enhanced security (TEE, HSM), but lacks VPU and IPU - newer architecture, different IP block set. | Suitable for next-gen IoT gateways needing AI inference (via NN accelerator) and richer UI, but cannot replace MCIMX6Q5EYM10ACR in existing 1080p video pipelines without redesign. | Choose for new designs prioritizing AI edge inference and long-term roadmap alignment; avoid for drop-in replacement due to incompatible video acceleration and pinout. |
Compared with MCIMX6Q5EYM10ACR, MCIMX6Q6AVT10ACR offers identical compute and media capability with automotive qualification overhead, while i.MX 8M Mini provides higher CPU throughput and AI features but removes hardware video encoding - making the former a spec-for-spec alternative and the latter a generational upgrade requiring architectural rework.
Availability
MCIMX6Q5EYM10ACR is available at Aetrix Electronics and suitable for industrial HMI, medical imaging edge nodes, and ruggedized gateways requiring stable component supply across extended product lifecycles and harsh environmental conditions.
Supply support for MCIMX6Q5EYM10ACR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in Arm-based applications processors and edge AI.
The i.MX 6 series was designed specifically for industrial and embedded applications demanding high reliability, long-term availability, and hardware-enforced security - MCIMX6Q5EYM10ACR represents the quad-core, 1.0 GHz, industrial-temperature variant optimized for video-rich human interfaces and real-time control.
FAQ
What is the maximum guaranteed operating frequency of MCIMX6Q5EYM10ACR under industrial temperature conditions?
The MCIMX6Q5EYM10ACR is rated for guaranteed operation at 1.0 GHz across its full industrial junction temperature range of −40°C to +105°C, as confirmed by NXP's IMX6DQIEC Rev. 6 datasheet (Section 1.1, Table 1 footnote 3). This rating assumes use of the mandatory 24 MHz input clock and adherence to specified VDD_ARM/VDD_SOC voltage tolerances and thermal dissipation guidelines.
Does MCIMX6Q5EYM10ACR support hardware-accelerated video encoding for H.264?
Yes, MCIMX6Q5EYM10ACR includes a dedicated Video Processing Unit (VPU) that supports full hardware-accelerated H.264 BP/MP/HP encoding up to 1080p60 resolution, as documented in the i.MX 6Dual/6Quad Applications Processors for Industrial Products datasheet (IMX6DQIEC Rev. 6, Section 1.2). This offloads encoding from the CPU cores and maintains consistent frame rates under heavy system load.
What security features are integrated into MCIMX6Q5EYM10ACR for secure boot and runtime protection?
MCIMX6Q5EYM10ACR integrates multiple hardware security blocks: Advanced High Assurance Boot (A-HABv4) with SHA-256 and 2048-bit RSA verification, Cryptographic Acceleration and Assurance Module (CAAM) with NIST-certified RNG, Secure Non-Volatile Storage (SNVS) with SRTC, Central Security Unit (CSU), and Arm TrustZone. These collectively enforce authenticated boot, encrypted firmware updates, and isolated secure execution environments.
Which package type and pin count does MCIMX6Q5EYM10ACR use?
MCIMX6Q5EYM10ACR uses a 21 mm × 21 mm Fine-Pitch Chip Array Ball Grid Array (FCPBGA) package with 624 solder balls and 0.8 mm pitch, as specified in the Package Information section of IMX6DQIEC Rev. 6. This lidded package is designed for industrial thermal management and mechanical robustness in high-vibration environments.
Can MCIMX6Q5EYM10ACR interface directly with eMMC 4.41 storage devices?
Yes, MCIMX6Q5EYM10ACR supports eMMC 4.41 via its uSDHC controllers, as explicitly listed in the "Multilevel memory system" feature description (IMX6DQIEC Rev. 6, Section 1.2). The SoC's eMMC interface complies with JEDEC Standard JESD84-B451 and supports HS400 mode for up to 200 MB/s read throughput when paired with compatible eMMC devices.
MCIMX6Q5EYM10ACR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 624-LFBGA, FCBGA
- Series:
- i.MX6Q
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Core Processor:
- ARM® Cortex®-A9
- Number of Cores/Bus Width:
- 4 Core, 32-Bit
- Speed:
- 1.0GHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- LPDDR2, LVDDR3, DDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keypad, LCD
- Ethernet:
- 10/100/1000Mbps (1)
- SATA:
- SATA 3Gbps (1)
- USB:
- USB 2.0 + PHY (4)
- Voltage - I/O:
- 1.8V, 2.5V, 2.8V, 3.3V
- Operating Temperature:
- -20°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC, Tamper Detection
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 624-FCPBGA (21x21)
- Additional Interfaces:
- CAN, I2C, I2S, MMC/SD/SDIO, SAI, SPI, SSI, UART
MCIMX6Q5EYM10ACR FAQ
1.How can I place an order for MCIMX6Q5EYM10ACR through Aetrix?
Please submit a Request for Quotation (RFQ) for MCIMX6Q5EYM10ACR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MCIMX6Q5EYM10ACR reliable?
The price and inventory of MCIMX6Q5EYM10ACR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MCIMX6Q5EYM10ACR is usually 5 days.
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Once your MCIMX6Q5EYM10ACR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MCIMX6Q5EYM10ACR?
For technical support, including MCIMX6Q5EYM10ACR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MCIMX6Q5EYM10ACR requirements.
6.How does Aetrix verify that MCIMX6Q5EYM10ACR is sourced from the original manufacturer or authorized distributors?
All MCIMX6Q5EYM10ACR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MCIMX6Q5EYM10ACR meets industry standards.
7.What is the process for return or replacement of MCIMX6Q5EYM10ACR?
All MCIMX6Q5EYM10ACR units undergo pre-shipment inspection (PSI). If there is an issue with MCIMX6Q5EYM10ACR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MCIMX6Q5EYM10ACR part is unused and in its original packaging.
Return procedure for MCIMX6Q5EYM10ACR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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