My Inquiry
My Account
Microchip Technology MCP4631T-103E/ST
- Part No.:
- MCP4631T-103E/ST
- Manufacturer:
- Microchip Technology
- Category:
- Digital Potentiometers
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
MCP4631T-103E/ST.pdf
- Description:
- IC DGT POT 10KOHM 129TAP 14TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,046
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MCP4631T-103E/ST from Microchip Technology is a dual-channel, 7-bit volatile digital potentiometer in TSSOP-14 package with 10 kΩ end-to-end resistance per channel, I²C interface (up to 3.4 MHz), and mid-scale power-on wiper reset. It delivers low 75 Ω typical wiper resistance, ±0.5 LSB DNL, and 15 ppm/°C ratiometric tempco-enabling precision gain/offset trimming in analog front-ends and sensor signal conditioning circuits.
For engineers reviewing the MCP4631T-103E/ST datasheet, MCP4631T-103E/ST pinout, MCP4631T-103E/ST application, or MCP4631T-103E/ST equivalent, key selection criteria include dual-potentiometer topology, 7-bit resolution (129 steps), 10 kΩ RAB tolerance (±20%), extended temperature operation (–40°C to +125°C), and terminal disconnect via TCON register for high-impedance wiper control.
Technical Context
The MCP4631T-103E/ST integrates two independent 7-bit resistor networks with shared I²C control logic and separate wiper/TCON registers. Each potentiometer supports zero-to-full-scale wiper positioning and configurable terminal disconnect (P0A/P0B/P1A/P1B) to isolate resistive elements during standby or calibration.
Its I²C interface operates across four speed modes (100 kHz/400 kHz/1.7 MHz/3.4 MHz) with Schmitt-trigger inputs tolerant up to 12.5 V, while brown-out reset activates at ~1.5 V to ensure deterministic wiper initialization. The device uses volatile RAM wiper storage with no EEPROM, requiring host re-initialization after power cycle.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 7-bit (129 steps) - enables coarse but stable gain adjustment with minimal code granularity overhead |
| RAB Resistance | 10 kΩ ±20% - matches standard feedback network values for op-amp gain setting and voltage divider applications |
| Wiper Resistance | 75 Ω typical - minimizes insertion error in low-impedance signal paths and preserves linearity below 100 kΩ loads |
| Ratiometric Tempco | 15 ppm/°C - ensures stable voltage division ratio over –40°C to +125°C, critical for sensor bridge biasing |
| I²C Speed Support | Up to 3.4 MHz - allows rapid wiper updates in closed-loop systems without CPU polling bottlenecks |
| Operating Voltage | 1.8 V to 5.5 V - supports direct interfacing with 1.8 V logic and compatibility with 3.3 V/5 V microcontrollers |
| Wiper Reset State | Mid-scale (64h) on POR/BOR - guarantees known startup attenuation for safety-critical biasing circuits |
Pinout & Package
TSSOP-14 package with exposed thermal pad (EP); 14-pin surface-mount outline optimized for thermal dissipation and board space efficiency in compact analog subsystems.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A2) | I²C address bit 2 | Configures slave address LSB; tied high/low to select one of eight possible I²C addresses |
| 2 (A1) | I²C address bit 1 | Configures slave address middle bit; used with A2 and HVC/A0 for full address mapping |
| 3 (NC) | No connect | Internally unconnected; must remain floating or grounded per layout guidelines |
| 4 (VDD) | Positive supply | Primary power rail (1.8–5.5 V); powers core logic and resistor networks |
| 5 (P0W) | Potentiometer 0 wiper | Analog output node for first pot; connects to op-amp inverting input or ADC reference path |
| 6 (P0B) | Potentiometer 0 terminal B | Fixed end of first resistor network; typically tied to ground or negative reference |
| 7 (P0A) | Potentiometer 0 terminal A | Fixed end of first resistor network; typically connected to signal source or positive rail |
| 8 (P1A) | Potentiometer 1 terminal A | Fixed end of second resistor network; used for dual-path calibration (e.g., gain + offset) |
| 9 (P1W) | Potentiometer 1 wiper | Analog output node for second pot; enables independent adjustment of two signal parameters |
| 10 (P1B) | Potentiometer 1 terminal B | Fixed end of second resistor network; referenced to common ground or bias point |
| 11 (VSS) | Ground | Return path for all analog and digital currents; requires low-impedance PCB connection |
| 12 (HVC/A0) | I²C address bit 0 / HV control | Selects I²C address MSB or enables high-voltage tolerance mode (up to 12.5 V) |
| 13 (SDA) | I²C data line | Open-drain bidirectional bus line; requires external pull-up resistor (typically 2.2–10 kΩ) |
| 14 (SCL) | I²C clock line | Input-only clock line; synchronizes all read/write and increment/decrement commands |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent 7-bit potentiometers | Enables simultaneous gain and offset tuning in single-supply instrumentation amplifiers without inter-channel crosstalk |
| Terminal disconnect via TCON register | Allows software-controlled isolation of P0A/P0B/P1A/P1B to eliminate leakage paths during power-down or calibration hold |
| Brown-out reset (1.5 V typical) | Guarantees wiper returns to mid-scale before VDD stabilizes, preventing undefined analog states at power-up |
| High-voltage tolerant digital inputs | Accepts up to 12.5 V on SDA/SCL/HVC/A0/A1/A2-enables direct interface with 5 V or 12 V logic without level shifters |
| Low 2.5 µA inactive current | Reduces system standby power in battery-operated sensors and portable medical devices during idle periods |
Applications
| Programmable Gain Amplifier | Sensor Offset Calibration |
|---|---|
Use Scenario: Adjusting closed-loop gain of an instrumentation amplifier in real time based on sensor range detection. IC Role / Device Role / Timing Role: Dual-potentiometer provides independent Rf/Rin feedback network configuration for precise gain scaling. Use Value: Eliminates manual trimpots and enables auto-ranging firmware routines with <1% gain error across –40°C to +125°C. |
Use Scenario: Compensating thermistor or strain gauge bridge output drift due to temperature and manufacturing variance. IC Role / Device Role / Timing Role: Second potentiometer injects calibrated offset voltage into summing junction to null baseline error. Use Value: Achieves <±0.5 mV offset correction accuracy with 15 ppm/°C ratiometric stability over full industrial temperature range. |
| Audio Channel Balance Control | Power Supply Feedback Divider |
Use Scenario: Implementing digital volume/balance control in stereo audio codecs without mechanical potentiometers. IC Role / Device Role / Timing Role: Each potentiometer adjusts left/right channel attenuation independently via I²C command bursts. Use Value: Supports 3.4 MHz I²C writes for sub-millisecond balance updates and avoids audible zipper noise during real-time adjustments. |
Use Scenario: Dynamically adjusting output voltage of a DC-DC converter during load transient events or adaptive power management. IC Role / Device Role / Timing Role: Replaces fixed feedback resistors with programmable divider to modulate regulation setpoint under MCU control. Use Value: Enables ±1% output voltage tuning with 75 Ω wiper resistance minimizing divider loading error on high-impedance FB nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual digital potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP4651T-103E/ST | 8-bit resolution (257 steps), same RAB, identical TSSOP-14 package and I²C interface | Higher resolution required for fine-grained gain control where 129-step quantization causes visible step artifacts | Select when >0.4% step size resolution is needed; retains same footprint and firmware compatibility |
| AD5232BRUZ10 | Nonvolatile EEPROM wiper memory, SPI interface, 10 kΩ RAB, TSSOP-14 | Applications requiring wiper state retention across power cycles without host re-initialization | Choose when deterministic startup state cannot rely on MCU boot sequence; adds SPI overhead and eliminates I²C multi-drop capability |
Compared with MCP4631T-103E/ST, the MCP4651T-103E/ST offers finer resolution at identical speed and power, while the AD5232BRUZ10 trades I²C flexibility for nonvolatile state retention-making each suitable for distinct system-level trade-offs in resolution, persistence, and interface architecture.
Availability
MCP4631T-103E/ST is available at Aetrix Electronics and suitable for programmable gain amplifiers, sensor calibration systems, audio channel balancing, and adjustable power supply feedback networks requiring stable component supply across automotive, industrial, and medical design cycles.
Supply support for MCP4631T-103E/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving industrial, automotive, consumer, and communications markets with high-reliability semiconductor products.
The MCP46XX family delivers volatile dual digital potentiometers optimized for precision analog trimming in space-constrained, thermally demanding environments-emphasizing low tempco, wide voltage operation, and robust I²C interoperability.
FAQ
What is the wiper resistance specification for the MCP4631T-103E/ST?
The MCP4631T-103E/ST has a typical wiper resistance of 75 Ω at VDD = 5.5 V and 2.0 mA wiper current, with a maximum of 160 Ω under those conditions. At lower VDD = 2.7 V, wiper resistance rises to a maximum of 300 Ω. This low value minimizes insertion error in precision voltage divider and gain-setting applications where wiper loading affects overall accuracy.
Does the MCP4631T-103E/ST retain wiper settings after power loss?
No, the MCP4631T-103E/ST uses volatile RAM for wiper storage and does not retain settings after power removal. Upon power-up or brown-out reset, the wiper defaults to mid-scale (64h). For nonvolatile storage, consider the pin-compatible MCP4641T-103E/ST, which integrates EEPROM wiper memory and retains position across power cycles.
Can the MCP4631T-103E/ST operate from a 1.8 V supply?
Yes, the MCP4631T-103E/ST supports full functionality-including I²C communication and resistor network operation-at VDD = 1.8 V, though analog performance specifications (e.g., bandwidth, INL/DNL) are guaranteed only from 2.7 V to 5.5 V. Digital I/O remains functional down to 1.8 V, enabling use with ultra-low-power microcontrollers.
How many I²C addresses can be configured on the MCP4631T-103E/ST?
The MCP4631T-103E/ST supports eight unique I²C addresses using three hardware address pins: A2, A1, and HVC/A0. These pins accept static logic levels (VDD or VSS) to configure the 3-bit address field, allowing up to eight devices on the same I²C bus without address conflict-ideal for multi-channel calibration systems.
What is the maximum operating temperature range for the MCP4631T-103E/ST?
The MCP4631T-103E/ST is rated for operation from –40°C to +125°C ambient temperature, meeting extended industrial and automotive under-hood requirements. Its ratiometric tempco of 15 ppm/°C ensures stable voltage division ratio across this full range, making it suitable for engine control units, motor drives, and outdoor sensor nodes.
MCP4631T-103E/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 129
- Resistance (Ohms):
- 10k
- Interface:
- I2C
- Memory Type:
- Volatile
- Voltage - Supply:
- 1.8V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 150ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-TSSOP
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 75
MCP4631T-103E/ST FAQ
1.How can I place an order for MCP4631T-103E/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for MCP4631T-103E/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MCP4631T-103E/ST reliable?
The price and inventory of MCP4631T-103E/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MCP4631T-103E/ST is usually 5 days.
3.What payment methods are accepted for MCP4631T-103E/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MCP4631T-103E/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MCP4631T-103E/ST?
MCP4631T-103E/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MCP4631T-103E/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MCP4631T-103E/ST?
For technical support, including MCP4631T-103E/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MCP4631T-103E/ST requirements.
6.How does Aetrix verify that MCP4631T-103E/ST is sourced from the original manufacturer or authorized distributors?
All MCP4631T-103E/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MCP4631T-103E/ST meets industry standards.
7.What is the process for return or replacement of MCP4631T-103E/ST?
All MCP4631T-103E/ST units undergo pre-shipment inspection (PSI). If there is an issue with MCP4631T-103E/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MCP4631T-103E/ST part is unused and in its original packaging.
Return procedure for MCP4631T-103E/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MCP4631T-103E/ST Tags
-
MCP4018T-103E/LT
Microchip Technology
-
MCP4018T-503E/LT
Microchip Technology
-
MCP4011T-103E/SN
Microchip Technology
-
MCP4018T-104E/LT
Microchip Technology
-
MCP4017T-503E/LT
Microchip Technology
-
MCP4018T-502E/LT
Microchip Technology
-
MCP4017T-103E/LT
Microchip Technology
-
MCP4531T-103E/MF
Microchip Technology
-
MCP4021T-202E/SN
Microchip Technology
-
MCP4023T-103E/CH
Microchip Technology
-
MCP4022T-503E/CH
Microchip Technology
-
MCP4551T-502E/MS
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
