Microchip Technology MCP795B22-I/ST

Overview

MCP795B22-I/ST from Microchip Technology is a SPI real-time clock/calendar (RTCC) IC with integrated 2 Kbit EEPROM, 64-byte battery-backed SRAM, and EUI-64™ unique ID. It delivers accurate timekeeping with digital trimming (±255 ppm), dual programmable alarms, power-fail time-stamping, and 32 kHz boot-up clock at power-up - used in industrial metering, backup power systems, and data loggers requiring long-term timestamp integrity.

For engineers reviewing the MCP795B22-I/ST datasheet, MCP795B22-I/ST pinout, MCP795B22-I/ST application, or MCP795B22-I/ST equivalent, key selection criteria include VBAT switchover behavior (1.3–1.7 V trip), <700 nA timekeeping current at 1.8 V, 10 MHz SPI interface, 32 kHz CLKOUT/BOOT functionality, and EUI-64™ MAC address preprogramming.

Technical Context

The MCP795B22-I/ST implements a crystal-based RTCC with on-chip oscillator driving 32.768 kHz tuning fork crystal, supported by digital calibration register (0x09) and sign bit (0x03:7) for ±255 ppm adjustment in 1 ppm steps. Its power management includes automatic VCC-to-VBAT switchover at 1.3–1.7 V, with dedicated registers (0x18–0x1F) logging timestamps on both power-down and power-up events.

It integrates dual event detect inputs (EVHS/EVLS): EVHS supports pulse counting (1st/4th/16th/32nd edge), while EVLS provides programmable debounce (31 ms or 500 ms). The watchdog timer features dual retrigger via SPI or EVHS, with configurable pulse width and dedicated WDO open-drain output.

Key Specifications

Pinout & Package

Package: 14-lead SOIC (I-temp, -40°C to +85°C), pin-compatible with TSSOP variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar real-time clock/calendar applications.

Compared with MCP795W22-I/ST and DS3231M+, the MCP795B22-I/ST uniquely combines 32 kHz boot-clock assertion, SPI interface, dual high-resolution alarms, and EUI-64™ in a single industrial-grade package - making it optimal for systems requiring deterministic startup timing and embedded event-driven control.

Availability

MCP795B22-I/ST is available at Aetrix Electronics and suitable for smart metering, industrial data logging, medical device backup clocks, and POS transaction timestamping requiring stable component supply across extended product lifecycles.

Supply support for MCP795B22-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and timing solutions, with broad industrial and automotive qualification coverage.

The MCP795XXX family was designed for embedded systems needing autonomous, battery-backed timekeeping with integrated memory and event-aware peripherals - targeting applications where host MCU resources are constrained or power resilience is critical.

FAQ

What is the function of the CLKOUT/BOOT pin on the MCP795B22-I/ST?

The CLKOUT/BOOT pin on the MCP795B22-I/ST is a push-pull output that serves dual roles: as a configurable clock generator (1 Hz / 4.096 kHz / 8.192 kHz / 32.768 kHz) and - uniquely for MCP795BXX variants - as a 32.768 kHz boot-up clock asserted immediately after power-on reset. This enables immediate timing availability before host MCU firmware initializes, supporting deterministic startup sequences in safety-critical or time-sensitive systems. The output frequency is set via RS2 bits (0x08:2–0) and remains active during VCC or VBAT operation.

How does the MCP795B22-I/ST handle power failure and recovery?

The MCP795B22-I/ST handles power failure and recovery through automatic VCC-to-VBAT switchover at a 1.3–1.7 V threshold, preserving RTC registers and 64-byte SRAM. Crucially, it logs timestamps in dedicated registers (0x18–0x1F) at both power-down and power-up events - capturing exact time of VCC loss and restoration. This dual timestamping enables precise brownout duration calculation and audit-trail continuity. The VBATEN bit (0x04:3) must be set to enable VBAT supply connection, and the VBAT flag (0x04:4) is hardware-set during switchover and cleared by software.

Does the MCP795B22-I/ST require an external crystal, and what are the alternatives?

Yes, the MCP795B22-I/ST requires an external 32.768 kHz tuning fork crystal connected between X1 and X2, along with appropriate load capacitors (typically 12–22 pF). As an alternative, the EXTOSC bit (0x08:3) can be set to accept an external 32.768 kHz CMOS clock signal applied to X1, with X2 left unconnected. This bypasses the internal oscillator circuit entirely. No internal RC oscillator is present - crystal or external clock is mandatory for timekeeping; the device cannot operate without one.

What is the significance of the EUI-64™ unique ID in the MCP795B22-I/ST?

The EUI-64™ unique ID in the MCP795B22-I/ST is a factory-programmed 128-bit IEEE-compliant identifier stored in a protected EEPROM area. It provides a globally unique hardware identity usable for secure device authentication, network addressing (e.g., IPv6 autoconfiguration), and firmware binding without host-side provisioning. Access requires an unlock sequence (UNLOCK instruction), and the ID is read-only after programming. Unlike user-programmable fields, this EUI-64™ is guaranteed collision-free and persists across all power states - making it essential for regulatory compliance and zero-touch deployment in IoT and industrial networks.

How do the dual event detect inputs (EVHS and EVLS) differ in functionality on the MCP795B22-I/ST?

The MCP795B22-I/ST features two independent event detect inputs: EVHS (High-Speed Event Detect) and EVLS (Low-Speed Event Detect). EVHS is edge-triggered and supports programmable pulse counting (1st, 4th, 16th, or 32nd event) before asserting IRQ - ideal for RPM measurement or encoder quadrature decoding. EVLS is also edge-triggered but includes built-in hardware debounce with selectable delays of 31 ms or 500 ms - optimized for mechanical switch inputs like pushbuttons or limit switches. Both operate from VCC or VBAT, enabling event capture during main power loss, and each has dedicated status flags (0x0B:0 and 0x0B:1) for software polling.