Microchip Technology MCP795W10-I/SL
- Part No.:
- MCP795W10-I/SL
- Manufacturer:
- Microchip Technology
- Category:
- Real Time Clocks
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MCP795W10-I/SL.pdf
- Description:
- IC RTC CLK/CALENDAR SPI 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:434
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MCP795W10-I/SL from Microchip Technology is a battery-backed SPI Real-Time Clock/Calendar (RTCC) IC with integrated watchdog timer, dual event detect modules, 1 Kbit EEPROM, and 64-byte SRAM. It maintains time to hundredth-of-second resolution across -40°C to +85°C, supports ±1 ppm digital trimming, and logs power-fail/power-up timestamps. Used in industrial metering, data loggers, and backup-critical embedded systems.
For engineers reviewing the MCP795W10-I/SL datasheet, MCP795W10-I/SL pinout, MCP795W10-I/SL application, or MCP795W10-I/SL equivalent, key selection factors include its 14-pin SOIC/TSSOP package, 1.8–3.6 V operating range, 1.2 µA typical timekeeping current from VCC, and SPI interface up to 5 MHz - all validated for industrial-grade reliability and battery-backed retention.
Technical Context
The MCP795W10-I/SL implements a fully autonomous RTCC using an internal 32.768 kHz oscillator circuit optimized for 6–9 pF crystals, with on-chip digital trimming (±1 ppm resolution, ±259 ppm range) and automatic oscillator failure detection via OSCRUN flag. Its SPI interface operates at up to 5 MHz (VCC ≥ 2.5 V) and supports MSb-first transfers with CS-controlled framing.
Power management includes seamless switchover between VCC (1.8–3.6 V) and VBAT (1.3–3.6 V) at VTRIP = 1.5 V (typ), with dedicated power-fail timestamp registers (PWRDN/PWRUP) logging exact time of transition. The device integrates two independent event detectors - high-speed pulse counter and low-speed switch debouncer - each assignable to IRQ or WDO outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Time Resolution | Hundredth-of-second precision with leap-year compensation through year 2399 |
| Operating Voltage | 1.8 V to 3.6 V on VCC; 1.3 V to 3.6 V on VBAT - enables wide-input industrial power rails and long-life coin-cell backup |
| Timekeeping Current | 1.2 µA at 3.0 V (VCC); 1.0 µA at 3.0 V (VBAT) - extends battery life beyond 10 years with CR2032 |
| SPI Interface Speed | Up to 5 MHz (VCC ≥ 2.5 V); 3 MHz (1.8 V ≤ VCC < 2.5 V) - supports fast register access without MCU clock stretching |
| Digital Trimming Range | ±259 ppm with ±1 ppm resolution - corrects crystal aging, temperature drift, and load capacitance mismatch |
| Memory Resources | 64-byte battery-backed SRAM, 1 Kbit EEPROM (software write-protected), 128-bit protected EEPROM - stores configuration, calibration data, and EUI-48™ address |
| Alarm & Output Flexibility | Dual programmable alarms; CLKOUT selectable square-wave output (1 Hz to 32.768 kHz); IRQ and WDO pins configurable for alarm/event/WDT signals |
Pinout & Package
Package: 14-lead SOIC (MCP795W10-I/SL) and TSSOP - RoHS-compliant, surface-mount, industrial-temperature rated (-40°C to +85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| X1 | Crystal input / external clock input | Accepts 32.768 kHz crystal (6–9 pF load) or external clock; also used for oscillator start/stop control via ST bit |
| X2 | Crystal output | Drives crystal resonator; must be left floating when external clock mode is enabled (EXTOSC = 1) |
| VBAT | Backup supply input | Provides power to RTCC and SRAM during main supply loss; switchover occurs at 1.5 V (typ) |
| WDO | Watchdog timer output | Open-drain output for WDT timeout pulses or alarm events; requires external pull-up to VCC or VBAT |
| IRQ | Interrupt output | Open-drain output for event detect interrupts or alarm events; independently configurable from WDO |
| CS | Chip select input | Active-low SPI enable; initiates instruction decoding and forces SO into high-impedance when deasserted |
| VSS | Ground reference | Primary return path for all digital and analog circuits; must be low-impedance and decoupled near device |
| SO | Serial data output | Tri-state SPI output; data valid after falling edge of SCK; shares bus with other SPI peripherals when CS is high |
| SI | Serial data input | SPI data input; latched on rising edge of SCK; accepts instruction, address, and data bytes (MSb first) |
| SCK | Serial clock input | Master-generated SPI clock; rise/fall times ≤100 ns; defines timing for SI sampling and SO update |
| EVHS | High-speed event input | Accepts pulses up to system clock rate; triggers interrupt after programmable count; tied to VSS/VCC if unused |
| EVLS | Low-speed event input | Debounces mechanical switches with user-selectable period; generates IRQ on stable edge; tied to VSS/VCC if unused |
| CLKOUT | Clock output | Configurable square-wave output (1 Hz, 2 Hz, 4 Hz, 8 Hz, 16 Hz, 32 Hz, 64 Hz, 128 Hz, 256 Hz, 512 Hz, 1024 Hz, 2048 Hz, 4096 Hz, 8192 Hz, 16384 Hz, or 32768 Hz) |
| VCC | Main power supply | Primary operating voltage source; powers all logic, memory, and interface circuits; must be applied before VBAT |
Key Features
| Feature | Design Value |
|---|---|
| Power-fail timestamp logging | Records exact time of VCC loss and restoration in dedicated PWRDN/PWRUP registers - enables forensic power-event analysis in unattended systems |
| Dual event detect modules | Independent high-speed pulse counter (EVHS) and low-speed switch debouncer (EVLS) - eliminates need for external logic or MCU GPIO polling |
| Configurable CLKOUT frequency | 16 selectable square-wave outputs from 1 Hz to 32.768 kHz - replaces external clock dividers or dedicated oscillator ICs |
| Protected 128-bit EEPROM | Write-locked area requiring robust unlock sequence - securely stores EUI-48™ MAC address and critical calibration constants |
| Automatic oscillator failure detection | OSCRUN flag clears after >1 ms timeout (TOSF) - provides real-time health monitoring without software overhead |
Applications
| Smart Energy Metering | Industrial Data Logger |
|---|---|
Use Scenario: Utility-grade electricity meters requiring tamper-proof time-stamped consumption records and firmware update validation. IC Role / Device Role / Timing Role: Primary timekeeping engine with power-fail timestamping, secure EUI-48™ storage, and alarm-triggered event logging. Use Value: Maintains traceable, battery-backed time across brownouts; 1.2 µA VCC current enables >15-year CR2032 operation; protected EEPROM prevents unauthorized MAC reprogramming. | Use Scenario: Remote environmental sensors logging temperature, humidity, and vibration with precise UTC-aligned timestamps. IC Role / Device Role / Timing Role: Autonomous RTCC providing synchronized timestamps for sensor readings and wake-up scheduling for ultra-low-power sleep cycles. Use Value: Hundredth-of-second resolution ensures sub-second correlation across distributed nodes; dual event inputs capture external triggers (e.g., door open, motion) without MCU intervention. |
| Medical Diagnostic Equipment | POS Terminal with Audit Trail |
Use Scenario: Portable ultrasound or ECG devices needing FDA-compliant audit trails, calibration timestamps, and battery-backed runtime clocks. IC Role / Device Role / Timing Role: Certified time source with power-loss recovery, SRAM retention, and write-protected calibration storage. Use Value: Power-fail timestamping satisfies IEC 62304 traceability requirements; 64-byte SRAM preserves last-session state during battery swaps; ±1 ppm trimming meets clinical timing accuracy standards. | Use Scenario: Payment terminals requiring PCI-DSS-compliant transaction logging, secure serial number storage, and tamper-evident time stamps. IC Role / Device Role / Timing Role: Secure RTC with EUI-48™ MAC, protected EEPROM, and dual alarms for end-of-day reporting and maintenance alerts. Use Value: 128-bit protected EEPROM stores immutable device ID and firmware version; alarm outputs trigger automated log dumps; CLKOUT drives secure crypto module clocks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time clock/calendar applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP795W11-I/SL | Same package and pinout; preprogrammed with factory-assigned EUI-48™ MAC address in protected EEPROM | Required where IEEE-compliant unique node identification is mandated (e.g., networked medical devices, IoT gateways) | Select MCP795W11-I/SL when EUI-48™ is needed out-of-box; otherwise MCP795W10-I/SL offers identical RTCC functionality at lower cost |
| DS3231M+ | Higher accuracy (±2 ppm over -40°C to +85°C); integrated TCXO; no event detect or watchdog; I²C-only interface | Better suited for precision instrumentation where timing stability outweighs feature count and SPI compatibility | Choose DS3231M+ only when absolute time accuracy is primary requirement and SPI interface or event detection is unnecessary |
Compared with MCP795W11-I/SL, the MCP795W10-I/SL omits factory-programmed EUI-48™ but retains full RTCC, EEPROM, and event features - making it optimal for cost-sensitive, non-networked applications. Versus DS3231M+, it trades TCXO-level accuracy for richer peripheral integration and SPI compatibility, better serving resource-constrained microcontroller systems.
Availability
MCP795W10-I/SL is available at Aetrix Electronics and suitable for industrial metering, medical diagnostics, POS terminal design, and remote data logging requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for MCP795W10-I/SL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and timing solutions, headquartered in Chandler, Arizona, with global manufacturing and support infrastructure.
The MCP795WXX product line delivers highly integrated, battery-backed SPI RTCs with enhanced system supervision features - designed specifically for industrial, medical, and metering applications demanding reliable timekeeping, event detection, and secure nonvolatile storage under variable power conditions.
FAQ
What is the primary function of the MCP795W10-I/SL?
The MCP795W10-I/SL is a battery-backed SPI Real-Time Clock/Calendar IC that maintains accurate time and date (including hundredth-of-second resolution and leap-year compensation through 2399), logs power-fail/power-up events, and provides integrated watchdog, event detection, and memory resources. Its core function is autonomous, low-power timekeeping with system supervision capabilities - essential for applications where time integrity must persist across power interruptions. The MCP795W10-I/SL achieves this while consuming only 1.2 µA from VCC at 3.0 V.
Does the MCP795W10-I/SL support external crystal oscillators?
Yes, the MCP795W10-I/SL supports external 32.768 kHz tuning fork crystals with load capacitances of 6–9 pF via X1 and X2 pins. Its on-chip oscillator circuit is optimized for this range, and digital trimming (±1 ppm resolution) compensates for crystal tolerance and temperature drift. The OSCRUN flag in RTCWKDAY register confirms oscillator health. External clock input (32.768 kHz) is also supported by driving X1 directly and leaving X2 floating - configured via the EXTOSC bit in the CONTROL register.
How does the MCP795W10-I/SL handle power transitions between VCC and VBAT?
The MCP795W10-I/SL automatically switches to VBAT backup supply when VCC falls below VTRIP (1.3–1.7 V, typ 1.5 V), maintaining RTCC operation and SRAM contents without interruption. It logs exact timestamps of both power-fail and power-up events in dedicated PWRDN and PWRUP registers. VBAT must be applied after VCC, and the device draws only 1.0 µA (typ) from VBAT at 3.0 V - enabling multi-year operation on standard coin cells. The VBATEN flag in RTCWKDAY indicates active backup mode.
What memory resources are included in the MCP795W10-I/SL?
The MCP795W10-I/SL integrates 64 bytes of battery-backed SRAM (addresses 0x20–0x5F), 1 Kbit (128-byte) software write-protected EEPROM (accessed via EEREAD/EEWRITE), and 128 bits (16-byte) of protected EEPROM (accessed via IDREAD/IDWRITE). The protected EEPROM requires a robust unlock sequence and stores critical data such as EUI-48™ MAC addresses (though MCP795W10-I/SL ships with blank protected EEPROM - unlike MCP795W11-I/SL). All memory remains accessible and retained during VCC-to-VBAT switchover.
Can the MCP795W10-I/SL generate configurable clock outputs?
Yes, the MCP795W10-I/SL provides a programmable CLKOUT pin capable of generating 16 different square-wave frequencies: 1 Hz, 2 Hz, 4 Hz, 8 Hz, 16 Hz, 32 Hz, 64 Hz, 128 Hz, 256 Hz, 512 Hz, 1024 Hz, 2048 Hz, 4096 Hz, 8192 Hz, 16384 Hz, or 32768 Hz. This is controlled via SQWFS[1:0] and SQWEN bits in the CONTROL register. The output is disabled by default and requires explicit enablement - eliminating unintended clock loading on the board. CLKOUT operates independently of alarm or watchdog functions.
MCP795W10-I/SL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Clock/Calendar
- Features:
- Alarm, EEPROM, Leap Year, Square Wave Output, SRAM, Watchdog Timer
- Memory Size:
- 64B
- Time Format:
- HH:MM:SS:hh (12/24 hr)
- Date Format:
- YY-MM-DD-dd
- Interface:
- SPI
- Voltage - Supply:
- 1.8V ~ 3.6V
- Voltage - Supply, Battery:
- 1.3V ~ 3.6V
- Current - Timekeeping (Max):
- 1µA @ 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-SOIC
MCP795W10-I/SL FAQ
1.How can I place an order for MCP795W10-I/SL through Aetrix?
Please submit a Request for Quotation (RFQ) for MCP795W10-I/SL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MCP795W10-I/SL reliable?
The price and inventory of MCP795W10-I/SL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MCP795W10-I/SL is usually 5 days.
3.What payment methods are accepted for MCP795W10-I/SL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MCP795W10-I/SL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MCP795W10-I/SL?
MCP795W10-I/SL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MCP795W10-I/SL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MCP795W10-I/SL?
For technical support, including MCP795W10-I/SL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MCP795W10-I/SL requirements.
6.How does Aetrix verify that MCP795W10-I/SL is sourced from the original manufacturer or authorized distributors?
All MCP795W10-I/SL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MCP795W10-I/SL meets industry standards.
7.What is the process for return or replacement of MCP795W10-I/SL?
All MCP795W10-I/SL units undergo pre-shipment inspection (PSI). If there is an issue with MCP795W10-I/SL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MCP795W10-I/SL part is unused and in its original packaging.
Return procedure for MCP795W10-I/SL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MCP795W10-I/SL Tags

-
MCP7940N-I/SN
Microchip Technology

-
MCP7940MT-I/MNY
Microchip Technology

-
PCF85063ATL/1,118
NXP USA Inc.

-
MCP7940NT-I/SN
Microchip Technology

-
MCP7940NT-I/MS
Microchip Technology

-
MCP7940N-I/MS
Microchip Technology

-
PCF85063AT/AY
NXP USA Inc.
-
PCF85063TP/1Z
NXP Semiconductors

-
PCF85063ATT/AJ
NXP USA Inc.

-
MCP7940NT-E/SN
Microchip Technology

-
MCP7940NT-I/MNY
Microchip Technology

-
MCP79400T-I/SN
Microchip Technology
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

