My Inquiry
My Account
Microchip Technology MCP795W21T-I/SL
- Part No.:
- MCP795W21T-I/SL
- Manufacturer:
- Microchip Technology
- Category:
- Real Time Clocks
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MCP795W21T-I/SL.pdf
- Description:
- IC RTC CLK/CALENDAR SPI 14SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,043
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MCP795W21T-I/SL from Microchip Technology is a battery-backed SPI Real-Time Clock/Calendar (RTCC) IC with integrated watchdog timer, dual event detectors, and 2 Kbit EEPROM. It maintains time to hundredth-of-second resolution across -40°C to +85°C, supports ±1 ppm digital trimming, logs power-fail/power-up timestamps, and operates from 1.8V–3.6V main supply or 1.3V–3.6V backup supply - used in industrial metering, medical logging, and smart utility endpoints.
For engineers reviewing the MCP795W21T-I/SL datasheet, MCP795W21T-I/SL pinout, MCP795W21T-I/SL application, or MCP795W21T-I/SL equivalent, key selection criteria include its EUI-48™ MAC address preprogramming, dual alarm assignment flexibility (IRQ/WDO), 1.0 µA VBAT timekeeping current at 3.0V, and 14-pin SOIC/TSSOP package compatibility with legacy RTCC designs.
Technical Context
The MCP795W21T-I/SL implements a fully autonomous RTCC using a 32.768 kHz crystal oscillator with on-chip digital trimming (±259 ppm range, ±1 ppm resolution) and automatic switchover between VCC and VBAT. Its SPI interface operates up to 5 MHz at 2.5–3.6V or 3 MHz at 1.8–2.5V, with CS setup/hold times of 100 ns and data hold of 40 ns under full-spec conditions.
It integrates three independent interrupt-capable modules: dual programmable alarms (with month-level granularity), high-speed event detect (pulse counting), and low-speed event detect (switch debouncing with selectable period). The watchdog timer features dedicated WDO output, clear-on-SPI or EVHS input, and user-selectable pulse width.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Time Resolution | Hundredth-of-second precision with leap-year compensation through year 2399 |
| Oscillator Support | 32.768 kHz crystal (6–9 pF load) or external clock; OSCRUN status flag for failure detection |
| Backup Current | 1.0 µA typical at 3.0V VBAT - enables >10-year coin-cell operation in low-power logging |
| Memory Resources | 64-byte SRAM, 2 Kbit EEPROM (page write ≤8 bytes, 1M endurance), 128-bit protected EEPROM with EUI-48™ |
| SPI Interface | 5 MHz max clock (2.5–3.6V), MSb-first, CS-active-low, SO high-impedance when deselected |
| Power Switchover | Automatic VCC-to-VBAT transition at 1.3–1.7V VTRIP; power-fail/power-up timestamps logged in dedicated registers |
| Operating Temp | -40°C to +85°C industrial grade - validated across full voltage range (1.8–3.6V VCC) |
Pinout & Package
14-pin SOIC and TSSOP packages; both share identical pin mapping and thermal characteristics per DS20002280E.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| X1 | Crystal input / external clock input | Accepts 32.768 kHz crystal or buffered clock; also serves as oscillator enable control via ST bit |
| X2 | Crystal output | Drives crystal resonator; must be left floating if external clock mode is selected (EXTOSC = 1) |
| VBAT | Backup supply input | Provides continuous power to RTCC and SRAM during VCC loss; supports 1.3–3.6V range |
| WDO | Watchdog timer output | Open-drain output; asserts low pulse on WDT timeout or assigned alarm trigger; requires 10 kΩ pull-up |
| IRQ | Interrupt request output | Open-drain output; latched low until cleared; supports event detect or alarm assignment |
| CS | Chip select input | Active-low SPI enable; initiates instruction decode on high-to-low transition after power-up |
| VSS | Ground reference | Primary return path for all digital and analog circuitry; must be low-impedance connection |
| SO | Serial output | Data-out line; high-impedance when CS is high; updated after falling edge of SCK |
| SI | Serial input | Data-in line; samples on rising edge of SCK; accepts instructions, addresses, and payload |
| SCK | Serial clock input | Synchronizes SPI transfers; rise/fall times ≤100 ns; clock low/high times ≥100 ns (2.5–3.6V) |
| EVHS | High-speed event input | Detects fast pulses (e.g., encoder outputs); generates IRQ on programmable count threshold |
| EVLS | Low-speed event input | Debounces mechanical switches; configurable debounce period; triggers IRQ on stable edge |
| CLKOUT | Configurable clock output | Programmable square-wave output (1 Hz to 32.768 kHz); can serve as system clock source |
| VCC | Main power supply | 1.8–3.6V operating range; powers EEPROM writes, SPI interface, and active RTCC functions |
Key Features
| Feature | Design Value |
|---|---|
| Dual programmable alarms | Each alarm compares against time/date registers up to month level; assignable to IRQ or WDO pins |
| Power-fail timestamping | Automatically logs exact time of VCC loss and restoration in dedicated PWRDN/PWRUP register sets |
| EUI-48™ MAC address | Factory-programmed 48-bit unique identifier stored in protected 128-bit EEPROM; unlock sequence required for write |
| On-chip digital trimming | Adjusts oscillator frequency in ±1 ppm steps over ±259 ppm range - eliminates manual capacitor tuning |
| Event detection modules | Independent high-speed (pulse counting) and low-speed (debounce) inputs with interrupt capability |
| Watchdog timer with dedicated output | Configurable timeout period; cleared via SPI CLRWDT command or EVHS edge; WDO pin supports pulse-width selection |
Applications
| Industrial Energy Metering | Medical Device Data Logging |
|---|---|
|
Use Scenario: Time-stamping kWh consumption events and firmware update cycles in smart electricity meters. IC Role / Device Role / Timing Role: Primary RTCC providing traceable, battery-backed time stamps synchronized to utility grid timing standards. Use Value: Enables compliance with IEC 62053-21 timestamp accuracy requirements and supports tamper-evident audit logs. |
Use Scenario: Recording patient vital sign measurements and therapy delivery times in portable infusion pumps. IC Role / Device Role / Timing Role: Autonomous timekeeper maintaining accurate timestamps during battery-only operation and power interruptions. Use Value: Ensures FDA 21 CFR Part 11-compliant audit trails with power-fail/power-up timestamps for regulatory reporting. |
| Smart Utility Endpoint Nodes | Industrial PLC Remote I/O Modules |
|
Use Scenario: Timestamping gas/water flow readings and valve actuation commands in AMI endpoint devices. IC Role / Device Role / Timing Role: System timing hub with EUI-48™ for device identity and dual alarms for scheduled maintenance alerts. Use Value: Eliminates need for MCU-based timekeeping; reduces BOM cost while enabling secure, unique node identification. |
Use Scenario: Maintaining deterministic cycle timing and fault-event timestamps in distributed I/O controllers. IC Role / Device Role / Timing Role: Standalone RTCC offloading time-critical functions from host PLC CPU to improve real-time response. Use Value: Guarantees sub-second timestamp resolution for diagnostics even during host processor resets or firmware updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RTC/backup memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP795W20T-I/SL | No EUI-48™ preprogramming; identical 2 Kbit EEPROM, same pinout and timing | Lacks factory-assigned MAC address - requires external ID storage or software-generated identifiers | Select when EUI-48™ is unnecessary and cost optimization is prioritized over out-of-box network identity |
| RV-3032-C3 | I²C interface (not SPI); 1.2 µA VDD timekeeping current; no event detect or watchdog modules | Supports simpler timing-only use cases; lacks pulse counting, switch debounce, and WDT functionality | Choose for space-constrained designs needing ultra-low quiescent current and I²C bus compatibility |
Compared with MCP795W21T-I/SL, MCP795W20T-I/SL removes EUI-48™ but retains full RTCC and memory functionality, while RV-3032-C3 trades SPI flexibility and integrated peripherals for lower power and I²C simplicity - making each suitable for distinct system architecture priorities.
Availability
MCP795W21T-I/SL is available at Aetrix Electronics and suitable for industrial energy metering, medical data logging, and smart utility endpoint applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for MCP795W21T-I/SL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and timing solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The MCP795Wxx family delivers highly integrated, battery-backed RTC functionality with enhanced system supervision - designed specifically for industrial, medical, and utility applications demanding robust timekeeping, event detection, and secure identity storage.
FAQ
What is the primary function of the MCP795W21T-I/SL?
The MCP795W21T-I/SL is a battery-backed SPI Real-Time Clock/Calendar IC that maintains accurate time and date (including hundredth-of-second resolution and leap-year compensation through 2399), logs power-fail/power-up events, and provides 2 Kbit EEPROM with EUI-48™ MAC address. It operates autonomously across -40°C to +85°C with 1.0 µA backup current at 3.0V VBAT.
Does the MCP795W21T-I/SL support external crystal oscillators?
Yes, the MCP795W21T-I/SL supports 32.768 kHz tuning fork crystals with 6–9 pF load capacitance via X1/X2 pins. It includes on-chip digital trimming (±259 ppm range, ±1 ppm resolution) and an OSCRUN status bit to verify oscillator operation. External clock input mode is also supported by driving X1 directly and floating X2.
How does the power-fail timestamp feature work in the MCP795W21T-I/SL?
The MCP795W21T-I/SL automatically logs the exact time of VCC loss and restoration into dedicated PWRDN and PWRUP register sets (addresses 0x18–0x1B and 0x1C–0x1F). This occurs during switchover to VBAT and back to VCC, using the same RTCC counters - enabling forensic analysis of power interruption duration and timing without MCU intervention.
What memory resources are included in the MCP795W21T-I/SL?
The MCP795W21T-I/SL integrates 64-byte battery-backed SRAM, 2 Kbit EEPROM (software write-protected, page-write up to 8 bytes, 1M endurance), and 128-bit protected EEPROM preprogrammed with EUI-48™. All memory remains accessible and retained during VBAT-only operation, with separate SPI instruction sets for RTCC/SRAM, EEPROM, and protected EEPROM access.
Can the MCP795W21T-I/SL replace older Microchip RTCs like the MCP79512?
Yes, the MCP795W21T-I/SL is a functional and pin-compatible upgrade to the MCP79512, adding EUI-48™, enhanced digital trimming (±1 ppm resolution), dual event detectors, and improved power-fail timestamping. It retains identical 14-pin SOIC/TSSOP packaging, SPI protocol, and register map compatibility - enabling drop-in replacement with firmware updates only for new features.
MCP795W21T-I/SL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Clock/Calendar
- Features:
- Alarm, EEPROM, Leap Year, Square Wave Output, SRAM, Unique ID, Watchdog Timer
- Memory Size:
- 64B
- Time Format:
- HH:MM:SS:hh (12/24 hr)
- Date Format:
- YY-MM-DD-dd
- Interface:
- SPI
- Voltage - Supply:
- 1.8V ~ 3.6V
- Voltage - Supply, Battery:
- 1.3V ~ 3.6V
- Current - Timekeeping (Max):
- 1µA @ 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 14-SOIC
MCP795W21T-I/SL FAQ
1.How can I place an order for MCP795W21T-I/SL through Aetrix?
Please submit a Request for Quotation (RFQ) for MCP795W21T-I/SL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MCP795W21T-I/SL reliable?
The price and inventory of MCP795W21T-I/SL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MCP795W21T-I/SL is usually 5 days.
3.What payment methods are accepted for MCP795W21T-I/SL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MCP795W21T-I/SL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MCP795W21T-I/SL?
MCP795W21T-I/SL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MCP795W21T-I/SL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MCP795W21T-I/SL?
For technical support, including MCP795W21T-I/SL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MCP795W21T-I/SL requirements.
6.How does Aetrix verify that MCP795W21T-I/SL is sourced from the original manufacturer or authorized distributors?
All MCP795W21T-I/SL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MCP795W21T-I/SL meets industry standards.
7.What is the process for return or replacement of MCP795W21T-I/SL?
All MCP795W21T-I/SL units undergo pre-shipment inspection (PSI). If there is an issue with MCP795W21T-I/SL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MCP795W21T-I/SL part is unused and in its original packaging.
Return procedure for MCP795W21T-I/SL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MCP795W21T-I/SL Tags
-
MCP7940N-I/SN
Microchip Technology
-
MCP7940MT-I/MNY
Microchip Technology
-
PCF85063ATL/1,118
NXP USA Inc.
-
MCP7940NT-I/SN
Microchip Technology
-
MCP7940NT-I/MS
Microchip Technology
-
MCP7940N-I/MS
Microchip Technology
-
PCF85063AT/AY
NXP USA Inc.
-
PCF85063TP/1Z
NXP Semiconductors
-
PCF85063ATT/AJ
NXP USA Inc.
-
MCP7940NT-E/SN
Microchip Technology
-
MCP7940NT-I/MNY
Microchip Technology
-
MCP79400T-I/SN
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
