NXP Semiconductors MCZ33937EKR2

Overview

MCZ33937EKR2 from NXP Semiconductors is a three-phase FET pre-driver IC designed for automotive motor control systems. It integrates six independent gate drivers (three high-side and three low-side), supports 6.0–58 V supply range, delivers up to 2.5 A peak gate drive current per channel, and features SPI-configurable dead time. It is used in electric power steering and belt starter generators where precise phase timing and fault resilience are critical.

For engineers reviewing the MCZ33937EKR2 datasheet, MCZ33937EKR2 pinout, MCZ33937EKR2 application, or MCZ33937EKR2 equivalent, this page provides verified technical context, validated pin functions, confirmed automotive-grade protection features, and real-world motor control use cases - all derived from NXP's official Rev. 14 product data sheet.

Technical Context

The MCZ33937EKR2 implements SMARTMOS technology with integrated charge pump and trickle-charge bootstrap circuitry to sustain high-side gate drive across full duty cycles. Its internal 15 V VLS regulator powers both low-side drivers and high-side bootstrap sources, while VSUP sensing enables phase-comparator-based desaturation detection.

SPI interface (up to 5.0 MHz) configures dead time, interrupt masking, and overcurrent thresholds; asynchronous EN1/EN2 enable logic ensures safe initialization sequence before high-side activation. All six gate outputs support ±15 V transient survival and resist negative current injection from external FETs' CGD/CGS.

Key Specifications

Pinout & Package

MCZ33937EKR2 is housed in an HSOP54 package (SOT1747-4): plastic thermal-enhanced small outline, 54 terminals, 0.65 mm pitch, 7.5 mm × 17.9 mm × 2.33 mm body, with exposed pad (EP) recommended to be connected to VSS and system ground.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar three-phase FET pre-driver applications.

Compared with MCZ33937EKR2, MC33937APEK offers identical performance and pin compatibility in alternate packaging, while MPQ6532-AEC1 trades SPI configurability and robust protection for smaller footprint and simplified layout - making it suitable only for less demanding, fixed-function applications.

Availability

MCZ33937EKR2 is available at Aetrix Electronics and suitable for automotive cooling fan control, electric power steering, and belt starter generator designs requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.

Supply support for MCZ33937EKR2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The MCZ33937EKR2 belongs to NXP's automotive motor control pre-driver product line, engineered specifically for high-reliability three-phase inverter interfaces in electrified vehicle subsystems - emphasizing robustness, configurability, and functional safety readiness.

FAQ

What is the maximum allowable VSUP voltage for MCZ33937EKR2 during transient conditions?

The MCZ33937EKR2 withstands VSUP transients up to 80 V, compliant with ISO 7637 load-dump specifications. This rating applies to short-duration spikes (≤400 ms) and ensures continued functionality without latch-up or damage when used with appropriate external clamping. The device remains operational across its full 6.0–58 V steady-state range, and the 80 V transient survival is validated per IEC 60134 limiting values.

Does MCZ33937EKR2 support 3.3 V microcontroller logic interfaces?

Yes, MCZ33937EKR2 accepts 3.0 V logic level inputs on EN1, EN2, Px_HS, Px_LS, CS, SI, SCLK, and RST pins - fully compatible with standard 3.3 V MCUs. Its outputs (INT, SO, PHASEA/B/C, OC_OUT) are 5.0 V logic level, but include internal level-shifting to ensure interoperability. No external level translators are required for interfacing with 3.3 V controllers.

How is dead time configured on MCZ33937EKR2?

Dead time on MCZ33937EKR2 is configured exclusively via its SPI interface using dedicated registers accessible through CS/SI/SCLK/SO. The value is programmable in discrete steps and applied globally across all three phases. Unlike fixed-delay alternatives, this allows dynamic adjustment during runtime - critical for optimizing efficiency across varying load and temperature conditions in automotive inverters.

Can MCZ33937EKR2 drive both N-channel and P-channel high-side FETs?

MCZ33937EKR2 is optimized for N-channel high-side FETs using bootstrap gate drive architecture. It does not support direct P-channel high-side drive, as its high-side outputs (PA_HS_G, etc.) are designed to source current relative to their respective HS_S pins - requiring an N-channel FET with source tied to HS_S and drain to VSUP. P-channel implementation would require redesign of the gate drive topology and is not supported.

What is the purpose of the PHASEA, PHASEB, and PHASEC pins on MCZ33937EKR2?

The PHASEA, PHASEB, and PHASEC pins on MCZ33937EKR2 are totem-pole comparator outputs that indicate whether the respective high-side FET source voltage (HS_S) is below 50 % of VSUP. Each pin goes low when its condition is met, enabling sensorless commutation or desaturation detection without external components. These signals are directly usable by MCU GPIOs for real-time phase monitoring and fault localization.