Monolithic Power Systems Inc. MEZDPD3603A-84E3

Overview

mEZDPD3603A-84E3 from Monolithic Power Systems is a fully integrated, programmable DC/DC power supply module delivering up to 3A continuous output current with adjustable 0.6–12V output voltage, operating from 4.5–36V input, housed in a standard DIP package (16×23×6.5 mm), and featuring I²C-based configuration via OTP and RAM registers for industrial power rail optimization.

For engineers reviewing the mEZDPD3603A-84E3 datasheet, mEZDPD3603A-84E3 pinout, mEZDPD3603A-84E3 application, or mEZDPD3603A-84E3 equivalent, this module supports rapid bench evaluation of multiple output configurations-including voltage, current limit, switching frequency, and compensation-without hardware changes, using the Virtual Bench Pro GUI and EVKT-USBI2C-02 interface.

Technical Context

The mEZDPD3603A-84E3 integrates a synchronous buck controller, power MOSFETs, inductor, and input/output capacitors into a single surface-mount DIP module. It implements hiccup-mode short-circuit protection and thermal shutdown at 175°C, with internal 5V LDO (VCC) powering control circuitry independently of VOUT.

Configuration occurs over I²C (SCL/SDA) with user-selectable slave address via external resistor (R2), supporting multi-module systems. Programmable parameters include output voltage setpoint (±1% accuracy), current limit threshold, switching frequency (typ. 500 kHz), and loop compensation coefficients-all stored in one-time-programmable ROM or volatile RAM.

Key Specifications

Pinout & Package

Package: Standard DIP module, 16 mm × 23 mm × 6.5 mm, surface-mount with exposed thermal pad on bottom (not electrically connected). Designed for automated placement and reflow soldering per JEDEC J-STD-020.

Availability

mEZDPD3603A-84E3 is available at Aetrix Electronics and suitable for industrial automation controllers, embedded computing power rails, and test equipment requiring stable component supply, programmable voltage sequencing, and rapid prototyping capability.

Supply support for mEZDPD3603A-84E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs and integrated power modules for industrial, telecom, and consumer applications.

The mEZD family delivers fully assembled, programmable DC/DC modules targeting design acceleration in space-constrained, thermally demanding applications where custom power design cycles are prohibitive.

FAQ

What is the difference between OTP and RAM programming modes?

OTP (one-time programmable ROM) stores configuration permanently-writing triggers automatic shutdown and restart, locking settings for production use. RAM allows unlimited real-time register writes for development and dynamic adjustment, but settings reset on power cycle unless copied to OTP.

Does mEZDPD3603A-84E3 require external components to operate?

Yes-minimum required external components are a 4.7 µF input capacitor (VIN–GND) and 22 µF output capacitor (VOUT–GND), plus pull-up resistors on SDA/SCL (typically 4.7 kΩ to VCC) and optional R2 for I²C address selection. No inductor or MOSFETs are needed-the module is fully integrated.

Can multiple mEZDPD3603A-84E3 modules be synchronized?

Yes-via the SYNC pin, which accepts an external clock signal (500 kHz typical) to phase-align switching across multiple modules, reducing input ripple and EMI peaks in multi-rail systems such as FPGA or ASIC power domains.

What is the role of the VCC pin, and can it power external circuitry?

VCC provides a regulated 5 V output from an internal LDO, intended primarily for biasing the module's control circuitry and I²C pull-ups. It can source up to 50 mA and may power low-current external logic (e.g., ADC reference, level shifters), provided total load stays within spec and local decoupling is used.

How does the PG (Power Good) signal behave during startup and fault conditions?

PG asserts high after VOUT reaches 90% of target and remains stable for ≥1 ms. It de-asserts within 10 µs during overcurrent, overtemperature, or undervoltage faults. PG is open-drain and requires an external pull-up resistor to a compatible logic voltage (e.g., 3.3 V or 5 V).

Is EN pin compatible with standard logic levels?

Yes-EN accepts 1.2 V minimum high-level input (V_IH) and 0.8 V maximum low-level input (V_IL) referenced to GND. It is compatible with 3.3 V and 5 V CMOS/TTL logic without level shifting, and features built-in hysteresis for noise immunity during power sequencing.