Microchip Technology MIC22950YML-TR
- Part No.:
- MIC22950YML-TR
- Manufacturer:
- Microchip Technology
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
MIC22950YML-TR.pdf
- Description:
- IC REG BUCK ADJ 10A 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:700
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MIC22950YML-TR from Micrel is a 10A integrated synchronous buck regulator IC with programmable switching frequency (400 kHz to 2 MHz), adjustable output voltage down to 0.7 V, and ultra-fast transient response optimized for FPGA and low-voltage ASIC power delivery in high-density point-of-load applications.
For engineers reviewing the MIC22950YML-TR datasheet, MIC22950YML-TR pinout, MIC22950YML-TR application, or MIC22950YML-TR equivalent, key selection considerations include its 32-pin 5 mm × 5 mm MLF® package, 2.6 V–5.5 V input range, integrated 11 mΩ P-FET / 8 mΩ N-FET switches, ramp-controlled soft-start via RC pin, and full sequencing capability using EN/DLY, DELAY, and POR/PG pins.
Technical Context
The MIC22950YML-TR implements a voltage-mode PWM control architecture with an internal ramp generator driven by the CF pin's 200 µA current source charging an external capacitor. Its control loop achieves >95% efficiency at 2 MHz across broad load ranges while maintaining regulation under extreme transient loads typical of FPGAs.
Sequencing and tracking are enabled through three dedicated pins: EN/DLY (1.24 V enable threshold with 1 µA pull-up), DELAY (1 µA timer for POR/PG assertion delay), and RC (1 µA programmable slew-rate control for output voltage ramp-up/down). All functions operate across −40°C to +125°C junction temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 10 A continuous - supports high-power digital loads like FPGAs without external current sharing. |
| Input Voltage Range | 2.6 V to 5.5 V - compatible with standard 3.3 V and 5 V intermediate bus rails. |
| Adjustable Output Voltage | Down to 0.7 V - enables direct regulation for sub-1 V core supplies (e.g., 0.85 V, 0.9 V, 1.0 V, 1.2 V, 1.8 V). |
| Switching Frequency | 400 kHz to 2 MHz - selectable via CF pin capacitor; higher frequencies reduce inductor/capacitor size but increase switching losses. |
| Efficiency | >95% at 2 MHz - achieved with integrated 11 mΩ P-FET and 8 mΩ N-FET, enabling compact, high-efficiency PoL designs. |
| Thermal Protection | 160°C over-temperature shutdown with 20°C hysteresis - prevents thermal runaway during sustained overload or poor PCB heatsinking. |
| Feedback Reference | 0.714 V (max) ±2% over temperature - sets output accuracy; used with external resistor divider on FB pin. |
Pinout & Package
Package: 32-pin 5 mm × 5 mm MLF® (MicroLeadFrame) with exposed center thermal pad (EP/GND), rated for −40°C to +125°C junction operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN (Pins 1,2,7,8,17,23,24) | Power Input Supply | Bypassed with 22 µF ceramic per pin; feeds high-side P-FET; requires low-ESR capacitors near IC. |
| EN/DLY (Pin 3) | Enable & Startup Delay Control | 1.24 V threshold; 1 µA internal current source charges external capacitor to set turn-on delay before regulation begins. |
| RC (Pin 5) | Ramp Control | 1 µA current source/sink controls output voltage slew rate; minimum 120 pF required; enables soft-start and tracking. |
| POR/PG (Pin 6) | Power-On Reset / Power-Good Output | Open-drain signal asserted high when VOUT ≥90% nominal and after DELAY timeout; indicates stable regulation. |
| SW (Pins 11,12,13,14,27,28,29,30) | Switch Node | Connection between internal P-FET source and N-FET drain; high-frequency, high-current path requiring short/wide PCB traces. |
| FB (Pin 20) | Feedback Input | Connects to resistor divider; compares against 0.7 V reference to regulate output; <1 nA input bias minimizes divider error. |
| COMP (Pin 21) | Compensation Network | External RC network (e.g., 1 kΩ + 10–47 pF) stabilizes voltage-mode loop; simplifies design vs. full external compensation. |
| EP / GND (Center Pad) | Thermal & Power Ground | Must be fully soldered to internal GND plane; critical for thermal dissipation and achieving full 10 A output capability. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated MOSFETs | 11 mΩ P-channel and 8 mΩ N-channel switches eliminate external FETs and gate drivers, reducing BOM count and layout complexity. |
| Programmable Frequency | 400 kHz–2 MHz via CF pin capacitor - allows trade-off between efficiency (lower fSW) and solution size (higher fSW). |
| Full Sequencing Support | EN/DLY, DELAY, and POR/PG pins enable precise power-up/power-down ordering across multiple rails without external logic. |
| Ramp-Controlled Soft-Start | RC pin sets monotonic output ramp rate - prevents inrush current, enables voltage tracking, and eliminates need for external soft-start ICs. |
| Ultra-Fast Transient Response | Stabilizes output within microseconds under step-load changes up to 10 A - critical for FPGA core supply stability during burst-mode operation. |
Applications
| Base Station RF Power Amplifier Bias | FPGA Core Voltage Regulation |
|---|---|
Use Scenario: Providing tightly regulated, low-noise 1.0 V bias to GaN RF power amplifiers in 5G macro base stations where rapid load transients occur during TDD switching. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 10 A peak current with <10 µs transient recovery and <±1% output deviation. Use Value: Enables single-chip 1.0 V generation with no external MOSFETs or complex compensation, reducing board area by >35% vs. controller+discrete solution. |
Use Scenario: Supplying configurable core voltage (0.7–1.2 V) to Xilinx Kintex or Intel Stratix FPGA banks during dynamic partial reconfiguration. IC Role / Device Role / Timing Role: Adjustable PoL converter with programmable soft-start (RC pin) and sequenced enable (EN/DLY) to meet FPGA power-up timing requirements. Use Value: Eliminates need for discrete sequencing ICs; RC-controlled ramp ensures voltage tracking between I/O and core rails during configuration. |
| Server CPU VRM Auxiliary Rail | Blu-ray Player SoC Power |
Use Scenario: Generating 1.8 V auxiliary rail for memory interface buffers and PCIe SerDes in dual-socket server motherboards with strict ripple and sequencing constraints. IC Role / Device Role / Timing Role: Secondary synchronous buck regulator synchronized via RC pin to primary VRM for ratio-metric tracking during power-up. Use Value: Achieves <±20 mV tracking error between 1.8 V and 1.2 V rails using only passive components - no additional ICs or firmware required. |
Use Scenario: Delivering 3.3 V and 1.2 V rails to Broadcom BCM7445 SoC in Blu-ray disc players where EMI compliance and thermal limits constrain solution size. IC Role / Device Role / Timing Role: Compact 5 mm × 5 mm MLF® buck regulator operating at 1.5 MHz to minimize filter component size and meet CISPR-32 Class B radiated emissions. Use Value: 95% efficiency at 2 MHz reduces heat sink requirement; lead-free MLF® package meets RoHS and halogen-free mandates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ8633BGLE-10-Z | 10 A, 2.7–16 V input, fixed 10 mΩ/8 mΩ FETs, 300 kHz–2.2 MHz fSW, QFN-16 package | Wider VIN range but lacks RC-based ramp control and multi-rail sequencing pins (no DELAY/POR/PG) | Preferred for industrial 12 V input systems needing higher VIN tolerance; not drop-in for FPGA sequencing-critical designs. |
| TPS546D24RSAR | 10 A, 4–18 V input, PMBus interface, 3.3 mΩ/1.9 mΩ FETs, 250 kHz–1.5 MHz fSW, 20-pin QFN | Digital control with telemetry and fault logging; no analog RC ramp or DELAY pin; larger footprint | Chosen when system-level monitoring, margining, or dynamic voltage scaling is required; adds firmware overhead vs. MIC22950YML-TR's analog simplicity. |
Compared with MPQ8633BGLE-10-Z and TPS546D24RSAR, the MIC22950YML-TR uniquely integrates analog sequencing (EN/DLY, DELAY, POR/PG) and programmable slew rate (RC) in a compact MLF® package-enabling deterministic, firmware-free multi-rail coordination ideal for FPGA and ASIC power trees.
Availability
MIC22950YML-TR is available at Aetrix Electronics and suitable for high-power density point-of-load conversion, FPGA/ASIC core supply, and telecom infrastructure applications requiring stable component supply and long-term production continuity.
Supply support for MIC22950YML-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Micrel Inc. was a U.S.-based semiconductor company specializing in power management, analog, and mixed-signal ICs, acquired by Microchip Technology in 2015. Its legacy power products emphasize high integration and robust analog control.
The MIC22950YML-TR belongs to Micrel's MIC22x00 family of integrated synchronous buck regulators, designed specifically for high-current, low-voltage point-of-load applications in computing, networking, and consumer electronics where small size, fast transient response, and sequencing capability are essential.
FAQ
What is the maximum output current capability of the MIC22950YML-TR?
The MIC22950YML-TR delivers up to 10 A continuous output current under proper thermal conditions - verified across −40°C to +125°C junction temperature with adequate PCB copper area and the EP/GND pad fully soldered to a thermal plane. Peak current limit is internally set at 16.5 A (typical), providing headroom for transient loads without external current sensing.
How is the switching frequency programmed on the MIC22950YML-TR?
The MIC22950YML-TR switching frequency is set by an external capacitor connected to the CF pin. A 200 µA internal current source charges this capacitor to 1 V, defining the switching period. Using a 390 pF capacitor yields ~510 kHz (typical); values from 68 pF to 560 pF scale frequency from ~1.7 MHz down to ~400 kHz, as shown in the datasheet's Figure 3.
Can the MIC22950YML-TR be used for voltage tracking between multiple rails?
Yes - the MIC22950YML-TR supports both ratio-metric and normal voltage tracking via its RC pin. When the RC pin of one device is driven by the output of another (or by a shared ramp source), output voltages track during startup/shutdown. The datasheet provides explicit circuit examples for two-MIC22950 tracking configurations with matched rise/fall times.
What is the purpose of the DELAY pin on the MIC22950YML-TR?
The DELAY pin on the MIC22950YML-TR controls the timing of the POR/PG signal assertion. A capacitor from DELAY to SGND is charged by a 1 µA current source once FB reaches 90% of nominal output. When DELAY voltage hits 1.24 V, POR/PG goes high - enabling controlled sequencing of downstream circuits or other regulators without external timers.
Does the MIC22950YML-TR require external compensation components?
Yes - the MIC22950YML-TR uses simplified external compensation via the COMP pin. A series RC network (e.g., 1 kΩ resistor + 10–47 pF capacitor to SGND) is required to stabilize the voltage-mode control loop. The recommended values depend on inductor and output capacitor selection, with tables provided in the datasheet for common L/C combinations.
MIC22950YML-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.6V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.7V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 10A
- Frequency - Switching:
- 400kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
MIC22950YML-TR FAQ
1.How can I place an order for MIC22950YML-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC22950YML-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC22950YML-TR reliable?
The price and inventory of MIC22950YML-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC22950YML-TR is usually 5 days.
3.What payment methods are accepted for MIC22950YML-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC22950YML-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC22950YML-TR?
MIC22950YML-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC22950YML-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC22950YML-TR?
For technical support, including MIC22950YML-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC22950YML-TR requirements.
6.How does Aetrix verify that MIC22950YML-TR is sourced from the original manufacturer or authorized distributors?
All MIC22950YML-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC22950YML-TR meets industry standards.
7.What is the process for return or replacement of MIC22950YML-TR?
All MIC22950YML-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC22950YML-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC22950YML-TR part is unused and in its original packaging.
Return procedure for MIC22950YML-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MIC22950YML-TR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

