Microchip Technology MIC24067T-E/QNA
- Part No.:
- MIC24067T-E/QNA
- Manufacturer:
- Microchip Technology
- Package:
- 36-VFQFN Exposed Pad
- Datasheet:
-
MIC24067T-E/QNA.pdf
- Description:
- IC REG BUCK ADJ 6A 36VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,541
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MIC24067T-E/QNA from Microchip Technology is a 36V, 6A synchronous buck regulator with adaptive constant-on-time control, programmable HLL/CCM light-load operation, and integrated high- and low-side N-channel MOSFETs (RDSON_HS = 22 mΩ, RDSON_LS = 8.5 mΩ). It delivers tightly regulated output from 0.6V to 32V with ±1% reference accuracy and supports start-up into pre-biased outputs - ideal for high-power-density point-of-load conversion in telecom base stations and server VRMs.
For engineers reviewing the MIC24067T-E/QNA datasheet, MIC24067T-E/QNA pinout, MIC24067T-E/QNA application, or MIC24067T-E/QNA equivalent, key selection considerations include its 36-pin Wettable Flank VQFN package, Hyper Speed Control® architecture for ultra-fast transient response, dual LDO biasing (PVDD + EXTVDD), and configurable soft-start/light-load mode via SS/MODE pin.
Technical Context
The MIC24067T-E/QNA implements an enhanced high-voltage COT controller co-packaged with avalanche-rated N-FETs, enabling stable regulation across 4.5V–36V input while maintaining sub-100 ns minimum on-time (60 ns typ.) and 100–300 ns minimum off-time. Its proprietary Hyper Speed Control® loop reduces required output capacitance without sacrificing transient performance.
It features dual LDO architecture: a high-voltage internal LDO powers PVDD (4.8–5.4 V) for gate drivers, while EXTVDD allows external biasing from the output rail to improve system efficiency. The SS/MODE pin configures either HLL mode (high light-load efficiency) or CCM mode (constant switching frequency), with thermal shutdown (160°C, 20°C hysteresis) and hiccup current limiting for robust fault protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 36 V - supports wide industrial and telecom supply rails including 12 V, 24 V, and 36 V systems. |
| Output Current | 6 A continuous - sufficient for high-power CPU/GPU core rails and FPGA auxiliary supplies. |
| Feedback Reference | 0.6 V ±1% - enables precise low-voltage regulation down to 0.6 V with minimal resistor divider error. |
| Switching Frequency | 270 kHz to 800 kHz - programmable via FREQ pin to optimize EMI, efficiency, and inductor size. |
| Light-Load Mode | Programmable HLL or CCM - HLL improves light-load efficiency; CCM maintains fixed fSW across full load range. |
| Junction Temp Range | −40°C to +125°C - qualified for extended industrial and telecom base station environments. |
| Package | 36-pin 5 mm × 6 mm Wettable Flank VQFN - supports automated optical inspection (AOI) and high thermal reliability. |
Pinout & Package
Package: 36-pin, 5 mm × 6 mm Wettable Flank VQFN with exposed thermal pad bonded to AGND. Includes multiple VIN, SW, PGND, and AGND pins for low-impedance power delivery and grounding.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pins 7–13, 19–22, 28, 36) | Main power input to internal FETs | Parallel connection of 12 pins minimizes PCB trace resistance and inductance for high-current switching paths. |
| SW (Pins 5, 19–22) | Switch node between high- and low-side FETs | Multi-pin SW routing enables low-inductance inductor connection and supports high di/dt (≥10 A/µs) without ringing. |
| PGND (Pins 15–18, 30–31) | Power ground return for low-side FET and driver | Eight dedicated PGND pins reduce ground bounce and improve current limit accuracy during fast transients. |
| AGND (Pins 4, 25, 32–33, EP) | Analog reference ground for control circuitry | Separate AGND network prevents noise coupling into FB, ILIM, and SS/MODE; EP tied directly to AGND for signal integrity. |
| SS/MODE (Pin 30) | Mode selection input | Configures MIC24067-specific operation: AGND = HLL mode; VDD = CCM mode - no external components needed. |
| ILIM (Pin 3) | Current limit programming node | Resistor from ILIM to SW sets overcurrent threshold; supports adjustable peak current limit from ~5 A to >10 A. |
| FB (Pin 31) | Feedback voltage sensing input | Regulates output by comparing divider voltage to 0.6 V reference; supports remote sensing with Kelvin connections. |
| PG (Pin 2) | Open-drain power-good indicator | Asserts low when VOUT drops >10% below target; requires external 10 kΩ pull-up to VDD for logic-high signaling. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Constant-On-Time Control | Enables ultra-fast load transient response (<10 µs recovery) without external compensation components. |
| Dual LDO Bias Architecture | PVDD (5.1 V typ.) powers gate drivers; EXTVDD accepts 4.7–14 V external bias to eliminate internal LDO losses and boost efficiency. |
| Pre-Biased Output Start-Up | Allows safe turn-on when output capacitor is already charged - essential for hot-swap and multi-rail sequencing applications. |
| Internal Compensation | Eliminates need for external Type-II/III compensation network, reducing BOM count and layout sensitivity. |
| Hiccup Short-Circuit Protection | Enters timed restart cycle upon overcurrent detection - limits average power dissipation during sustained faults. |
| Wettable Flank Packaging | Facilitates automated AOI of solder joints on bottom-side pins, improving manufacturing yield and field reliability. |
Applications
| Telecom Base Station RF Power Supply | Server CPU Core VRM |
|---|---|
Use Scenario: Provides 1.0 V @ 6 A to GaN RF amplifier stages with tight ripple and fast transient response under burst-mode traffic loads. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with Hyper Speed Control® loop managing dynamic load steps up to 4 A/µs. Use Value: Reduces output capacitance by ≥40% vs. conventional CCM controllers while maintaining <±10 mV droop during 0→6 A step. |
Use Scenario: Delivers 0.8–1.2 V @ 6 A to high-performance x86 CPU cores in 1U rack servers with strict thermal and space constraints. IC Role / Device Role / Timing Role: High-efficiency point-of-load converter operating in HLL mode at idle and CCM under full load. Use Value: Achieves >92% efficiency at 1 A (HLL) and >94% at 6 A (CCM), minimizing VRM heat sink requirements. |
| Industrial PLC I/O Module Power | Network Switch ASIC Supply |
Use Scenario: Generates isolated 3.3 V @ 6 A for dense digital I/O banks in DIN-rail mounted PLCs with wide ambient temperature range. IC Role / Device Role / Timing Role: Main DC-DC stage accepting 24 V nominal input with UVLO and thermal protection for unattended operation. Use Value: −40°C to +125°C junction rating and wettable flank package ensure long-term reliability in convection-cooled enclosures. |
Use Scenario: Supplies 1.2 V @ 6 A to multi-core network switch ASICs requiring low-noise, high-PG accuracy for clock domain stability. IC Role / Device Role / Timing Role: Regulator with open-drain PG output synchronized to FB regulation window (±10% of 0.6 V). Use Value: PG assertion delay <100 µs ensures clean power sequencing with FPGA configuration logic and SerDes PLLs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIC24066T-E/QNA | Same family, but supports programmable soft-start (via SS capacitor) instead of HLL/CCM mode selection; identical pinout and electrical specs otherwise. | Preferred where controlled ramp-up is critical (e.g., FPGA configuration rails), not where light-load efficiency optimization is primary. | Select MIC24066T-E/QNA only if soft-start time must be externally tuned; MIC24067T-E/QNA is optimal for dynamic load efficiency trade-offs. |
| MPQ4470AGL-Z | 40 V, 6 A buck with fixed 500 kHz fSW, no HLL/CCM selection, lower quiescent current (25 µA), but lacks EXTVDD and pre-bias start-up support. | Suitable for cost-sensitive, fixed-frequency applications without complex sequencing or ultra-low standby requirements. | Choose MPQ4470AGL-Z for simpler designs lacking light-load efficiency demands or external biasing needs. |
Compared with MIC24066T-E/QNA, the MIC24067T-E/QNA trades soft-start programmability for selectable light-load modes - delivering up to 5% higher efficiency at 100 mA while retaining identical thermal performance and protection features. Against MPQ4470AGL-Z, it adds EXTVDD biasing and pre-bias start-up at the cost of slightly higher quiescent current.
Availability
MIC24067T-E/QNA is available at Aetrix Electronics and suitable for telecom infrastructure, server power delivery, and industrial embedded systems requiring stable component supply, long-lifecycle support, and AEC-Q200–adjacent reliability validation.
Supply support for MIC24067T-E/QNA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and power management ICs, with global design, manufacturing, and support infrastructure.
The MIC24066/7 product line was developed specifically for high-power-density, high-efficiency point-of-load conversion in datacenter, telecom, and industrial equipment - emphasizing thermal robustness, transient performance, and flexible biasing.
FAQ
What is the maximum duty cycle supported by the MIC24067T-E/QNA?
The MIC24067T-E/QNA supports a maximum duty cycle of 85%, limited by its fixed mandatory off-time of typically 300 ns. This value is confirmed in the Electrical Characteristics table (DS20006730A-page 7) and applies across the full 4.5–36 V input range when configured for 400 kHz operation with R5 = R6 = 100 kΩ. Duty cycle directly impacts minimum achievable output voltage at high input voltages.
How does the EXTVDD pin improve system efficiency in the MIC24067T-E/QNA?
The EXTVDD pin allows bypassing the internal high-voltage LDO by supplying 4.7–14 V directly to the low-voltage bias rail. When connected to the output of the main buck stage (e.g., 5 V or 3.3 V), it eliminates LDO dropout losses - reducing total IC quiescent power by up to 40% and increasing full-load efficiency by 0.5–1.2 percentage points depending on input voltage.
Can the MIC24067T-E/QNA start up into a pre-biased output, and how is this enabled?
Yes, the MIC24067T-E/QNA supports start-up into a pre-biased output - a feature explicitly documented in the General Description and verified in Figure 2-24 (DS20006730A-page 13). It requires no external enable sequence or configuration; the controller automatically detects pre-bias and disables high-side FET turn-on until SW node voltage aligns with feedback setpoint, preventing reverse current flow.
What is the purpose of the SS/MODE pin on the MIC24067T-E/QNA, and how is it configured?
On the MIC24067T-E/QNA, the SS/MODE pin (Pin 30) selects light-load operating mode: connecting to AGND enables HyperLight Load® (HLL) mode for highest efficiency at light loads, while connecting to VDD forces Continuous Conduction Mode (CCM) across the full load range. Unlike MIC24066, it does not support soft-start capacitor programming - that function is exclusive to the MIC24066 variant.
What thermal protection features are implemented in the MIC24067T-E/QNA?
The MIC24067T-E/QNA includes thermal shutdown with a trigger threshold of 160°C (typ.) and 20°C hysteresis (DS20006730A-page 8). Once tripped, the device halts switching and remains disabled until junction temperature falls below 140°C. This behavior is validated in Figure 2-31 and Figure 2-34, ensuring safe operation under sustained overload or inadequate heatsinking conditions.
MIC24067T-E/QNA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 36-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 32V
- Current - Output:
- 6A
- Frequency - Switching:
- 270kHz ~ 800kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 36-VQFN-EP (5x6)
MIC24067T-E/QNA FAQ
1.How can I place an order for MIC24067T-E/QNA through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC24067T-E/QNA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC24067T-E/QNA reliable?
The price and inventory of MIC24067T-E/QNA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC24067T-E/QNA is usually 5 days.
3.What payment methods are accepted for MIC24067T-E/QNA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC24067T-E/QNA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC24067T-E/QNA?
MIC24067T-E/QNA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC24067T-E/QNA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC24067T-E/QNA?
For technical support, including MIC24067T-E/QNA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC24067T-E/QNA requirements.
6.How does Aetrix verify that MIC24067T-E/QNA is sourced from the original manufacturer or authorized distributors?
All MIC24067T-E/QNA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC24067T-E/QNA meets industry standards.
7.What is the process for return or replacement of MIC24067T-E/QNA?
All MIC24067T-E/QNA units undergo pre-shipment inspection (PSI). If there is an issue with MIC24067T-E/QNA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC24067T-E/QNA part is unused and in its original packaging.
Return procedure for MIC24067T-E/QNA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MIC24067T-E/QNA Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

