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Microchip Technology MIC2800-G4MYML-TR

Part No.:
MIC2800-G4MYML-TR
Manufacturer:
Microchip Technology
Category:
Voltage Regulators - Linear + Switching
Package:
16-VFQFN
Datasheet:
AetrixMIC2800-G4MYML-TR.pdf
Description:
IC REG TRPL BUCK/LNR 2MHZ 16QFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,193

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Product details

Overview

MIC2800-G4MYML-TR from Microchip Technology is a digital power management IC integrating a 2 MHz, 600 mA synchronous buck DC/DC converter and two independent 300 mA LDOs (LDO1 and LDO2) in a single 16-pin 3 mm × 3 mm QFN package. It delivers three regulated outputs with adjustable POR delay, LOWQ ultra-low-noise light-load mode (75 µVRMS noise, 30 µA total IQ), and thermal/current protection - designed for embedded MPU core and I/O rail sequencing in battery-powered SAMA5D2-based systems.

For engineers reviewing the MIC2800-G4MYML-TR datasheet, MIC2800-G4MYML-TR pinout, MIC2800-G4MYML-TR application, or MIC2800-G4MYML-TR equivalent, key selection criteria include dual-LDO flexibility, LOWQ mode noise performance vs. load transient response, POR delay programmability via CSET, and compatibility with ceramic output capacitors and small inductors (2.2 µH).

Technical Context

The MIC2800-G4MYML-TR implements a fixed-frequency PWM buck regulator (2 MHz ±10%) with internal high-side/low-side MOSFETs and an error amplifier referenced to FB, alongside two independent LDO regulators: LDO1 powered from the DC/DC output (enabling 1.5 V–1.8 V conversion), and LDO2 powered directly from VIN (supporting up to 5.5 V input). The LOWQ pin selects between full-power PWM mode (600 mA DC/DC + 300 mA LDO1 + 300 mA LDO2) and low-noise linear regulation mode (60 mA LDO-only output, 75 µVRMS noise, 20–30 µA IQ).

Its POR circuit performs a logic-OR of all three output voltage statuses (DC/DC, LDO1, LDO2), with programmable turn-on delay (via CSET capacitor) and minimal turn-off delay. The device uses separate SGND and PGND pins, BIAS decoupling (0.1 µF), and ESD-hardened LOWQ/POR pins enabling safe interfacing with backup-power-domain host I/Os without parasitic leakage.

Key Specifications

Parameter Value and Actual Design Meaning
Input Voltage Range 2.7 V to 5.5 V - supports single-cell Li-ion, USB, and industrial 3.3 V/5 V rails without external pre-regulation.
DC/DC Output Current 600 mA in PWM mode - sufficient for ARM Cortex-A5 core supply (e.g., SAMA5D2 VDD_CORE) at 1.2–1.8 V.
LDO1/LDO2 Output Current 300 mA each - enables simultaneous powering of DDR I/O (VDDIO_DDR) and peripheral I/O (VDD_IO) rails.
LOWQ Mode IQ 30 µA total - extends battery life in sleep states while maintaining regulated output with <75 µVRMS noise.
POR Delay Programmability Capacitor-set (CSET pin) - allows precise power-rail sequencing (e.g., VDD_CORE before VDDIO_DDR) up to 1 s.
Thermal Protection 160 °C shutdown with 23 °C hysteresis - prevents damage during sustained overload or poor PCB thermal design.
Package 16-pin 3 mm × 3 mm QFN - compact footprint compatible with dense portable/wearable PCB layouts.

Pinout & Package

Package: 16-pin, 3 mm × 3 mm, 0.5 mm pitch, leadless QFN with exposed thermal pad (PGND-connected). Requires SGND/PGND separation and thermal via array under pad for reliable operation at full load.

Pin/Terminal Circuit Role Design Meaning
Pin 1 (LOWQ) Mode control input Active-low logic: LOW = LOWQ linear mode (20–30 µA IQ, 60 mA LDO output); HIGH = PWM mode (600 mA DC/DC + dual 300 mA LDOs).
Pin 2 (BIAS) Bias supply Internal reference and control circuitry power; requires 0.1 µF ceramic bypass to SGND - not for external loading.
Pin 3 (SGND) Signal ground Low-current return path for BIAS, FB, POR, CSET, EN1/EN2 - must be routed separately from PGND to avoid noise coupling.
Pin 4 (PGND) Power ground High-current return for SW node and LDO2 - connects to thermal pad; must tie to SGND at single point near device.
Pin 5 (SW) Switch node Drives external 2.2 µH inductor; high dv/dt node requiring short, shielded routing away from analog/sensitive traces.
Pin 6 & 7 (VIN) Main input supply Dual pins tied externally - powers DC/DC stage (Pin 6) and LDO2 (Pin 7); requires ≥4.7 µF ceramic bypass to PGND.
Pin 8 (LDO2) LDO2 output 300 mA regulated output (e.g., 2.8 V for VDD_IO); requires ≥2.2 µF ceramic output capacitor.
Pin 9 (FB) DC/DC feedback Connects to DC/DC output for fixed-voltage versions; sets output voltage via internal resistor divider - no external resistors needed.
Pin 10 (LDO) LOWQ mode output Supplies LDO1 in PWM mode; becomes main output in LOWQ mode - must connect to DC/DC VOUT node.
Pin 11 (LDO1) LDO1 output 300 mA output powered by DC/DC VOUT (e.g., 1.2 V for VDD_CORE); requires ≥2.2 µF ceramic output capacitor.
Pin 12 (POR) Open-drain reset flag Asserts low if any output (DC/DC, LDO1, LDO2) falls below 90% nominal - requires external pull-up to valid rail (VIN or VOUT).
Pin 13 (CSET) POR delay timing 1.25 µA current source charges external capacitor to set POR turn-on delay (1 pF = 1 µs delay, up to 1 s).
Pin 14 (CBYP) Reference bypass Connects 0.1 µF ceramic to SGND to reduce output noise and improve PSRR - optional but recommended.
Pin 15 (EN1) DC/DC & LDO1 enable Active-high CMOS input (VIH ≥1.0 V); controls both DC/DC and LDO1 - floating prohibited.
Pin 16 (EN2) LDO2 enable Active-high CMOS input (VIH ≥1.0 V); independent control of LDO2 - enables staggered power-up sequencing.

Key Features

Feature Design Value
LOWQ ultra-low-noise mode Reduces DC/DC output noise to 75 µVRMS (10 Hz–100 kHz) and total IQ to ≤30 µA - critical for RF-sensitive wearable applications.
Programmable POR sequencing Enables precise power-rail startup order (e.g., core before I/O) via CSET capacitor - eliminates need for external sequencer ICs.
Backup-power-safe signaling LOWQ and POR pins lack clamping diodes to VIN - allows direct connection to host I/Os powered by backup batteries without leakage paths.
Small external component count Operates stably with 2.2 µH inductor and 2.2 µF ceramic output capacitors on all rails - reduces BOM cost and board area.
Independent dual-LDO control EN1 and EN2 allow separate enable/disable of DC/DC+LDO1 vs. LDO2 - supports dynamic power gating of peripherals without affecting core supply.
Thermal and current protection Integrated 160 °C thermal shutdown and per-rail current limiting (DC/DC: 750–1600 mA; LDO1/LDO2: 350–850 mA) - ensures robustness under fault conditions.

Applications

Embedded MPU Power Portable Wearable Systems

Use Scenario: Powering SAMA5D2 MPU with independent VDD_CORE (1.2 V), VDDIO_DDR (1.8 V), and VDD_IO (2.8 V) rails.

IC Role / Device Role / Timing Role: Single-chip triple-output PMIC providing sequenced, low-noise, and efficient power delivery with integrated POR monitoring.

Use Value: Eliminates discrete DC/DC + dual-LDO solution, reducing layout complexity and enabling fast, reliable boot with programmable POR delay.

Use Scenario: Battery-powered smartwatch with ARM Cortex-M core, BLE radio, and OLED display.

IC Role / Device Role / Timing Role: Primary power manager delivering ultra-low-IQ sleep mode (LOWQ) and clean RF supply (LDO2) with <75 µVRMS noise.

Use Value: Extends battery runtime in standby while ensuring BLE radio stability via low-noise LDO2 output and ESD-hardened backup signaling.

Low-Power RF Systems Backup Power Systems

Use Scenario: Sub-GHz IoT sensor node with Si4463 transceiver and microcontroller.

IC Role / Device Role / Timing Role: Supplies clean 3.3 V LDO2 output for RF front-end while using LOWQ mode during sensor sampling intervals.

Use Value: Prevents RF interference from switching noise during active transmission, verified by 75 µVRMS noise spec in LOWQ mode.

Use Scenario: Industrial controller with real-time clock (RTC) and SRAM retention during main power loss.

IC Role / Device Role / Timing Role: Enables host MPU to monitor system status via POR and LOWQ pins even when main VIN is removed.

Use Value: ESD-hardened LOWQ and POR pins interface directly with backup-supplied GPIOs - no level shifters or isolation required.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail power management applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPS65023BRSBT Triple-output PMIC with 600 mA buck + dual 300 mA LDOs; fixed 2.25 MHz switching; no LOWQ mode; higher IQ (80 µA typical). Lacks ultra-low-noise light-load capability - unsuitable for RF-critical or long-battery-life designs requiring <100 µVRMS noise. Select when fixed-frequency consistency and TI ecosystem support outweigh LOWQ noise benefits.
RTQ2134BGQW Single 600 mA buck + single 300 mA LDO; no second LDO; includes I²C interface; 30 µA IQ in deep-sleep mode. Cannot replace MIC2800-G4MYML-TR's dual-LDO architecture - requires external LDO for third rail, increasing BOM and layout effort. Select only if system needs digital control and can accommodate external LDO for I/O rail.

Compared with TPS65023BRSBT and RTQ2134BGQW, the MIC2800-G4MYML-TR uniquely combines dual independent LDOs, programmable POR sequencing, and LOWQ mode's 75 µVRMS noise - making it optimal for space-constrained, battery-powered MPU systems demanding clean, sequenced, and ultra-low-IQ power.

Availability

MIC2800-G4MYML-TR is available at Aetrix Electronics and suitable for embedded MPU power, portable wearable systems, low-power RF systems, and backup power systems requiring stable component supply across industrial temperature range (–40°C to +125°C) and long-term production continuity.

Supply support for MIC2800-G4MYML-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and power management ICs, headquartered in Chandler, Arizona, with global design and manufacturing operations.

The MIC2800 product line is designed for highly integrated, low-power power management in ARM-based embedded systems - emphasizing rail sequencing, ultra-low-noise operation, and backup-power-domain interoperability.

FAQ

What is the function of the LOWQ pin on the MIC2800-G4MYML-TR?

The LOWQ pin on the MIC2800-G4MYML-TR is an active-low logic input that selects between two operating modes: when pulled high (>1 V), the device operates in full-power 2 MHz PWM mode delivering up to 600 mA from the DC/DC and 300 mA from each LDO; when pulled low (<0.2 V), it enters LOWQ mode, disabling the DC/DC switcher and regulating output solely through the LDO path with 75 µVRMS noise and ≤30 µA total quiescent current. This pin is ESD-hardened and safe for direct connection to backup-power-domain host I/Os.

How is POR delay programmed on the MIC2800-G4MYML-TR?

POR delay on the MIC2800-G4MYML-TR is programmed using an external capacitor connected from the CSET pin (Pin 13) to SGND. The internal 1.25 µA current source charges this capacitor; when the voltage reaches 1.25 V, the POR output is allowed to go high. The delay time in microseconds equals the capacitor value in picofarads - e.g., a 1 nF capacitor yields a 1 ms delay, and a 1 µF capacitor yields a 1 s delay. The POR turn-off delay remains minimal and unprogrammable.

Can the MIC2800-G4MYML-TR power both core and I/O rails of an ARM MPU simultaneously?

Yes, the MIC2800-G4MYML-TR is specifically designed to power both core and I/O rails of ARM MPUs like the SAMA5D2. Its LDO1 output (300 mA, powered by the DC/DC output) delivers the core voltage (e.g., 1.2 V), while its LDO2 output (300 mA, powered directly from VIN) supplies the I/O voltage (e.g., 2.8 V). The DC/DC converter provides the intermediate rail (e.g., 1.8 V) for DDR memory. Independent EN1 and EN2 pins enable precise sequencing - for example, enabling DC/DC and LDO1 first, then LDO2 after a CSET-programmed delay.

What are the minimum external components required for stable operation of the MIC2800-G4MYML-TR?

For stable operation, the MIC2800-G4MYML-TR requires: (1) a 4.7 µF ceramic capacitor between VIN and PGND; (2) a 2.2 µH shielded inductor between SW and the DC/DC output; (3) 2.2 µF ceramic capacitors on LDO1 and LDO2 outputs; (4) a 0.1 µF ceramic capacitor on BIAS to SGND; and (5) a 0.1 µF ceramic capacitor on CBYP to SGND (recommended for noise reduction). The CSET capacitor is optional but required for POR delay programming. No external feedback resistors are needed for fixed-output versions.

Does the MIC2800-G4MYML-TR support operation across the full industrial temperature range?

Yes, the MIC2800-G4MYML-TR is specified for continuous operation from –40°C to +125°C junction temperature. Its electrical characteristics - including output voltage accuracy (±2% typ.), load regulation, PSRR, and current limits - are guaranteed across this full range, as confirmed in Tables 1-1 through 1-4 of the official datasheet (DS20005839B). Thermal shutdown activates at 160°C with 23°C hysteresis to ensure reliability under sustained overload or elevated ambient conditions.

MIC2800-G4MYML-TR Specifications

Product attributes
Attribute value
Manufacturer:
Microchip Technology
Series:
-
Package/Case:
16-VFQFN
Packaging:
Tape & Reel (TR)
Product Status:
Active
Topology:
Step-Down (Buck) (1), Linear (LDO) (2)
Number of Outputs:
3
Frequency - Switching:
2MHz
Voltage/Current - Output 1:
1.8V, 600mA
Voltage/Current - Output 2:
1.2V, 300mA
Voltage/Current - Output 3:
2.8V, 300mA
w/LED Driver:
No
w/Supervisor:
No
w/Sequencer:
No
Voltage - Supply:
2.7V ~ 5.5V
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-QFN (3x3)

MIC2800-G4MYML-TR FAQ

1.How can I place an order for MIC2800-G4MYML-TR through Aetrix?

Please submit a Request for Quotation (RFQ) for MIC2800-G4MYML-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MIC2800-G4MYML-TR reliable?

The price and inventory of MIC2800-G4MYML-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC2800-G4MYML-TR is usually 5 days.

3.What payment methods are accepted for MIC2800-G4MYML-TR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC2800-G4MYML-TR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MIC2800-G4MYML-TR?

MIC2800-G4MYML-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MIC2800-G4MYML-TR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MIC2800-G4MYML-TR?

For technical support, including MIC2800-G4MYML-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC2800-G4MYML-TR requirements.

6.How does Aetrix verify that MIC2800-G4MYML-TR is sourced from the original manufacturer or authorized distributors?

All MIC2800-G4MYML-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC2800-G4MYML-TR meets industry standards.

7.What is the process for return or replacement of MIC2800-G4MYML-TR?

All MIC2800-G4MYML-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC2800-G4MYML-TR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MIC2800-G4MYML-TR part is unused and in its original packaging.

Return procedure for MIC2800-G4MYML-TR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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