Microchip Technology MIC2810-1JGMYML-TR

Overview

MIC2810-1JGMYML-TR from Microchip Technology is a digital power management IC integrating a 2 MHz, 600 mA DC/DC buck converter and two independent 300 mA LDOs (LDO1 and LDO2), all with separate enable controls. It operates across 2.7V–5.5V input (VIN/VIN2) and 1.65V–5.5V (VIN1), delivers output voltages of 1.25V/1.8V/2.8V respectively, and supports LOWQ mode for ultra-low-noise, 30 µA quiescent operation - ideal for RF-sensitive portable MPU power systems.

For engineers reviewing the MIC2810-1JGMYML-TR datasheet, MIC2810-1JGMYML-TR pinout, MIC2810-1JGMYML-TR application, or MIC2810-1JGMYML-TR equivalent, key selection considerations include its triple-output sequencing capability, 53 µVRMS DC/DC noise in LOWQ mode, thermal shutdown protection, 16-pin 3 mm × 3 mm QFN package, and programmable POR delay via CSET pin.

Technical Context

The MIC2810-1JGMYML-TR implements a dual-mode DC/DC architecture: PWM mode (2 MHz, up to 600 mA, >90% efficiency) and LOWQ linear mode (30 µA IQ, 53 µVRMS noise, 60 mA max). Its three regulated outputs are independently enabled (EN, EN1, EN2), with POR monitoring all channels via open-drain output and user-programmable delay using CSET current source (1.25 µA) and external capacitor.

LDO1 (VIN1 = 1.65V–5.5V) and LDO2 (VIN2 = 2.7V–5.5V) each deliver 300 mA with dropout as low as 70 mV at 150 mA, while sharing ground separation between SGND (signal reference) and PGND (high-current return) to minimize noise coupling. The device uses internal PMOS/NMOS switches with 0.5 Ω/0.6 Ω ON-resistance and supports ceramic output capacitors as small as 2.2 µF per regulator.

Key Specifications

Pinout & Package

Package: 16-pin, 3 mm × 3 mm, 0.85 mm height, leadless QFN (ML suffix), exposed thermal pad (PGND-connected).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail power management applications.

Compared with MIC2820-1JGMYML-TR, the MIC2810-1JGMYML-TR trades telemetry capability for lower BOM cost and reduced firmware complexity; versus TPS65023RSBR, it delivers 2.7× lower quiescent current and 3× lower DC/DC output noise - critical for RF coexistence and battery longevity.

Availability

MIC2810-1JGMYML-TR is available at Aetrix Electronics and suitable for embedded MPU power, portable wearables, and low-power RF systems requiring stable component supply, consistent parametric performance, and long-term industrial temperature support (–40°C to +125°C).

Supply support for MIC2810-1JGMYML-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and power management ICs, with emphasis on reliability, longevity, and industrial-grade qualification.

The MIC2810 product line delivers highly integrated, low-noise power solutions for resource-constrained embedded systems - designed specifically to simplify multi-rail power design in portable, RF, and backup-power-critical applications.

FAQ

What output voltages does the MIC2810-1JGMYML-TR provide?

The MIC2810-1JGMYML-TR provides fixed output voltages of 1.25V (DC/DC converter), 1.8V (LDO1), and 2.8V (LDO2), as defined by the "1JGM" suffix in the part number. These values are factory-trimmed and specified over –40°C to +125°C with ±2% accuracy in normal operation and ±3% in LOWQ mode. Each output is independently controllable via dedicated enable pins (EN, EN1, EN2).

How does the LOWQ mode affect the DC/DC converter and LDOs in the MIC2810-1JGMYML-TR?

In LOWQ mode (LOWQ pin pulled low), the MIC2810-1JGMYML-TR disables the DC/DC PWM switching circuitry and regulates the 1.25V output through the LDO pin instead, reducing total quiescent current to 30 µA and output noise to 53 µVRMS. Simultaneously, LDO1 and LDO2 current limits are reduced to <50 mA, and their dropout voltage drops to as low as 22 mV at 10 mA - optimizing for ultra-low-power standby.

Can the MIC2810-1JGMYML-TR support power sequencing across its three outputs?

Yes, the MIC2810-1JGMYML-TR supports precise power sequencing via independent enable pins (EN, EN1, EN2) and the programmable POR delay set by the CSET pin. By controlling enable timing and configuring CSET capacitance, designers can enforce strict ramp-up order (e.g., LDO1 → LDO2 → DC/DC) and ensure POR remains asserted until all rails reach regulation - critical for SoC compliance.

What is the purpose of separate SGND and PGND pins on the MIC2810-1JGMYML-TR?

The MIC2810-1JGMYML-TR uses separate SGND (signal ground) and PGND (power ground) pins to isolate low-noise reference paths from high-current switching return currents. SGND carries bias and control circuitry return current, while PGND handles DC/DC switch-node return and thermal pad connection. This separation prevents switching noise from modulating reference voltages or POR thresholds - essential for stable regulation and accurate reset assertion.

Does the MIC2810-1JGMYML-TR require external components for stability?

Yes, the MIC2810-1JGMYML-TR requires external components for stable operation: a 2.2 µF X5R/X7R ceramic capacitor on each output (LDO1, LDO2, DC/DC), a 4.7 µF ceramic capacitor on VIN to PGND, a 0.1 µF capacitor on BIAS to SGND, and an external capacitor from CSET to GND for POR delay programming. Inductor selection is also critical - a 2.2 µH shielded type rated for ≥750 mA peak current is recommended for the DC/DC stage.