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Microchip Technology MIC2810-44MYML-TR
- Part No.:
- MIC2810-44MYML-TR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-VQFN Exposed Pad, 16-MLF®
- Datasheet:
-
MIC2810-44MYML-TR.pdf
- Description:
- IC REG TRPL BUCK/LNR 2MHZ 16MLF
- Quantity:
- Payment:
- Shipping:
Inventory:1,767
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Product details
Overview
MIC2810-44MYML-TR from Microchip Technology is a digital power management IC integrating a 2 MHz, 600 mA DC/DC buck converter and two independent 300 mA LDOs (LDO1 and LDO2), all with separate enable controls and configurable power-on reset. It delivers 1.2 V (DC/DC), 1.2 V (LDO1), and 2.8 V (LDO2) outputs in a single 16-pin 3 mm × 3 mm QFN package, supporting embedded MPU/MCU core and I/O rail sequencing in space-constrained portable systems.
For engineers reviewing the MIC2810-44MYML-TR datasheet, MIC2810-44MYML-TR pinout, MIC2810-44MYML-TR application, or MIC2810-44MYML-TR equivalent, key selection criteria include LOWQ mode quiescent current (30 µA), ultra-low DC/DC output noise (53 µVRMS), independent LDO enable control, POR delay programmability via CSET, and thermal shutdown protection across –40°C to +125°C operation.
Technical Context
The MIC2810-44MYML-TR implements dual-mode regulation: full-power PWM mode (2 MHz switching, up to 600 mA) and LOWQ linear-regulator mode (30 µA IQ, 60 mA max DC/DC output, 50 mA max per LDO). Its architecture separates signal ground (SGND) and power ground (PGND), isolates BIAS supply via internal 6 Ω resistor, and uses open-drain POR with capacitor-programmable delay for precise power-rail sequencing.
Each regulator features independent enable inputs (EN, EN1, EN2), input voltage flexibility (VIN: 2.7–5.5 V; VIN1: 1.65–5.5 V), and low-noise operation-especially critical for RF-sensitive applications. The CSET pin sources 1.25 µA to set POR delay (1 µs per pF), while SW node transitions are isolated during LOWQ mode to prevent leakage into backup domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | VIN/VIN2: 2.7–5.5 V; VIN1: 1.65–5.5 V - supports wide-input battery and rail-sourced systems with LDO1 compatible down to 1.65 V input. |
| DC/DC Output Current | 600 mA (PWM mode); 60 mA (LOWQ mode) - enables high-efficiency heavy loads or ultra-low-noise light-load operation. |
| LDO Output Current | 300 mA per LDO (LDO1/LDO2) - sufficient for MCU cores, memory, and peripherals with independent on/off control. |
| Quiescent Current | 30 µA total in LOWQ mode - extends battery life in always-on wearable and backup-power systems. |
| Output Noise (DC/DC) | 53 µVRMS (10 Hz–100 kHz, LOWQ mode) - avoids interference with sensitive RF receivers and precision analog circuits. |
| POR Delay Programmability | CSET pin charges external capacitor at 1.25 µA; delay = CSET (pF) in µs - allows precise sequencing of 1.2 V, 1.2 V, and 2.8 V rails. |
| Thermal Protection | Overtemperature shutdown at 160°C with 23°C hysteresis - ensures safe operation under sustained high-load or poor PCB thermal design. |
Pinout & Package
Package: 16-pin, 3 mm × 3 mm, 0.85 mm-thick QFN (ML suffix), leadless, Pb-free, industrial temperature grade (–40°C to +125°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (LOWQ) | Mode select input | Active-low logic control: LOW = 30 µA IQ, 60 mA DC/DC output, 50 mA max per LDO; HIGH = 2 MHz PWM, 600 mA DC/DC output. |
| 2 (BIAS) | Bias supply input | Internal 6 Ω resistor feeds control/reference circuitry; requires 0.1 µF bypass to SGND for stability. |
| 3 (SGND) | Signal ground reference | Low-current return path for bias, POR, CSET, and enable logic - must be routed separately from PGND to avoid noise coupling. |
| 4 (PGND) | Power ground return | High-current return for DC/DC switch node (SW); requires low-inductance layout to minimize EMI and voltage spikes. |
| 5 (SW) | Switch node output | Drives external inductor in PWM mode; high-impedance in LOWQ mode - must be kept short and away from sensitive traces. |
| 6 (VIN) | Main input supply | Primary input for DC/DC controller, reference, and shared circuitry; connects internally to VIN2 (Pin 7). |
| 7 (VIN2) | LDO2 input supply | Must be tied to VIN (Pin 6); supplies LDO2 only - not independently routable. |
| 8 (LDO2) | LDO2 regulated output | Delivers fixed 2.8 V (per part number suffix -44M); requires ≥2.2 µF ceramic output capacitor. |
| 9 (LDO) | DC/DC linear output | Connects to DC/DC output (VOUT) and serves as regulated source in LOWQ mode - enables seamless handoff between modes. |
| 10 (VIN1) | LDO1 input supply | Independent input for LDO1 (1.65–5.5 V range); enables use with lower-voltage intermediate rails. |
| 11 (LDO1) | LDO1 regulated output | Delivers fixed 1.2 V (per -44M); requires ≥2.2 µF ceramic output capacitor and independent enable (EN1). |
| 12 (POR) | Open-drain power-on reset | Asserts low if any enabled output (DC/DC, LDO1, LDO2) falls below 90–91% of nominal; requires external pull-up. |
| 13 (CSET) | POR delay timing input | 1.25 µA current source charges external capacitor; delay = CSET (pF) in µs - sets POR assertion time after startup/enable. |
| 14 (EN1) | LDO1 enable input | Active-high CMOS input (VIH ≥ 1.0 V); controls LDO1 independently - essential for multi-rail sequencing. |
| 15 (EN) | DC/DC enable input | Active-high CMOS input; enables/disables buck converter; tri-states SW when disabled to prevent backfeed. |
| 16 (EN2) | LDO2 enable input | Active-high CMOS input; controls LDO2 independently - allows staggered power-up of 2.8 V rail relative to others. |
Key Features
| Feature | Design Value |
|---|---|
| LOWQ dual-mode operation | Reduces total IQ to 30 µA while maintaining regulated 1.2 V/1.2 V/2.8 V outputs - eliminates need for external low-IQ supervisors in battery-powered designs. |
| Programmable POR delay | CSET pin enables µs-accurate delay setting (up to ~1 s) without external timers - simplifies multi-rail sequencing for MPUs requiring strict voltage ramp order. |
| Backup-power-safe POR | ESD-protected open-drain POR with no clamping diodes to supply rails - allows direct connection to host I/Os powered by backup batteries even when main supply is off. |
| Independent LDO enable control | Three separate enable pins (EN, EN1, EN2) allow precise turn-on/off timing of each rail - critical for reducing inrush current and meeting system-level power budgets. |
| Ultra-low-noise DC/DC in LOWQ | 53 µVRMS output noise (10 Hz–100 kHz) - avoids spectral contamination of RF front-ends and ADC references that PFM-based converters introduce. |
| Thermal and current protection | Integrated 160°C shutdown with 23°C hysteresis and per-regulator current limiting - prevents damage during overload or poor heatsinking without external components. |
Applications
| Embedded MPU Power Sequencing | Wearable Health Monitor |
|---|---|
Use Scenario: Powering ARM Cortex-A/M series processors with multiple voltage rails (core, I/O, memory) requiring strict ramp order and low standby current. IC Role / Device Role / Timing Role: MIC2810-44MYML-TR provides 1.2 V (core), 1.2 V (I/O), and 2.8 V (memory interface) with POR-controlled sequencing and LOWQ mode for sleep-state power reduction. Use Value: Eliminates discrete sequencing ICs and reduces BOM count; 30 µA LOWQ IQ extends battery life >3× vs. conventional PMICs in deep-sleep states. |
Use Scenario: Continuous ECG/PPG sensing in wrist-worn devices where RF interference from switching regulators degrades analog signal integrity. IC Role / Device Role / Timing Role: MIC2810-44MYML-TR powers analog front-end (1.2 V), microcontroller (1.2 V), and BLE radio (2.8 V) with LOWQ mode active during sensor sampling to suppress switching noise. Use Value: 53 µVRMS DC/DC noise in LOWQ mode preserves SNR of sub-µV biomedical signals - avoids costly shielding or separate LDO-only solutions. |
| Low-Power IoT Node | Backup Power System |
Use Scenario: Battery-operated LoRaWAN sensor node transmitting intermittently, spending >99% time in ultra-low-power sleep. IC Role / Device Role / Timing Role: MIC2810-44MYML-TR supplies MCU (1.2 V), sensor interface (1.2 V), and transceiver (2.8 V), entering LOWQ mode between transmissions to minimize quiescent draw. Use Value: Total system sleep current drops to <35 µA (including MCU and sensors), enabling >5-year battery life on a CR2032 cell. |
Use Scenario: Real-time clock and SRAM retention during main power failure in industrial controllers using supercapacitor or coin-cell backup. IC Role / Device Role / Timing Role: MIC2810-44MYML-TR's ESD-isolated POR pin connects directly to backup domain I/Os; LDO1 (1.2 V) remains active from backup supply while DC/DC shuts down. Use Value: No parasitic leakage path from main supply to backup domain - ensures >10-year data retention without self-discharge from PMIC. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBR | Triple-output PMIC (2 buck + 1 LDO); 2.25–6.5 V input; no LOWQ mode; 85 µA typical IQ; fixed 1.2/1.5/2.8 V outputs. | Lacks ultra-low-noise light-load mode - unsuitable for RF/analog-sensitive designs; higher IQ increases battery drain in sleep. | Select when higher input voltage range (>5.5 V) or higher DC/DC current (>600 mA) is required, and LOWQ noise performance is not critical. |
| MAX20029ATPA/V+T | Dual-buck + dual-LDO PMIC; 3–5.5 V input; 25 µA IQ in shutdown but no true low-noise light-load mode; fixed 1.2/1.2/2.8/3.3 V outputs. | No dedicated LOWQ linear-regulator handoff - uses PFM mode with higher ripple; POR not programmable via capacitor. | Choose when four independent rails are needed and board space allows larger 20-pin TQFN; avoid where 53 µVRMS noise is mandatory. |
Compared with TPS65023BRSBR and MAX20029ATPA/V+T, the MIC2810-44MYML-TR uniquely combines 30 µA LOWQ IQ, 53 µVRMS noise, capacitor-programmable POR delay, and backup-domain-safe POR - making it optimal for compact, battery-critical, RF-integrated systems where noise and sequencing precision are non-negotiable.
Availability
MIC2810-44MYML-TR is available at Aetrix Electronics and suitable for embedded MPU power sequencing, wearable health monitors, low-power IoT nodes, and backup power systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for MIC2810-44MYML-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, FPGAs, and power management ICs, serving automotive, industrial, consumer, and communications markets with vertically integrated silicon and software solutions.
The MIC2810 product line delivers highly integrated, low-noise, sequenced power solutions for space-constrained, battery-powered embedded systems - designed specifically to replace discrete DC/DC + LDO + supervisor combinations with minimal external components.
FAQ
What output voltages does the MIC2810-44MYML-TR provide?
The MIC2810-44MYML-TR provides three fixed output voltages: 1.2 V from the DC/DC converter, 1.2 V from LDO1, and 2.8 V from LDO2 - as indicated by the "44M" suffix in the part number per Microchip's Product Identification System. These values are factory-trimmed and do not require external feedback resistors.
How does the LOWQ mode affect the DC/DC converter and LDOs in the MIC2810-44MYML-TR?
In LOWQ mode (LOWQ pin ≤ 0.2 V), the MIC2810-44MYML-TR disables the PWM switcher and regulates the DC/DC output through the LDO pin, delivering up to 60 mA at 1.2 V with 53 µVRMS noise. Simultaneously, LDO1 and LDO2 current limits reduce to <50 mA each, and total quiescent current drops to 30 µA - optimizing for ultra-low-power standby.
Can the MIC2810-44MYML-TR be used in backup power applications with independent domain isolation?
Yes. The MIC2810-44MYML-TR's POR pin has no clamping diodes to VIN or other supplies, enabling direct connection to backup-domain I/Os. When main power fails, POR remains functional and leakage-free - allowing host processors on backup rails to monitor MIC2810-44MYML-TR status without parasitic discharge of the backup source.
What is the purpose of the CSET pin on the MIC2810-44MYML-TR, and how is it configured?
The CSET pin on the MIC2810-44MYML-TR sources a precise 1.25 µA current to charge an external capacitor to 1.25 V, setting the POR assertion delay time in microseconds equal to the capacitor value in picofarads. For example, a 100 nF capacitor yields a 100 ms delay - enabling accurate sequencing of the 1.2 V, 1.2 V, and 2.8 V outputs during startup.
Does the MIC2810-44MYML-TR support independent enable control for all three regulators?
Yes. The MIC2810-44MYML-TR provides three dedicated CMOS-compatible enable inputs: EN (DC/DC), EN1 (LDO1), and EN2 (LDO2). Each requires ≥1.0 V for logic high and must not be left floating. This allows full control over power-up order, dynamic rail disabling, and partial-system wake-up - critical for energy-efficient embedded designs.
MIC2810-44MYML-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 16-VQFN Exposed Pad, 16-MLF®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) (1), Linear (LDO) (2)
- Number of Outputs:
- 3
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.2V, 600mA
- Voltage/Current - Output 2:
- 1.2V, 300mA
- Voltage/Current - Output 3:
- 2.8V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-MLF® (4x4)
MIC2810-44MYML-TR FAQ
1.How can I place an order for MIC2810-44MYML-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC2810-44MYML-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC2810-44MYML-TR reliable?
The price and inventory of MIC2810-44MYML-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC2810-44MYML-TR is usually 5 days.
3.What payment methods are accepted for MIC2810-44MYML-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC2810-44MYML-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC2810-44MYML-TR?
MIC2810-44MYML-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC2810-44MYML-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC2810-44MYML-TR?
For technical support, including MIC2810-44MYML-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC2810-44MYML-TR requirements.
6.How does Aetrix verify that MIC2810-44MYML-TR is sourced from the original manufacturer or authorized distributors?
All MIC2810-44MYML-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC2810-44MYML-TR meets industry standards.
7.What is the process for return or replacement of MIC2810-44MYML-TR?
All MIC2810-44MYML-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC2810-44MYML-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC2810-44MYML-TR part is unused and in its original packaging.
Return procedure for MIC2810-44MYML-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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