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Microchip Technology MIC2810-FGSYML-TR
- Part No.:
- MIC2810-FGSYML-TR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 16-VQFN Exposed Pad, 16-MLF®
- Datasheet:
-
MIC2810-FGSYML-TR.pdf
- Description:
- IC REG TRPL BUCK/LNR 2MHZ 16MLF
- Quantity:
- Payment:
- Shipping:
Inventory:2,166
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Product details
Overview
MIC2810-FGSYML-TR from Microchip Technology is a digital power management IC integrating a 2 MHz, 600 mA DC/DC buck converter and two independent 300 mA LDOs (1.5 V, 1.8 V, 3.3 V outputs), with LOWQ ultra-low-noise light-load mode, integrated power-on reset (POR), and thermal/current protection. It delivers stable multi-rail power for embedded MPU systems requiring low quiescent current and RF-clean operation.
For engineers reviewing the MIC2810-FGSYML-TR datasheet, MIC2810-FGSYML-TR pinout, MIC2810-FGSYML-TR application, or MIC2810-FGSYML-TR equivalent, key selection considerations include its 30 µA total IQ in LOWQ mode, 53 µVRMS DC/DC output noise, 16-pin 3 mm × 3 mm QFN package, independent enable control per regulator, and POR delay programmability via CSET capacitor.
Technical Context
The MIC2810-FGSYML-TR implements a dual-mode DC/DC architecture: full-power PWM mode (2 MHz, up to 600 mA) and LOWQ linear-regulator mode (30 µA IQ, 60 mA max DC/DC output, 53 µVRMS noise). Its three regulated outputs-DC/DC (1.5 V), LDO1 (1.8 V), and LDO2 (3.3 V)-feature independent EN pins, separate input voltage domains (VIN1 down to 1.65 V; VIN/VIN2 ≥ 2.7 V), and shared SGND/PGND separation for noise isolation.
Functional integration includes an open-drain POR output with programmable delay (CSET pin, 1.25 µA current source), thermal shutdown at 160°C with 23°C hysteresis, and current-limit protection (750–1600 mA in PWM; 80–190 mA in LOWQ). The device supports leakage-free backup-power interfacing via POR's ESD-protected, rail-independent output stage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | VIN/VIN2: 2.7–5.5 V; VIN1: 1.65–5.5 V - enables flexible supply partitioning across battery, rail, or backup domains |
| DC/DC Output | 1.5 V, 600 mA PWM / 60 mA LOWQ - supports high-efficiency core logic and ultra-low-noise sleep-state power |
| LDO Outputs | LDO1: 1.8 V, 300 mA; LDO2: 3.3 V, 300 mA - provides clean, low-dropout rails for I/O, analog, or RF circuitry |
| Quiescent Current | 30 µA total in LOWQ mode - extends battery life in always-on wearable or sensor nodes |
| Output Noise | 53 µVRMS (DC/DC, LOWQ mode, 10 Hz–100 kHz) - avoids interference with sensitive RF receivers |
| POR Delay Programmability | CSET pin with 1.25 µA current source - sets POR assertion delay up to 1 s via external capacitor (t = CSET in pF) |
| Package | 16-pin 3 mm × 3 mm QFN, 0.85 mm height - enables compact, thermally efficient layout with separated SGND/PGND planes |
Pinout & Package
Package: 16-pin, 3 mm × 3 mm, 0.85 mm height QFN with exposed thermal pad (ML suffix), Pb-free, industrial temperature grade (–40°C to +125°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: LOWQ | Mode select input | Active-low control: LOW = 30 µA IQ, 60 mA LDO-based DC/DC output; HIGH = 2 MHz PWM, 600 mA output |
| 2: BIAS | Bias supply input | Powers internal reference/control circuitry via 6 Ω internal resistor; requires 0.1 µF bypass to SGND |
| 3: SGND | Signal ground | Reference return for bias, POR, CSET, and enable logic - must be routed separately from PGND |
| 4: PGND | Power ground | High-current return path for DC/DC switch node (SW); critical for EMI and thermal performance |
| 5: SW | Switch node output | Connects to inductor; high dv/dt node - must avoid coupling to sensitive analog or RF traces |
| 6: VIN | Main supply input | Primary input for DC/DC controller, reference, and shared circuitry; tied to Pin 7 (VIN2) |
| 7: VIN2 | LDO2 input | Supplies LDO2; must be connected to Pin 6 (VIN) - no independent sourcing |
| 8: LDO2 | LDO2 regulated output | 3.3 V, 300 mA output; requires ≥2.2 µF ceramic capacitor to PGND for stability |
| 9: LDO | LOWQ-mode DC/DC output | Connects to DC/DC VOUT; used only in LOWQ mode as linear-regulated 1.5 V source |
| 10: VIN1 | LDO1 input | Supplies LDO1; supports down to 1.65 V - enables ultra-low-voltage biasing of 1.8 V domain |
| 11: LDO1 | LDO1 regulated output | 1.8 V, 300 mA output; requires ≥2.2 µF ceramic capacitor to PGND |
| 12: POR | Open-drain power-on reset | Asserts low if any output (DC/DC, LDO1, LDO2) falls out of regulation; ESD-safe, backup-power compatible |
| 13: CSET | POR delay timing input | 1.25 µA current source charges external capacitor to set POR assertion delay (t = CSET in pF) |
| 14: EN1 | LDO1 enable | Active-high CMOS input; controls LDO1 independently - essential for sequenced power-up |
| 15: EN | DC/DC enable | Active-high CMOS input; places SW in tri-state when disabled - prevents backfeed and leakage |
| 16: EN2 | LDO2 enable | Active-high CMOS input; enables/disables LDO2 independently - supports dynamic rail gating |
Key Features
| Feature | Design Value |
|---|---|
| LOWQ ultra-low-noise mode | Reduces total IQ to 30 µA while delivering 53 µVRMS DC/DC output noise - eliminates PFM-induced RF interference |
| Independent triple-rail control | Three separate enable inputs (EN, EN1, EN2) allow precise sequencing and dynamic rail shutdown without affecting other outputs |
| Backup-power-safe POR | Open-drain POR output with no clamping diodes - enables direct connection to host I/O under backup power without parasitic leakage |
| Thermal and current protection | 160°C thermal shutdown with 23°C hysteresis and programmable current limits (PWM: 750–1600 mA; LOWQ: 80–190 mA) ensure robust operation |
| Optimized for small footprint | 16-pin 3 mm × 3 mm QFN with integrated 2.2 µH inductor compatibility and minimal external components (2.2 µF ceramics per output) |
Applications
| Embedded MPU Power Sequencing | Wearable Sensor Node Power |
|---|---|
|
Use Scenario: Powering ARM Cortex-A/M series MPUs with strict sequencing requirements (core → I/O → memory rails). IC Role / Device Role / Timing Role: MIC2810-FGSYML-TR provides 1.5 V (core), 1.8 V (I/O), and 3.3 V (peripheral) rails with independent EN1/EN2/EN control and programmable POR delay for glitch-free startup. Use Value: Eliminates need for external sequencers or discrete regulators; reduces BOM count by 3× while maintaining <100 µs turn-on matching across rails. |
Use Scenario: Battery-powered health monitors requiring multi-day runtime and RF coexistence (BLE/Wi-Fi + analog sensors). IC Role / Device Role / Timing Role: MIC2810-FGSYML-TR supplies 1.5 V MCU core, 1.8 V sensor interface, and 3.3 V radio PA - switching to LOWQ mode during sleep. Use Value: Achieves 30 µA system standby with 53 µVRMS noise on 1.5 V rail, preventing BLE packet loss caused by switching ripple. |
| Low-Power Industrial IoT Gateway | Backup Power System for Real-Time Clocks |
|
Use Scenario: Edge gateway with dual-core MCU, LoRa transceiver, and isolated CAN interface operating from 3.6 V Li-SOCl₂ battery. IC Role / Device Role / Timing Role: MIC2810-FGSYML-TR delivers 1.5 V (MCU), 1.8 V (LoRa PHY), and 3.3 V (CAN transceiver) with VIN1 supporting 1.65 V brownout tolerance. Use Value: Enables reliable operation down to 2.7 V input while maintaining >90% efficiency at 200 mA load - extends usable battery range by 18%. |
Use Scenario: Main system with RTC backup powered by coin cell during AC failure; requires zero-leakage POR signaling to host MCU. IC Role / Device Role / Timing Role: MIC2810-FGSYML-TR uses POR pin (ESD-clamp-free) pulled up to coin cell - asserts reset to host even when main VIN is removed. Use Value: Guarantees RTC integrity during power transitions without external level shifters or isolation FETs - reduces backup circuit complexity by 40%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBR | Triple-output PMIC (2 buck + 1 LDO); no LOWQ mode; 85 µA IQ; 150 µVRMS noise | Lacks ultra-low-noise light-load capability - unsuitable for RF-sensitive designs | Select when higher output current (1 A buck) is required and RF cleanliness is secondary |
| MAX20029ATGB/V+T | Dual buck + dual LDO; 25 µA IQ; but fixed 1.8 V/3.3 V LDOs only - no 1.5 V DC/DC option | Cannot replicate MIC2810-FGSYML-TR's exact 1.5 V/1.8 V/3.3 V output set | Select for automotive AEC-Q100 compliance where 1.5 V rail is not needed |
Compared with TPS65023BRSBR and MAX20029ATGB/V+T, MIC2810-FGSYML-TR uniquely combines 1.5 V/1.8 V/3.3 V factory-set outputs, 30 µA LOWQ mode, and 53 µVRMS noise - making it optimal for space-constrained, battery-powered RF systems requiring precise multi-rail sequencing and ultra-low standby power.
Availability
MIC2810-FGSYML-TR is available at Aetrix Electronics and suitable for embedded MPU power sequencing, wearable sensor node power, and low-power industrial IoT gateway applications requiring stable component supply, long-term lifecycle support, and guaranteed Pb-free industrial-grade packaging.
Supply support for MIC2810-FGSYML-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog devices, and power management ICs, serving industrial, automotive, and consumer markets with high-reliability semiconductor solutions.
The MIC2810 product line delivers highly integrated, low-quiescent-current power management ICs designed specifically for battery-powered embedded systems requiring multi-rail sequencing, RF-clean operation, and backup-power resilience.
FAQ
What output voltages does the MIC2810-FGSYML-TR provide?
The MIC2810-FGSYML-TR is factory-configured with fixed output voltages: 1.5 V from the DC/DC converter, 1.8 V from LDO1, and 3.3 V from LDO2. These values are encoded in the part number suffix "FGS" per Microchip's Product Identification System and cannot be adjusted externally. All three outputs support independent enable control and are specified over –40°C to +125°C.
How does the LOWQ mode affect the DC/DC converter's output capability in MIC2810-FGSYML-TR?
In LOWQ mode (LOWQ pin ≤ 0.2 V), the MIC2810-FGSYML-TR disables the PWM switch and regulates the 1.5 V DC/DC output through the LDO pin using linear regulation. This reduces total IQ to 30 µA and output noise to 53 µVRMS, but limits DC/DC output current to 60 mA. The LDO1 and LDO2 outputs remain active but are restricted to <50 mA each in this mode.
Can the POR output of MIC2810-FGSYML-TR be used with a backup power source?
Yes. The POR output of MIC2810-FGSYML-TR is an open-drain N-channel device with no ESD clamping diodes to VIN or other rails. This allows the POR pin to be pulled up directly to a backup power source (e.g., coin cell) and asserted to a host MCU's I/O even when main VIN is removed - enabling reliable RTC or state-retention signaling during power failure.
What is the recommended output capacitance for each regulator in MIC2810-FGSYML-TR?
Each regulator in MIC2810-FGSYML-TR requires a minimum 2.2 µF X5R or X7R ceramic capacitor placed close to its output pin and PGND. This applies to the DC/DC output (LDO pin in LOWQ mode), LDO1, and LDO2. Larger values improve transient response but are not required for stability - the device is optimized for 2.2 µF per rail.
Does MIC2810-FGSYML-TR support independent input voltage domains for its LDOs?
Yes. MIC2810-FGSYML-TR supports three distinct input domains: VIN (shared by DC/DC and control circuitry, 2.7–5.5 V), VIN1 (LDO1 only, 1.65–5.5 V), and VIN2 (LDO2 only, 2.7–5.5 V). This allows LDO1 to operate from ultra-low-voltage sources (e.g., partially discharged batteries), while LDO2 and the DC/DC converter maintain higher input headroom for efficiency and dropout margin.
MIC2810-FGSYML-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 16-VQFN Exposed Pad, 16-MLF®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) (1), Linear (LDO) (2)
- Number of Outputs:
- 3
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.5V, 600mA
- Voltage/Current - Output 2:
- 1.8V, 300mA
- Voltage/Current - Output 3:
- 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-MLF® (4x4)
MIC2810-FGSYML-TR FAQ
1.How can I place an order for MIC2810-FGSYML-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC2810-FGSYML-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC2810-FGSYML-TR reliable?
The price and inventory of MIC2810-FGSYML-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC2810-FGSYML-TR is usually 5 days.
3.What payment methods are accepted for MIC2810-FGSYML-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC2810-FGSYML-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC2810-FGSYML-TR?
MIC2810-FGSYML-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC2810-FGSYML-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC2810-FGSYML-TR?
For technical support, including MIC2810-FGSYML-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC2810-FGSYML-TR requirements.
6.How does Aetrix verify that MIC2810-FGSYML-TR is sourced from the original manufacturer or authorized distributors?
All MIC2810-FGSYML-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC2810-FGSYML-TR meets industry standards.
7.What is the process for return or replacement of MIC2810-FGSYML-TR?
All MIC2810-FGSYML-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC2810-FGSYML-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC2810-FGSYML-TR part is unused and in its original packaging.
Return procedure for MIC2810-FGSYML-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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