Microchip Technology MIC5320-PGYD6-TR
- Part No.:
- MIC5320-PGYD6-TR
- Manufacturer:
- Microchip Technology
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
MIC5320-PGYD6-TR.pdf
- Description:
- IC REG LINEAR 1.8V/3V TSOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:2,732
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MIC5320-PGYD6-TR from Micrel is a dual-channel ultra-low-dropout (ULDO™) linear regulator delivering 150mA per output in a 6-pin TSOT-23 package. It features independent active-high enable pins, 35mV dropout at 150mA, µCap stability with 1µF ceramic output capacitors, and operates across 2.3V–5.5V input range - ideal for space-constrained portable power rails in camera modules and mobile phone baseband subsystems.
For engineers reviewing the MIC5320-PGYD6-TR datasheet, MIC5320-PGYD6-TR pinout, MIC5320-PGYD6-TR application, or MIC5320-PGYD6-TR equivalent, this page provides verified technical context, validated pin functions, confirmed dual-output voltage configuration (3.0V/1.8V), thermal resistance (θJA = 235°C/W), and real-world design implications for low-noise, fast-transient portable power delivery.
Technical Context
The MIC5320-PGYD6-TR integrates two independent CMOS-based ULDO regulators sharing a common VIN and GND, each with dedicated EN pin (EN1 for VOUT1, EN2 for VOUT2) and separate output terminals. Its µCap architecture eliminates need for large output capacitance, enabling stable regulation with only 1µF ceramic per output.
Each LDO delivers precise fixed output voltages (3.0V on VOUT1, 1.8V on VOUT2), maintains ±3% accuracy over –40°C to +125°C, achieves 65dB PSRR at 1kHz, and exhibits 90µVRMS integrated output noise (10Hz–100kHz). Thermal shutdown and current-limit protection are built-in.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.0V (VOUT1) and 1.8V (VOUT2) - fixed, non-adjustable, enabling direct powering of core logic and I/O rails without external feedback. |
| Dropout Voltage | 35mV @ 150mA - allows operation with minimal headroom (e.g., 3.035V input sustains 3.0V output), critical for battery-powered systems near end-of-discharge. |
| Output Current | 150mA per channel - sufficient for imaging sensors, RF transceivers, or microcontroller I/O domains without derating in compact layouts. |
| Input Voltage Range | 2.3V to 5.5V - supports single-cell Li-ion (2.7–4.2V), Li-poly, or regulated 3.3V/5V system rails without intermediate conversion. |
| Quiescent Current | 85µA per enabled output - ensures ultra-low standby power when one or both regulators are active under light load. |
| Enable Logic | Active-high (VIH ≥ 1.1V, VIL ≤ 0.2V) with <1µA input leakage - compatible with standard GPIOs and avoids floating-state risk via explicit pull-down requirement. |
| Thermal Resistance | θJA = 235°C/W (TSOT-23-6) - defines maximum ambient temperature limit (e.g., 90.5°C at full 300mA combined load with 3.3V input) for reliable operation. |
Pinout & Package
Package: 6-pin TSOT-23 (D6), 2.9mm × 1.6mm × 1.1mm body, exposed pad not electrically connected (non-grounded in D6 variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (TSOT-23) | EN2 | Active-high enable for second regulator (1.8V output); must be pulled high (>1.1V) to activate VOUT2, low (<0.2V) to disable. |
| Pin 2 (TSOT-23) | GND | Common ground reference for both LDOs and enable inputs; requires low-inductance PCB connection to minimize noise coupling. |
| Pin 3 (TSOT-23) | VIN | Shared input supply rail (2.3–5.5V); must be bypassed with ≥1µF ceramic capacitor close to pin for stability. |
| Pin 4 (TSOT-23) | VOUT1 | 3.0V regulated output (150mA max); connects directly to load requiring stable 3.0V rail (e.g., MCU core or memory interface). |
| Pin 5 (TSOT-23) | VOUT2 | 1.8V regulated output (150mA max); powers low-voltage peripherals such as image sensor I/O or digital baseband blocks. |
| Pin 6 (TSOT-23) | EN1 | Active-high enable for first regulator (3.0V output); independent control enables sequencing (e.g., VOUT1 before VOUT2) or dynamic power gating. |
Key Features
| Feature | Design Value |
|---|---|
| µCap stability | Stable with only 1µF ceramic output capacitor per LDO - reduces BOM count, board area, and cost versus traditional LDOs requiring ≥10µF tantalum. |
| Independent enable control | Dual active-high EN pins allow asynchronous power-up/down sequencing and selective shutdown - essential for power domain isolation in multi-rail SoC systems. |
| Ultra-low dropout | 35mV dropout at full 150mA load - maximizes usable battery voltage range and extends runtime in single-cell applications. |
| Low-noise regulation | 90µVRMS output noise (10Hz–100kHz) and 65dB PSRR at 1kHz - preserves signal integrity in noise-sensitive analog/RF sections like camera sensor interfaces. |
| Fast turn-on time | 30µs typical startup delay - enables rapid power restoration during wake-from-sleep events in portable devices without system latency penalties. |
Applications
| Mobile Camera Module Power | Smartphone Baseband Subsystem |
|---|---|
Use Scenario: Dual-rail power for CMOS image sensor with analog core (2.8V) and digital I/O (1.8V) in ultra-thin smartphone bezel. IC Role / Device Role / Timing Role: Dual ULDO providing isolated, low-noise, sequenced 3.0V (sensor interface) and 1.8V (MIPI D-PHY logic) rails. Use Value: Eliminates need for discrete regulators or larger packages; 35mV dropout extends battery life by >8% vs. standard LDOs at 3.3V input. |
Use Scenario: Powering application processor I/O banks and companion PMIC control logic in LTE handsets. IC Role / Device Role / Timing Role: Secondary regulation stage delivering clean 3.0V (GPIO/VDDIO) and 1.8V (SPI/I²C interface) from main 3.3V rail. Use Value: 90µVRMS noise prevents bit errors on high-speed serial buses; independent EN pins support dynamic I/O voltage scaling during modem sleep modes. |
| Portable Media Player Audio Codec | GPS Receiver Front-End |
Use Scenario: Low-noise biasing of stereo DAC/ADC and headphone amplifier in battery-powered PMP. IC Role / Device Role / Timing Role: Dual LDO supplying 3.0V (analog audio path) and 1.8V (digital control logic) with simultaneous fast turn-on. Use Value: 65dB PSRR suppresses switching noise from adjacent DC-DC converters; µCap design avoids electrolytic capacitors prone to aging in consumer devices. |
Use Scenario: Powering GPS RF front-end IC and baseband processor in compact wearable navigation device. IC Role / Device Role / Timing Role: Regulating 3.0V (LNA bias) and 1.8V (GPS baseband core) from shared 3.3V system rail with thermal-aware layout. Use Value: 235°C/W θJA enables full 300mA combined load in 25mm² footprint; thermal shutdown prevents latch-up during antenna proximity heating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6223D301MR-G | Single-output 3.0V LDO (150mA), no 1.8V channel; SOT-25 package; 120mV dropout @ 150mA. | Requires separate 1.8V regulator; higher dropout reduces battery efficiency in low-VIN scenarios. | Select only if dual-rail integration is unnecessary and board space allows two discrete regulators. |
| Ricoh RP512K301B-TR-F | Dual-output (3.0V/1.8V), but uses SOT-26 package; 60mV dropout @ 150mA; 120µA quiescent current per channel. | Higher dropout and quiescent current reduce runtime in always-on GPS or camera standby modes. | Acceptable for cost-sensitive designs where 25mV higher dropout and 35µA higher IQ are tolerable. |
Compared with MIC5320-PGYD6-TR, the XC6223D301MR-G lacks integrated dual-rail capability and increases BOM complexity, while the RP512K301B-TR-F trades off 25mV higher dropout and +35µA IQ for marginally lower unit cost - making MIC5320-PGYD6-TR optimal for space- and efficiency-critical portable designs.
Availability
MIC5320-PGYD6-TR is available at Aetrix Electronics and suitable for mobile camera modules, smartphone baseband subsystems, and portable media player audio codecs requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for MIC5320-PGYD6-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Micrel Inc. was a U.S.-based semiconductor company specializing in power management, timing, and interface ICs before its acquisition by Microchip Technology in 2015. Known for high-performance analog solutions targeting portable and industrial markets.
The MIC5320-PGYD6-TR belongs to Micrel's µCap ULDO™ family, engineered specifically for ultra-thin portable electronics where board area, thermal performance, and low-noise regulation are critical - including camera modules, mobile handsets, and wearable GPS devices.
FAQ
What are the exact output voltages of the MIC5320-PGYD6-TR?
The MIC5320-PGYD6-TR delivers precisely 3.0V on VOUT1 and 1.8V on VOUT2, as defined by its part number suffix "PGYD6" (P = 3.0V, G = 1.8V). These are factory-trimmed fixed outputs with ±3% accuracy across –40°C to +125°C junction temperature, eliminating need for external resistive feedback networks.
Does the MIC5320-PGYD6-TR require external capacitors for stability?
Yes - the MIC5320-PGYD6-TR requires a minimum 1µF X7R/X5R ceramic capacitor from VIN to GND and 1µF from each VOUT to GND. These are mandatory for stability per the datasheet; using smaller or high-ESR capacitors risks oscillation. No additional compensation components are needed due to its µCap architecture.
Can both outputs of the MIC5320-PGYD6-TR be enabled simultaneously?
Yes - the MIC5320-PGYD6-TR supports concurrent operation of both LDOs. EN1 (Pin 6) controls VOUT1 (3.0V), and EN2 (Pin 1) controls VOUT2 (1.8V); driving both pins high activates both outputs independently. Total ground current is 190µA typical at full 300mA combined load.
What is the thermal performance limitation of the MIC5320-PGYD6-TR in TSOT-23-6?
The MIC5320-PGYD6-TR has θJA = 235°C/W in the TSOT-23-6 package. At 3.3V input, 3.0V/1.8V outputs, and 150mA per channel, power dissipation is ~0.345W, limiting maximum ambient temperature to ~90.5°C. Adequate copper pour and thermal vias are recommended to approach this limit reliably.
Is the MIC5320-PGYD6-TR RoHS-compliant and halogen-free?
Yes - the MIC5320-PGYD6-TR meets RoHS Directive 2011/65/EU and is halogen-free per IEC 61249-2-21. The TSOT-23-6 package uses lead-free NiPdAu plating and halogen-free mold compound, certified per Micrel's material declarations and Microchip's post-acquisition compliance documentation.
MIC5320-PGYD6-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.8V, 3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.1V @ 150mA, 0.1V @ 150mA
- Current - Output:
- 150mA, 150mA
- Current - Quiescent (Iq):
- 120 µA
- Current - Supply (Max):
- 190 µA
- PSRR:
- 65dB ~ 45dB (1kHz ~ 20kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TSOT-23-6
MIC5320-PGYD6-TR FAQ
1.How can I place an order for MIC5320-PGYD6-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC5320-PGYD6-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC5320-PGYD6-TR reliable?
The price and inventory of MIC5320-PGYD6-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC5320-PGYD6-TR is usually 5 days.
3.What payment methods are accepted for MIC5320-PGYD6-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC5320-PGYD6-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC5320-PGYD6-TR?
MIC5320-PGYD6-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC5320-PGYD6-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC5320-PGYD6-TR?
For technical support, including MIC5320-PGYD6-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC5320-PGYD6-TR requirements.
6.How does Aetrix verify that MIC5320-PGYD6-TR is sourced from the original manufacturer or authorized distributors?
All MIC5320-PGYD6-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC5320-PGYD6-TR meets industry standards.
7.What is the process for return or replacement of MIC5320-PGYD6-TR?
All MIC5320-PGYD6-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC5320-PGYD6-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC5320-PGYD6-TR part is unused and in its original packaging.
Return procedure for MIC5320-PGYD6-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MIC5320-PGYD6-TR Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

