Microchip Technology MIC5335-SJYMT-TR
- Part No.:
- MIC5335-SJYMT-TR
- Manufacturer:
- Microchip Technology
- Package:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Datasheet:
-
MIC5335-SJYMT-TR.pdf
- Description:
- IC REG LINEAR 2.5V/3.3V 6TMLF
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MIC5335-SJYMT-TR from Microchip Technology is a dual-channel, 300 mA ultra-low dropout (ULDO) linear regulator in a 1.6 mm × 1.6 mm TDFN-6 package, delivering fixed 3.3 V and 2.5 V outputs with 75 mV dropout at 300 mA, 65 dB PSRR at 1 kHz, and µCap stability using only 1 µF ceramic output capacitors. It serves as a compact, high-efficiency power supply for RF receiver chains and digital baseband sections in portable wireless devices.
For engineers reviewing the MIC5335-SJYMT-TR datasheet, MIC5335-SJYMT-TR pinout, MIC5335-SJYMT-TR application, or MIC5335-SJYMT-TR equivalent, this page delivers verified electrical specs, thermal performance data, independent enable control behavior, dual-LDO stability conditions, and real-world use cases in GPS receivers and mobile media subsystems - all confirmed from Microchip's DS20006039A.
Technical Context
The MIC5335-SJYMT-TR integrates two independent CMOS-based ULDO regulators sharing a common VIN and GND, each with active-high enable (EN1/EN2), thermal shutdown, and current limit protection. Its µCap architecture eliminates need for large bypass capacitors by enabling stable operation with just 1 µF ceramic output capacitance per channel.
Designed for thermally constrained portable systems, it achieves 100°C/W junction-to-ambient thermal resistance in its 1.6 mm × 1.6 mm TDFN-6 package and supports full 300 mA load per LDO across –40°C to +125°C junction temperature range. Input voltage range is 2.3 V to 5.5 V, with dropout defined at 2% VOUT deviation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.3 V (VOUT1) and 2.5 V (VOUT2), fixed, ±2% accuracy over temperature |
| Max Output Current | 300 mA per LDO - supports simultaneous dual-rail loads without derating |
| Dropout Voltage | 75 mV @ 300 mA - enables regulation down to VIN = VOUT + 0.075 V, critical for battery-powered 3.3 V/2.5 V systems |
| PSRR | 65 dB @ 1 kHz - suppresses switching noise from upstream DC/DC converters feeding RF/analog circuitry |
| Quiescent Current | 90 µA per LDO - minimizes standby power in always-on GPS or sensor subsystems |
| Enable Logic | Active-high EN1/EN2 with <0.2 V low threshold and >1.1 V high threshold - compatible with 1.8 V/3.3 V GPIO |
| Stability Capacitor | 1 µF ceramic per output - reduces PCB area vs. traditional 10–22 µF tantalum solutions |
Pinout & Package
Package: 6-lead Thin DFN (TDFN-6, MT), 1.6 mm × 1.6 mm × 0.55 mm, exposed thermal pad (EPAD) internally connected to GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VIN | Common input supply rail | Accepts 2.3–5.5 V; must be bypassed with ≥1 µF ceramic capacitor to GND |
| 2 - GND | Power and signal reference ground | Shared return path for both LDOs; EPAD soldered to PCB ground plane for thermal relief |
| 3 - EN2 | LDO2 enable control input | Active-high logic; drives VOUT2 on/off independently; must not float - tie to GND or MCU GPIO |
| 4 - EN1 | LDO1 enable control input | Active-high logic; drives VOUT1 on/off independently; enables sequencing of 3.3 V before 2.5 V rails |
| 5 - VOUT2 | Regulated 2.5 V output | Delivers up to 300 mA; requires ≥1 µF ceramic capacitor to GND for stability |
| 6 - VOUT1 | Regulated 3.3 V output | Delivers up to 300 mA; decoupled separately from VOUT2 to prevent cross-talk in mixed-signal designs |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable pins | EN1 and EN2 allow precise power sequencing - e.g., enable 3.3 V rail first, then 2.5 V after stabilization |
| µCap stability | Operates stably with only 1 µF ceramic output capacitors per LDO, cutting board space and BOM cost vs. legacy LDOs |
| High PSRR at 1 kHz | 65 dB rejection enables clean analog/RF power delivery even when sharing input with noisy digital DC/DC converters |
| Ultra-low dropout | 75 mV @ 300 mA preserves headroom in single-cell Li-ion (3.0–3.6 V) or 3.3 V system designs |
| Thermal & current protection | Integrated thermal shutdown and 340–950 mA current limiting per LDO prevent damage during overload or poor heatsinking |
Applications
| GPS Receiver Power Management | Mobile Baseband Core Supply |
|---|---|
Use Scenario: Dual-rail power for GPS RF front-end (2.5 V LNA/VCO) and digital baseband (3.3 V MCU/ADC). IC Role / Device Role / Timing Role: Provides isolated, low-noise, sequenced 2.5 V and 3.3 V supplies with independent enable control. Use Value: Eliminates need for two discrete LDOs and external sequencing logic, reducing component count and layout complexity. |
Use Scenario: Powering 3.3 V I/O and 2.5 V core logic in portable media player SoC subsystems. IC Role / Device Role / Timing Role: Delivers tightly regulated dual voltages with fast 30 µs turn-on time for dynamic power gating. Use Value: Enables rapid wake-from-sleep transitions while maintaining PSRR >65 dB to prevent digital noise coupling into audio paths. |
| Digital Camera Sensor Bias | Portable Medical Diagnostic Module |
Use Scenario: Supplying image sensor analog front-end (2.5 V) and digital interface (3.3 V) in compact camera modules. IC Role / Device Role / Timing Role: Dual ULDO regulator with independent EN pins allows staggered power-up to avoid inrush current peaks. Use Value: 75 mV dropout ensures reliable operation down to 2.575 V input - critical for aging Li-ion batteries in handheld cameras. |
Use Scenario: Powering low-power ADC, op-amp signal chain (2.5 V), and Bluetooth LE radio (3.3 V) in wearable ECG monitors. IC Role / Device Role / Timing Role: Low 90 µA quiescent current per LDO extends battery life in always-on sensing mode. Use Value: µCap design with 1 µF capacitors enables miniaturized PCB layout meeting stringent size constraints of medical wearables. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6223D332MR-G | Single-output 3.3 V LDO; no 2.5 V rail; 200 mA max; 150 mV dropout @ 200 mA | Requires separate 2.5 V regulator; higher dropout limits usable input range | Select only if dual-rail integration is unnecessary and board space permits two ICs |
| Ricoh RP512K2533D-TR-F | Dual-output (2.5 V/3.3 V), 200 mA per channel, 250 mV dropout @ 200 mA, SOT-26 package | Larger footprint (2.8 mm × 2.9 mm); lower current and higher dropout reduce margin in high-load GPS apps | Consider for cost-sensitive designs where 300 mA load and ultra-low dropout are not required |
Compared with MIC5335-SJYMT-TR, the XC6223D332MR-G lacks integrated dual-rail capability and requires additional components for 2.5 V supply, while the RP512K2533D-TR-F trades off 100 mA per channel and 175 mV higher dropout for lower unit cost - making MIC5335-SJYMT-TR optimal for space-constrained, high-performance portable RF systems.
Availability
MIC5335-SJYMT-TR is available at Aetrix Electronics and suitable for GPS receivers, portable media players, and digital camera modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MIC5335-SJYMT-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and power management ICs, with ISO/TS-16949 certified manufacturing and global technical support.
The MIC5335 product line delivers dual-channel, high-density ULDO regulators optimized for portable electronics demanding minimal footprint, ultra-low dropout, and µCap stability - targeting battery-powered RF, imaging, and consumer multimedia applications.
FAQ
What are the exact output voltages of the MIC5335-SJYMT-TR?
The MIC5335-SJYMT-TR provides fixed 3.3 V on VOUT1 and 2.5 V on VOUT2, as confirmed by Microchip's Package Marking Table 5-1 (SPJ marking) and Electrical Characteristics section. Output voltage accuracy is ±2% over temperature (–40°C to +125°C), with load regulation of ≤2.0% from 100 µA to 300 mA per channel. These values are factory-trimmed and do not require external feedback resistors.
Does the MIC5335-SJYMT-TR require external capacitors for stability?
Yes - the MIC5335-SJYMT-TR requires a minimum 1 µF ceramic capacitor from each output (VOUT1 and VOUT2) to GND for stability, as specified in Section 4.3 of DS20006039A. An additional 1 µF ceramic capacitor is required from VIN to GND. X7R or X5R dielectric types are recommended; Y5V/Z5U capacitors are discouraged due to excessive capacitance drift over temperature.
Can the two LDOs in the MIC5335-SJYMT-TR be enabled independently?
Yes - the MIC5335-SJYMT-TR features independent active-high enable inputs: EN1 controls VOUT1 (3.3 V) and EN2 controls VOUT2 (2.5 V). Each pin has a logic-low threshold <0.2 V and logic-high threshold >1.1 V, supporting direct interfacing with 1.8 V or 3.3 V GPIO. Section 4.1 explicitly states that floating enable pins must be avoided to prevent indeterminate output states.
What is the thermal performance of the MIC5335-SJYMT-TR under full load?
At 300 mA per LDO with VIN = 3.3 V, VOUT1 = 3.3 V, and VOUT2 = 2.5 V, the MIC5335-SJYMT-TR dissipates 0.39 W. With θJA = 100°C/W, the maximum ambient temperature for safe operation is 86°C (calculated per Equation 4-3, DS20006039A page 10). The exposed thermal pad (EPAD) must be soldered to a PCB ground plane to achieve this rating.
Is the MIC5335-SJYMT-TR compatible with lead-free reflow processes?
Yes - the MIC5335-SJYMT-TR uses a Pb-free 6-lead TDFN package with Matte Tin (Sn) plating, rated for JEDEC-standard lead-free reflow profiles. The absolute maximum lead temperature is +260°C for 3 seconds (DS20006039A page 3), and the device complies with RoHS Directive 2011/65/EU as indicated by the 'Y' junction temperature suffix in the part number.
MIC5335-SJYMT-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.5V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 300mA, 0.2V @ 300mA
- Current - Output:
- 300mA, 300mA
- Current - Quiescent (Iq):
- 125 µA
- Current - Supply (Max):
- 220 µA
- PSRR:
- 65dB ~ 45dB (1kHz ~ 20kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TMLF® (1.6x1.6)
MIC5335-SJYMT-TR FAQ
1.How can I place an order for MIC5335-SJYMT-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC5335-SJYMT-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC5335-SJYMT-TR reliable?
The price and inventory of MIC5335-SJYMT-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC5335-SJYMT-TR is usually 5 days.
3.What payment methods are accepted for MIC5335-SJYMT-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC5335-SJYMT-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC5335-SJYMT-TR?
MIC5335-SJYMT-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC5335-SJYMT-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC5335-SJYMT-TR?
For technical support, including MIC5335-SJYMT-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC5335-SJYMT-TR requirements.
6.How does Aetrix verify that MIC5335-SJYMT-TR is sourced from the original manufacturer or authorized distributors?
All MIC5335-SJYMT-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC5335-SJYMT-TR meets industry standards.
7.What is the process for return or replacement of MIC5335-SJYMT-TR?
All MIC5335-SJYMT-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC5335-SJYMT-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC5335-SJYMT-TR part is unused and in its original packaging.
Return procedure for MIC5335-SJYMT-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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