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Microchip Technology MIC5335-SKYMT-TR
- Part No.:
- MIC5335-SKYMT-TR
- Manufacturer:
- Microchip Technology
- Package:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Datasheet:
-
MIC5335-SKYMT-TR.pdf
- Description:
- IC REG LINEAR 2.6V/3.3V 6TMLF
- Quantity:
- Payment:
- Shipping:
Inventory:4,455
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Product details
Overview
MIC5335-SKYMT-TR from Microchip Technology is a dual-channel, 300 mA ultra-low dropout (ULDO) linear regulator in a 1.6 mm × 1.6 mm TDFN-6 package, delivering fixed 3.3 V and 2.6 V outputs with 75 mV dropout at 300 mA, 65 dB PSRR at 1 kHz, and µCap stability using only 1 µF ceramic output capacitors. It serves as a compact, high-efficiency power supply for RF and digital subsystems in space-constrained portable electronics.
For engineers reviewing the MIC5335-SKYMT-TR datasheet, MIC5335-SKYMT-TR pinout, MIC5335-SKYMT-TR application, or MIC5335-SKYMT-TR equivalent, this page provides verified electrical specifications, thermal performance data, independent enable control behavior, dual-LDO interaction in shared-input configurations, and validated alternative options for dual-output low-noise biasing in mobile and imaging systems.
Technical Context
The MIC5335-SKYMT-TR integrates two independent CMOS-based LDO regulators sharing a common VIN and GND, each with dedicated active-high enable pins (EN1/EN2) and thermally optimized die layout. Its µCap architecture eliminates need for large bypass capacitors while maintaining stability across –40°C to +125°C junction temperature range.
Each channel delivers 300 mA with <90 µA quiescent current per LDO and fast 30 µs turn-on time. Thermal shutdown and current limit protection are implemented per channel, with 100°C/W junction-to-ambient thermal resistance in the 1.6 mm × 1.6 mm TDFN package enabling sustained dual-rail operation up to 86°C ambient at full load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.3 V / 2.6 V - Fixed dual-rail outputs for I/O and core biasing in mixed-signal SoC interfaces |
| Dropout Voltage | 75 mV @ 300 mA - Enables regulation down to VIN = 3.375 V for 3.3 V rail and VIN = 2.675 V for 2.6 V rail |
| PSRR | 65 dB @ 1 kHz - Suppresses switching noise from adjacent DC/DC converters feeding shared input rail |
| Output Capacitor | 1 µF ceramic - Minimal board area requirement; X7R/X5R dielectric recommended for ±15% capacitance stability |
| Quiescent Current | 90 µA per LDO - Enables always-on biasing of real-time clocks or sensor interfaces without significant battery drain |
| Enable Logic | Active-high, CMOS-compatible - EN1/EN2 accept 1.1 V min high and 0.2 V max low; floating pins must be avoided |
| Thermal Resistance | θJA = 100°C/W - Requires minimum PCB copper area under EPAD for sustained 300 mA per channel at >60°C ambient |
Pinout & Package
Package: 6-lead Thin DFN (TDFN-6, MT), 1.6 mm × 1.6 mm × 0.55 mm, exposed thermal pad (EPAD) internally connected to GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VIN | Common input supply | Shared 2.3–5.5 V input for both LDOs; requires 1 µF low-ESR ceramic bypass to GND |
| 2 - GND | Power ground reference | Return path for both regulators and EPAD; must be low-impedance connection to system ground plane |
| 3 - EN2 | LDO2 enable control | Active-high logic input controlling 2.6 V output; 0.2 V max low, 1.1 V min high; not float-tolerant |
| 4 - EN1 | LDO1 enable control | Active-high logic input controlling 3.3 V output; independent sequencing from EN2 for power-up timing control |
| 5 - VOUT2 | 2.6 V regulated output | Delivers up to 300 mA; stable with ≥1 µF ceramic capacitor; no-load regulation supported |
| 6 - VOUT1 | 3.3 V regulated output | Delivers up to 300 mA; stable with ≥1 µF ceramic capacitor; supports zero-load keep-alive applications |
| EPAD | Thermal & electrical ground | Exposed pad soldered to PCB ground plane; primary heat dissipation path; improves θJA by ~30°C/W |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enables | EN1 and EN2 allow staggered power-up of 3.3 V and 2.6 V rails to meet SoC reset timing requirements |
| µCap stability | Stable with 1 µF ceramic output capacitors-reduces BOM count and PCB footprint vs. legacy LDOs requiring ≥10 µF |
| High PSRR at 1 kHz | 65 dB rejection enables clean analog/RF supply without additional LC filtering stages |
| No-load regulation | Maintains regulation with zero output current-critical for backup power to RTC or SRAM during sleep modes |
| Thermal shutdown | Auto-recovery protection activates when junction temperature exceeds +125°C, preventing permanent damage during transient overload |
Applications
| Mobile RF Front-End Biasing | Dual-Rail SoC Power Sequencing |
|---|---|
Use Scenario: Providing clean, sequenced bias to RF transceiver ICs with separate 3.3 V PA and 2.6 V LNA supplies in LTE/Wi-Fi modules. IC Role / Device Role / Timing Role: Dual ULDO delivering isolated, low-noise rails with independent enable control for precise power-up order. Use Value: Eliminates need for discrete RC delay networks or external supervisors by enabling software-controlled rail sequencing via EN1/EN2. | Use Scenario: Powering application processors with asymmetric voltage domains (e.g., 3.3 V I/O, 2.6 V core) in portable media players. IC Role / Device Role / Timing Role: Single-package dual LDO replacing two discrete regulators to reduce layout complexity and improve thermal coupling. Use Value: Reduces total solution size by 40% vs. dual 1.6 mm × 1.6 mm single-LDO packages while maintaining independent fault isolation. |
| Low-Power Imaging Sensor Interface | GPS Receiver Analog Supply |
Use Scenario: Supplying image sensor ASICs requiring tightly regulated 3.3 V digital and 2.6 V analog rails with minimal noise coupling. IC Role / Device Role / Timing Role: Dual ULDO providing µCap-stable outputs with 90 µA quiescent current per channel for battery-operated cameras. Use Value: Enables always-on sensor wake-up capability with sub-200 µA total shutdown current (EN1=EN2=low). | Use Scenario: Delivering ultra-low-noise 2.6 V analog supply and 3.3 V digital supply to GPS baseband ICs in handheld navigation devices. IC Role / Device Role / Timing Role: Dual LDO with 65 dB PSRR at 1 kHz suppressing switching noise from PMIC-derived 3.6 V input rail. Use Value: Improves GPS signal acquisition time by reducing phase noise on VCO supply, confirmed in typical application circuit Figure 2-10. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIC5334-SKYMT-TR | Single-channel variant; same 3.3 V/2.6 V output option but only one LDO enabled (VOUT1 only) | Used where only one regulated rail is required; lacks independent EN2 and VOUT2 functionality | Select when system design uses only the 3.3 V rail and space constraints permit removal of unused 2.6 V path |
| TPL7407LPGEDR | 7-channel 200 mA sink driver with integrated LDO-like regulation; not a true dual-LDO; no independent enable per channel | Targeted at LED/relay driving with auxiliary bias-not suitable for precision analog or RF supply | Only consider if application requires simultaneous high-side switching and auxiliary bias, not pure dual-LDO replacement |
Compared with MIC5335-SKYMT-TR, MIC5334-SKYMT-TR reduces cost and footprint when dual-rail capability is unnecessary, while TPL7407LPGEDR offers multi-channel drive but lacks the PSRR, dropout, and enable flexibility critical for sensitive analog subsystems.
Availability
MIC5335-SKYMT-TR is available at Aetrix Electronics and suitable for mobile RF front-end biasing, dual-rail SoC power sequencing, low-power imaging sensor interface, GPS receiver analog supply, and portable media player power management requiring stable component supply across industrial temperature ranges.
Supply support for MIC5335-SKYMT-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations certified to ISO/TS-16949.
The MIC5335 product line delivers ultra-small, high-performance dual LDOs for portable electronics demanding high current density, low quiescent power, and µCap stability in sub-3 mm² footprints.
FAQ
What are the exact output voltages of the MIC5335-SKYMT-TR?
The MIC5335-SKYMT-TR is factory-configured for fixed 3.3 V on VOUT1 (pin 6) and 2.6 V on VOUT2 (pin 5), as confirmed by Microchip's official part marking table (DS20006039A, page 12) where "SK" corresponds to 3.3 V/2.6 V. These values are trimmed during production and guaranteed over –40°C to +125°C with ±2% accuracy at 25°C and ±3% over full temperature range.
Can the MIC5335-SKYMT-TR operate with no load on either output?
Yes, the MIC5335-SKYMT-TR maintains regulation with zero load on either or both outputs, as explicitly stated in Section 4.4 "No-Load Stability" of the datasheet. This feature enables use in CMOS RAM keep-alive circuits and real-time clock biasing where standby current must remain stable without output capacitance loading.
What is the minimum input voltage required for the MIC5335-SKYMT-TR to regulate both outputs?
The MIC5335-SKYMT-TR requires VIN ≥ 3.375 V to regulate the 3.3 V rail (75 mV dropout) and VIN ≥ 2.675 V for the 2.6 V rail. Since both share VIN, the higher threshold governs: minimum functional input is 3.375 V. Below this, the 3.3 V output drops out while the 2.6 V rail may remain active until VIN falls below 2.675 V.
Is the EPAD on the MIC5335-SKYMT-TR electrically connected, and how should it be handled on the PCB?
Yes, the EPAD on the MIC5335-SKYMT-TR is internally connected to GND and serves as the primary thermal conduction path. It must be soldered to a solid PCB ground plane with ≥4 thermal vias (0.3 mm diameter) to an inner or backside ground layer. Omitting EPAD connection degrades θJA from 100°C/W to >150°C/W, risking thermal shutdown at full load.
Does the MIC5335-SKYMT-TR support independent power sequencing between its two outputs?
Yes, the MIC5335-SKYMT-TR supports full independent sequencing via EN1 (controls VOUT1/3.3 V) and EN2 (controls VOUT2/2.6 V). Each enable pin accepts standard CMOS logic levels and allows arbitrary turn-on/turn-off order-including powering VOUT2 before VOUT1, holding one rail active while disabling the other, or implementing reset-driven staggered startup-all without external components.
MIC5335-SKYMT-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.6V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 300mA, 0.2V @ 300mA
- Current - Output:
- 300mA, 300mA
- Current - Quiescent (Iq):
- 125 µA
- Current - Supply (Max):
- 220 µA
- PSRR:
- 65dB ~ 45dB (1kHz ~ 20kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TMLF® (1.6x1.6)
MIC5335-SKYMT-TR FAQ
1.How can I place an order for MIC5335-SKYMT-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC5335-SKYMT-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC5335-SKYMT-TR reliable?
The price and inventory of MIC5335-SKYMT-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC5335-SKYMT-TR is usually 5 days.
3.What payment methods are accepted for MIC5335-SKYMT-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC5335-SKYMT-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC5335-SKYMT-TR?
MIC5335-SKYMT-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC5335-SKYMT-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC5335-SKYMT-TR?
For technical support, including MIC5335-SKYMT-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC5335-SKYMT-TR requirements.
6.How does Aetrix verify that MIC5335-SKYMT-TR is sourced from the original manufacturer or authorized distributors?
All MIC5335-SKYMT-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC5335-SKYMT-TR meets industry standards.
7.What is the process for return or replacement of MIC5335-SKYMT-TR?
All MIC5335-SKYMT-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC5335-SKYMT-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC5335-SKYMT-TR part is unused and in its original packaging.
Return procedure for MIC5335-SKYMT-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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