Microchip Technology MIC5370-PKYMT-TR
- Part No.:
- MIC5370-PKYMT-TR
- Manufacturer:
- Microchip Technology
- Package:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Datasheet:
-
MIC5370-PKYMT-TR.pdf
- Description:
- IC REG LINEAR 2.6V/3V 6TMLF
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MIC5370-PKYMT-TR from Micrel is a dual-output, high-performance LDO regulator delivering 150mA per channel with fixed 3.0V and 2.6V outputs in a 6-pin 1.6mm × 1.6mm Thin MLF® package. It features ±2% initial output accuracy, 155mV dropout at full load (150mA), and ultra-low 32µA quiescent current per LDO - optimized for camera DSP power supply circuits in compact portable electronics.
For engineers reviewing the MIC5370-PKYMT-TR datasheet, MIC5370-PKYMT-TR pinout, MIC5370-PKYMT-TR application, or MIC5370-PKYMT-TR equivalent, this device supports independent enable control, stable operation with 1µF ceramic capacitors, zero-off-mode shutdown (<1µA total), and thermal/current protection - critical for battery-powered mobile and handheld designs requiring tight voltage regulation and minimal board space.
Technical Context
The MIC5370-PKYMT-TR integrates two independent CMOS-based LDOs sharing a common input (VIN) and ground (GND), each with dedicated active-high enable pins (EN1/EN2) and regulated outputs (VOUT1/VOUT2). Its architecture enables simultaneous or staggered activation, with no-load stability and fast 50–125µs turn-on time.
Each LDO maintains ±2% output accuracy over –40°C to +125°C, achieves 60dB PSRR at 1kHz, and sustains regulation down to 155mV dropout at 150mA - enabled by low-ESR ceramic capacitor compatibility and internal current limiting (200–550mA) plus thermal shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltages | 3.0V (VOUT1) and 2.6V (VOUT2) - fixed, non-adjustable; eliminates external feedback resistors and simplifies layout. |
| Max Output Current | 150mA per LDO - supports dual-rail powering of core logic and I/O peripherals without derating at ambient ≤89.9°C. |
| Dropout Voltage | 155mV at 150mA - enables operation from 3.15V input for 3.0V rail and 2.75V input for 2.6V rail, extending battery runtime. |
| Quiescent Current | 32µA per LDO (64µA total active) - minimizes standby power loss in always-on subsystems like GPS or sensor interfaces. |
| Accuracy | ±2% initial, ±3% over –40°C to +125°C - ensures reliable voltage margins for 1.8V/2.5V/3.3V logic families across automotive-grade temperature range. |
| PSRR | 60dB at 1kHz - suppresses switching noise from upstream DC/DC converters, critical for analog/RF sections in camera modules. |
| Stability | Guaranteed with ≥1µF X5R/X7R ceramic output capacitors - eliminates need for tantalum or electrolytic caps, reducing cost and footprint. |
Pinout & Package
6-pin 1.6mm × 1.6mm Thin MLF® (MT) package with exposed thermal pad (internally connected to GND); RoHS-compliant, halogen-free mold compound, NiPdAu lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - VIN | Supply Input | Common input for both LDOs; accepts 2.5V–5.5V; requires 1µF ceramic bypass capacitor to GND for stability. |
| 2 - GND | Ground Reference | Power and signal return; connects internally to exposed thermal pad for enhanced thermal dissipation (θJA = 90°C/W). |
| 3 - EN2 | Enable Input (LDO2) | Active-high logic control for 2.6V output; VIH ≥ 1.2V, VIL ≤ 0.2V; must not be left floating to prevent indeterminate state. |
| 4 - EN1 | Enable Input (LDO1) | Active-high logic control for 3.0V output; independent of EN2 - enables flexible power sequencing in multi-rail systems. |
| 5 - VOUT2 | LDO2 Output | Regulated 2.6V supply; capable of sourcing 150mA; includes current limit and thermal shutdown protection. |
| 6 - VOUT1 | LDO1 Output | Regulated 3.0V supply; capable of sourcing 150mA; stable with 1µF ceramic output capacitor; no minimum load required. |
Key Features
| Feature | Design Value |
|---|---|
| Independent Enable Control | EN1 and EN2 allow separate on/off sequencing of 3.0V and 2.6V rails - essential for controlled power-up of camera DSP and interface logic. |
| Zero-Off-Mode Current | 0.05–1µA total shutdown current when both EN1 and EN2 are low - preserves battery charge during extended sleep modes. |
| Thermal & Current Protection | Internal thermal shutdown and 200–550mA current limiting per LDO - prevents damage under overload or short-circuit conditions. |
| Fast Transient Response | 50–125µs turn-on time with 1µF output capacitor - meets dynamic load requirements of burst-mode imaging processors. |
| No-Load Stability | Remains in regulation with 0mA load - supports keep-alive functions for real-time clocks or SRAM retention without dummy loads. |
Applications
| Camera DSP Power Supply | Mobile Phone Baseband Core |
|---|---|
|
Use Scenario: Dual-rail power delivery to image signal processor (ISP) and companion camera sensor in smartphone front/rear modules. IC Role / Device Role / Timing Role: Primary LDO providing clean, sequenced 3.0V (I/O) and 2.6V (core) supplies with independent enable control. Use Value: Eliminates need for discrete regulators or PMIC complexity while maintaining <±3% accuracy across –40°C to +125°C for outdoor use. |
Use Scenario: Powering baseband processor cores and memory interfaces in GSM/UMTS handsets with tight PCB area constraints. IC Role / Device Role / Timing Role: Dual-channel LDO supplying 3.0V (peripheral I/O) and 2.6V (core logic) from shared Li-ion battery input. Use Value: 1.6mm × 1.6mm footprint saves >50% board area vs. two discrete SOT-23 LDOs; 32µA quiescent current extends standby time. |
| GPS Receiver Module | Portable Media Player (PMP) Audio Codec |
|
Use Scenario: Low-noise biasing of GPS RF front-end and baseband ASIC in wearable navigation devices. IC Role / Device Role / Timing Role: Low-PSRR-sensitive LDO delivering 3.0V (RF section) and 2.6V (digital baseband) from single battery source. Use Value: 60dB PSRR at 1kHz suppresses DC/DC switching noise, improving GPS sensitivity and time-to-first-fix performance. |
Use Scenario: Powering stereo audio codec and flash memory controller in battery-operated PMPs with variable load profiles. IC Role / Device Role / Timing Role: Dual-output LDO supporting 3.0V (codec I/O) and 2.6V (memory core) with independent enable for power gating. Use Value: Independent shutdown reduces system idle current to <1µA; 155mV dropout extends usable battery voltage range by ~100mV. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIC5371-PKYMT-TR | Same pinout and electrical specs, but adds auto-discharge circuit (30Ω NFET per output) to rapidly discharge VOUT caps when disabled. | Required where fast output discharge is needed (e.g., to meet USB suspend timing or prevent back-powering of upstream circuits). | Select MIC5371-PKYMT-TR only if auto-discharge functionality is explicitly required; otherwise MIC5370-PKYMT-TR offers identical regulation performance at lower cost. |
| TCS2116-3026YFNR | 3.0V/2.6V dual LDO in 1.6mm × 1.6mm DFN; ±2% accuracy; 200mV dropout at 150mA; 45µA IQ per LDO. | Slightly higher dropout and quiescent current; lacks independent enable pins - uses single EN for both outputs. | Use TCS2116-3026YFNR only if board-level enable synchronization is acceptable and 15mV higher dropout is tolerable in system margin analysis. |
Compared with MIC5371-PKYMT-TR, the MIC5370-PKYMT-TR omits auto-discharge but retains identical regulation accuracy, dropout, and enable independence - making it optimal for cost-sensitive, non-auto-discharge applications. Against TCS2116-3026YFNR, MIC5370-PKYMT-TR provides superior enable flexibility and lower quiescent current, enabling finer-grained power management in portable systems.
Availability
MIC5370-PKYMT-TR is available at Aetrix Electronics and suitable for camera modules, mobile phone baseband subsystems, and GPS receiver designs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MIC5370-PKYMT-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Micrel Inc. was a U.S.-based semiconductor company specializing in power management, analog, and mixed-signal ICs before its acquisition by Microchip Technology in 2015.
The MIC5370 family was designed specifically for space-constrained, battery-powered portable electronics requiring dual-rail, low-quiescent-current LDO regulation with high accuracy and robust protection.
FAQ
What are the exact output voltages of the MIC5370-PKYMT-TR?
The MIC5370-PKYMT-TR delivers fixed 3.0V on VOUT1 and 2.6V on VOUT2. These values are laser-trimmed during manufacturing and specified with ±2% initial accuracy and ±3% over –40°C to +125°C. No external components are required to set or adjust these outputs - the marking code "PK" corresponds to the 3.0V/2.6V variant per Micrel's ordering guide.
Does the MIC5370-PKYMT-TR support independent enable control for each output?
Yes, the MIC5370-PKYMT-TR has two dedicated active-high enable inputs: EN1 controls VOUT1 (3.0V) and EN2 controls VOUT2 (2.6V). Each pin requires VIH ≥ 1.2V to activate its respective LDO and VIL ≤ 0.2V to disable it. Neither pin may be left floating, as that could cause unpredictable output states - pull-down resistors are recommended for default-off behavior.
Can the MIC5370-PKYMT-TR operate stably with no load on either output?
Yes, the MIC5370-PKYMT-TR remains stable and in regulation with zero load on either or both outputs. This no-load stability is confirmed in the datasheet and eliminates the need for dummy loads or minimum current requirements - a key advantage for low-power keep-alive circuits such as RTC backup or SRAM retention in portable devices.
What is the maximum allowable input voltage for the MIC5370-PKYMT-TR?
The absolute maximum input voltage (VIN) for the MIC5370-PKYMT-TR is +6V, but the recommended operating range is +2.5V to +5.5V. Operating above 5.5V risks exceeding absolute maximum ratings and may trigger internal protection circuits. For 3.0V/2.6V outputs, a typical input of 3.6V–4.2V (Li-ion battery range) ensures sufficient headroom while minimizing power dissipation.
Is the MIC5370-PKYMT-TR RoHS-compliant and lead-free?
Yes, the MIC5370-PKYMT-TR is RoHS-compliant and features a lead-free (Pb-free) finish with NiPdAu plating, as confirmed in the ordering information table and package description. The 1.6mm × 1.6mm Thin MLF® package is also halogen-free and qualified to JEDEC moisture sensitivity level MSL3, supporting standard reflow soldering processes.
MIC5370-PKYMT-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.6V, 3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.31V @ 150mA, 0.31V @ 150mA
- Current - Output:
- 150mA, 150mA
- Current - Quiescent (Iq):
- 45 µA
- Current - Supply (Max):
- 85 µA
- PSRR:
- 60dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TMLF® (1.6x1.6)
MIC5370-PKYMT-TR FAQ
1.How can I place an order for MIC5370-PKYMT-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC5370-PKYMT-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC5370-PKYMT-TR reliable?
The price and inventory of MIC5370-PKYMT-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC5370-PKYMT-TR is usually 5 days.
3.What payment methods are accepted for MIC5370-PKYMT-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC5370-PKYMT-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC5370-PKYMT-TR?
MIC5370-PKYMT-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC5370-PKYMT-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC5370-PKYMT-TR?
For technical support, including MIC5370-PKYMT-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC5370-PKYMT-TR requirements.
6.How does Aetrix verify that MIC5370-PKYMT-TR is sourced from the original manufacturer or authorized distributors?
All MIC5370-PKYMT-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC5370-PKYMT-TR meets industry standards.
7.What is the process for return or replacement of MIC5370-PKYMT-TR?
All MIC5370-PKYMT-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC5370-PKYMT-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC5370-PKYMT-TR part is unused and in its original packaging.
Return procedure for MIC5370-PKYMT-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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