Microchip Technology MIC5387-SG4YMT-TR
- Part No.:
- MIC5387-SG4YMT-TR
- Manufacturer:
- Microchip Technology
- Package:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Datasheet:
-
MIC5387-SG4YMT-TR.pdf
- Description:
- IC REG LIN 1.2V/1.8V/3.3V 6TMLF
- Quantity:
- Payment:

- Shipping:

Inventory:3,294
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MIC5387-SG4YMT from Micrel is an ultra-small triple-output LDO regulator delivering 150mA per channel with fixed output voltages of 3.3V, 1.8V, and 1.2V, operating from 2.5V to 5.5V input. It features 180mV dropout at 150mA, ±2% initial output accuracy, and 70dB PSRR at 1kHz - optimized for space-constrained portable electronics requiring stable multi-rail power.
For engineers reviewing the MIC5387-SG4YMT datasheet, MIC5387-SG4YMT pinout, MIC5387-SG4YMT application, or MIC5387-SG4YMT equivalent, key selection criteria include its 6-pin 1.6mm × 1.6mm Thin MLF® package, shared enable (EN2/3) for outputs 2 and 3 only, low 32µA per-LDO quiescent current, and guaranteed stability with 1µF ceramic capacitors.
Technical Context
The MIC5387-SG4YMT integrates three independent CMOS-based LDO regulators sharing a common input (VIN) and ground (GND), with dedicated output pins (OUT1–OUT3) and a single active-high enable (EN2/3) controlling only OUT2 and OUT3. OUT1 remains always-on when VIN ≥ 2.5V.
Its architecture supports simultaneous regulation of mixed-voltage rails (e.g., 3.3V I/O, 1.8V core, 1.2V logic) while maintaining high PSRR (>70dB @ 1kHz) and low noise (125–152µVRMS), enabled by internal compensation optimized for 1µF ceramic output capacitors without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltages | 3.3V (OUT1), 1.8V (OUT2), 1.2V (OUT3) - fixed, non-adjustable, enabling direct replacement of discrete single-LDO solutions in multi-rail designs. |
| Max output current | 150mA per output - sufficient to power baseband processors, camera sensors, or GPS RF sections without thermal derating under typical ambient conditions. |
| Dropout voltage | 180mV @ 150mA - allows operation with ≤1.38V headroom (e.g., 3.3V out from 3.48V Li-ion battery), extending usable battery life in portable systems. |
| PSRR | 70dB @ 1kHz - suppresses switching noise from adjacent DC-DC converters, critical for analog/RF subsystems like GPS receivers or audio codecs. |
| Quiescent current | 32µA per LDO - ensures <100µA total ground current in shutdown-like states (EN2/3 = LOW), minimizing standby drain in always-on keep-alive circuits. |
| Accuracy | ±2% initial, ±3% over −40°C to +125°C - meets tight tolerance requirements for memory I/O, FPGA configuration rails, and sensor biasing without post-production trimming. |
| Package | 6-pin 1.6mm × 1.6mm Thin MLF® - occupies only 2.56mm² PCB area, reducing board real estate by 36% vs. 2mm × 2mm alternatives, ideal for ultra-thin mobile form factors. |
Pinout & Package
Package: 6-pin 1.6mm × 1.6mm Thin MLF® (MT) with exposed heatsink pad (EP) - requires solder connection to PCB ground plane for thermal performance (θJA = 92.4°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Common ground reference | Shared return path for all three LDOs; must be low-impedance connection to minimize noise coupling between outputs. |
| VIN (Pin 2) | Input supply rail | Single input feeding all three regulators; requires 1µF X5R/X7R ceramic capacitor to GND for stability and high-frequency noise filtering. |
| EN2/3 (Pin 3) | Enable control for OUT2 & OUT3 | Active-high digital input (logic high ≥1.2V); controls power sequencing - OUT1 remains active regardless of EN2/3 state. |
| OUT3 (Pin 4) | 1.2V regulated output | Dedicated 150mA rail for low-voltage logic (e.g., ARM Cortex-M core, DDR termination), stable with 1µF ceramic capacitor. |
| OUT2 (Pin 5) | 1.8V regulated output | Dedicated 150mA rail for interface I/O (e.g., SDIO, SPI, USB PHY), compatible with 1.8V logic families and low-power sensors. |
| OUT1 (Pin 6) | 3.3V regulated output | Always-on 150mA rail for system peripherals (e.g., camera module, Bluetooth radio), eliminating need for separate enable logic. |
Key Features
| Feature | Design Value |
|---|---|
| Stable with 1µF ceramic capacitors | Eliminates need for larger or higher-ESR electrolytics, reducing BOM count and PCB footprint while ensuring robust transient response. |
| No-load stability | Remains in regulation with zero load - essential for CMOS RAM keep-alive rails and backup power domains where current draw may drop to nanoamps. |
| Thermal shutdown & current limit | Internally protects against short-circuit or overload on any output (current limit 200–550mA), preventing damage during hot-plug or fault events. |
| Low output voltage noise | 125–152µVRMS (10Hz–100kHz) - preserves signal integrity in noise-sensitive analog circuits such as GPS front-ends or audio ADCs. |
| RoHS-compliant & halogen-free | Meets environmental compliance requirements for consumer and industrial products; NiPdAu lead finish ensures reliable solderability. |
Applications
| Mobile Phone Power Management | Digital Camera Sensor Biasing |
|---|---|
Use Scenario: Simultaneous powering of application processor (1.2V), memory interface (1.8V), and display backlight driver (3.3V) in slim smartphone designs. IC Role / Device Role / Timing Role: Triple LDO providing isolated, low-noise, sequenced voltage rails with minimal board area. Use Value: Reduces component count versus three discrete LDOs while maintaining PSRR >70dB to prevent switching noise from corrupting RF receive sensitivity. | Use Scenario: Biasing CMOS image sensor (1.2V analog core), ISP (1.8V I/O), and flash LED driver (3.3V) in compact action cameras. IC Role / Device Role / Timing Role: Single-package solution delivering tightly regulated, low-noise supplies synchronized to image capture timing. Use Value: Enables clean analog pixel readout by suppressing supply-induced fixed-pattern noise via 152µVRMS noise floor and 180mV dropout headroom. |
| GPS Receiver Module | PDA System-on-Chip Supply |
Use Scenario: Powering GPS RF frontend (1.2V), baseband processor (1.8V), and serial interface (3.3V) in automotive navigation units. IC Role / Device Role / Timing Role: Low-PSRR LDO array rejecting noise from engine-control ECU switching supplies. Use Value: Maintains GPS acquisition time <3s by limiting supply-induced phase noise through 70dB ripple rejection at 1kHz. | Use Scenario: Supplying ARM9 SoC (1.2V core), SDRAM controller (1.8V), and touchscreen controller (3.3V) in handheld PDAs. IC Role / Device Role / Timing Role: Always-on 3.3V rail (OUT1) enables instant wake-from-sleep; EN2/3 controls deep-sleep mode for remaining rails. Use Value: Achieves <10µA system standby current by disabling OUT2/OUT3 while preserving RTC and RAM retention via OUT1. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIC5387-SGFYMT | Same package and pinout; outputs 3.3V/1.8V/1.5V instead of 3.3V/1.8V/1.2V. | Suitable where 1.5V logic (e.g., certain DDR standards) replaces 1.2V core voltage. | Select when system requires 1.5V rail instead of 1.2V; no layout change needed. |
| TPS79933DDCR | Single-output 3.3V LDO (150mA), SOT-23-5 package; no 1.8V/1.2V outputs or shared enable. | Requires two additional LDOs to replicate full functionality; increases board area and BOM complexity. | Use only if triple-output integration is unnecessary and design prioritizes vendor diversification over space savings. |
Compared with MIC5387-SG4YMT, MIC5387-SGFYMT offers identical form-factor and sequencing but targets 1.5V logic domains, whereas TPS79933DDCR provides only one rail and demands external enable logic and layout rework - making MIC5387-SG4YMT the optimal choice for integrated, space-constrained multi-rail systems.
Availability
MIC5387-SG4YMT is available at Aetrix Electronics and suitable for mobile phones, digital cameras, GPS modules, and portable electronics requiring stable component supply across extended temperature ranges (−40°C to +125°C) and long production lifecycles.
Supply support for MIC5387-SG4YMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Micrel Inc. was a U.S.-based semiconductor company specializing in power management, analog, and RF solutions before its acquisition by Microchip Technology in 2015.
The MIC5387 product line was designed specifically for ultra-compact, multi-rail power delivery in battery-powered portable devices - emphasizing minimal footprint, low quiescent current, and high PSRR without external compensation.
FAQ
What are the fixed output voltages of the MIC5387-SG4YMT?
The MIC5387-SG4YMT provides three fixed output voltages: 3.3V on OUT1, 1.8V on OUT2, and 1.2V on OUT3. These values are factory-trimmed and non-adjustable. The 1.2V rail is specifically intended for modern low-voltage logic cores such as ARM Cortex-M series processors, and its accuracy is maintained at ±2% initial and ±3% over the full −40°C to +125°C operating range.
Does the MIC5387-SG4YMT require external capacitors for stability?
Yes, the MIC5387-SG4YMT requires a 1µF X5R or X7R ceramic capacitor from VIN to GND and a 1µF ceramic capacitor on each output (OUT1, OUT2, OUT3) to ensure stability. Y5V or Z5U dielectrics are not recommended due to excessive capacitance loss over temperature. The MIC5387-SG4YMT's internal compensation is optimized for these values - larger capacitors do not improve performance and may degrade transient response.
How does the enable function work on the MIC5387-SG4YMT?
The MIC5387-SG4YMT features a single active-high enable pin (EN2/3, Pin 3) that controls only OUT2 and OUT3. When EN2/3 is pulled high (≥1.2V), both 1.8V and 1.2V outputs are enabled; when pulled low (≤0.2V), they shut down. OUT1 (3.3V) has no enable input and remains active whenever VIN is ≥2.5V. The enable pin must never be left floating, as this may cause indeterminate output states.
What is the thermal performance of the MIC5387-SG4YMT in its 1.6mm × 1.6mm package?
The MIC5387-SG4YMT uses a 6-pin Thin MLF® package with θJA = 92.4°C/W. With all three outputs delivering 150mA (e.g., VIN = 3.3V, VOUTs = 3.3V/1.8V/1.2V), power dissipation is ~0.375W, allowing a maximum ambient temperature of ~90°C before reaching the 125°C junction limit. Proper thermal design - including soldering the exposed pad (EP) to a solid ground plane - is essential to maintain reliability under continuous load.
Is the MIC5387-SG4YMT RoHS-compliant and lead-free?
Yes, the MIC5387-SG4YMT is RoHS-compliant and lead-free, using a NiPdAu lead finish and halogen-free mold compound as specified in the official Micrel datasheet. It meets JEDEC J-STD-020 moisture sensitivity level (MSL) 3 requirements and is qualified for reflow soldering up to 260°C peak temperature (10-second duration).
MIC5387-SG4YMT-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 6-UFDFN Exposed Pad, 6-TMLF®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 3
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.2V, 1.8V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.38V @ 150mA, 0.38V @ 150mA, 0.31V @ 150mA
- Current - Output:
- 150mA, 150mA, 150mA
- Current - Quiescent (Iq):
- 40 µA
- Current - Supply (Max):
- 120 µA
- PSRR:
- 70dB ~ 60dB (1kHz ~ 10kHz), 70dB ~ 60dB (1kHz ~ 10kHz), -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TMLF® (1.6x1.6)
MIC5387-SG4YMT-TR FAQ
1.How can I place an order for MIC5387-SG4YMT-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MIC5387-SG4YMT-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIC5387-SG4YMT-TR reliable?
The price and inventory of MIC5387-SG4YMT-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIC5387-SG4YMT-TR is usually 5 days.
3.What payment methods are accepted for MIC5387-SG4YMT-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIC5387-SG4YMT-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIC5387-SG4YMT-TR?
MIC5387-SG4YMT-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIC5387-SG4YMT-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIC5387-SG4YMT-TR?
For technical support, including MIC5387-SG4YMT-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIC5387-SG4YMT-TR requirements.
6.How does Aetrix verify that MIC5387-SG4YMT-TR is sourced from the original manufacturer or authorized distributors?
All MIC5387-SG4YMT-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIC5387-SG4YMT-TR meets industry standards.
7.What is the process for return or replacement of MIC5387-SG4YMT-TR?
All MIC5387-SG4YMT-TR units undergo pre-shipment inspection (PSI). If there is an issue with MIC5387-SG4YMT-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIC5387-SG4YMT-TR part is unused and in its original packaging.
Return procedure for MIC5387-SG4YMT-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MIC5387-SG4YMT-TR Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

