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NXP Semiconductors MIMX9332AVTYMAB
- Part No.:
- MIMX9332AVTYMAB
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
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MIMX9332AVTYMAB.pdf
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- MIMX9332AVTYMAB
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Product details
Overview
MIMX9332AVTYMAB from NXP Semiconductors is an automotive-qualified dual-core Arm® Cortex®-A55 applications processor operating at up to 1.7 GHz, integrated with a Cortex®-M33 real-time core (250 MHz), 256 KB cluster L3 cache with ECC, dual 1 Gbps Ethernet controllers (one with TSN support), and CAN-FD interfaces-designed for driver monitoring systems and cost-optimized automotive gateways.
For engineers reviewing the MIMX9332AVTYMAB datasheet, MIMX9332AVTYMAB pinout, MIMX9332AVTYMAB application, or MIMX9332AVTYMAB equivalent, key selection considerations include its AEC-Q100 Grade 2 qualification (-40°C to +125°C), LPDDR4X memory interface with inline ECC, MIPI CSI-2/DSI support, and EdgeLock® secure enclave for functional safety-critical automotive edge compute.
Technical Context
The MIMX9332AVTYMAB implements a heterogeneous dual-CPU architecture: two Cortex-A55 cores (1.7 GHz) handle high-throughput Linux-based application workloads, while the dedicated Cortex-M33 (250 MHz) manages real-time control, low-power monitoring, and safety-critical firmware tasks-enabling concurrent operation without resource contention. Its memory subsystem includes 640 KB on-chip RAM with ECC, boot ROM for both A55 and M33, and a 16-bit LPDDR4X interface supporting up to 2 GB with inline ECC.
Connectivity is built for automotive gateway roles: dual Gigabit Ethernet (one IEEE 802.1AS/TSN-capable), two FlexCAN modules with FD support, two I3C buses, eight LPUARTs (up to 5 Mbps), and three uSDHC interfaces-including eMMC 5.1 HS400 DDR mode (400 MB/s). Security is enforced via Arm TrustZone-A/M, TRDC with 16 domains, EdgeLock® secure enclave, and tamper-detect BBSM with secure RTC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual Arm® Cortex®-A55 @ up to 1.7 GHz; enables Linux-based application processing with NEON/FPU acceleration |
| Real-time Core | Arm® Cortex®-M33 @ up to 250 MHz; handles deterministic control, power management, and safety monitor functions |
| L3 Cache | 256 KB cluster cache with parity/ECC protection; reduces memory latency and improves system reliability |
| Memory Interface | 16-bit LPDDR4X/LPDDR4 with inline ECC; supports up to 2 GB DRAM and meets ASIL-B data integrity requirements |
| Ethernet | Dual 1 Gbps controllers: one with TSN (IEEE 802.1AS/1Qbv), one with AVB/EEE/1588; enables time-synchronized gateway routing |
| Automotive Qualification | AEC-Q100 Grade 2 (-40°C to +125°C junction); qualified for under-hood and cockpit ECU deployment |
| Security | EdgeLock® secure enclave, Arm TrustZone-A/M, TRDC (16 domains), BBSM with tamper detection and secure RTC |
| Camera & Display | 2-lane MIPI CSI-2 (1080p30), 4-lane MIPI DSI (1080p60), LVDS Tx (1366×768p60), parallel display support |
Pinout & Package
Package: 306-ball FCBGA, 14 mm × 14 mm, 0.65 mm pitch, RoHS-compliant, automotive-grade thermal performance (RθJA = 21.7°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_SOC | Core logic supply | 0.61–0.95 V input; voltage scaling enables dynamic power/performance tuning across operating modes |
| CLKIN1/CLKIN2 | External clock inputs | No internal pull-up/down; requires external 10 kΩ pull-down if unused-critical for clock tree stability |
| POR_B | Power-on reset input | No internal pull; requires external pull-up to NVCC_BBSM_1P8-ensures reliable reset assertion during cold start |
| ONOFF | Power state control | Ground pulse triggers ON/OFF transitions or forced shutdown; integrates with PMIC sequencing for safe state transitions |
| RTC_XTALI/O | Real-time clock oscillator | Requires board-level capacitor tuning to compensate for parasitics; supports external <50 kHz clock injection |
| MIPI_CSI1_Dx_P/N | Camera serial interface | 2-lane MIPI CSI-2 differential pair; supports up to 1.5 Gbps/lane for 1080p30 imaging in DMS applications |
Key Features
| Feature | Design Value |
|---|---|
| Heterogeneous CPU Architecture | Dual Cortex-A55 + Cortex-M33 enables concurrent Linux application execution and hard real-time control without OS interference |
| Time-Sensitive Networking (TSN) | Hardware-accelerated IEEE 802.1AS/1Qbv/1Qci support in one Ethernet controller-enables deterministic communication for ADAS sensor fusion |
| Secure Boot & Runtime Integrity | EdgeLock® enclave enforces immutable root-of-trust, authenticated boot, and runtime attestation-meets ISO 21434 and UNECE R155 requirements |
| Automotive Camera Interface | 2-lane MIPI CSI-2 with programmable pixel rate up to 200 MPixel/s and interlaced-to-progressive conversion-optimized for driver-facing camera pipelines |
| Flexible Power Domain Partitioning | Internal power switches enable selective gating of A55, M33, and peripheral domains-reduces quiescent current in vehicle sleep states |
| Functional Safety Support | Built-in parity/ECC on L1/L2 caches, TLBs, OCRAM, and DRAM controller; diagnostic coverage aligned with ASIL-B decomposition |
Applications
| Driver Monitoring System (DMS) | Cost-Optimized Automotive Gateway |
|---|---|
Use Scenario: Real-time facial landmark detection and drowsiness analysis using infrared camera input in vehicle cabins. IC Role / Device Role / Timing Role: MIMX9332AVTYMAB serves as primary vision processing unit, running Linux-based AI inference on Cortex-A55 while Cortex-M33 monitors sensor health and manages low-power wake events. Use Value: Integrated MIPI CSI-2 (2-lane, 1080p30), PXP image pipeline, and 256 KB L3 cache reduce external memory bandwidth and latency for sub-100 ms inference loops. |
Use Scenario: Centralized vehicle network bridge aggregating CAN-FD, Ethernet AVB/TSN, and LIN traffic between ADAS, infotainment, and body control domains. IC Role / Device Role / Timing Role: MIMX9332AVTYMAB acts as gateway SoC, with dual Ethernet controllers handling time-synchronized sensor data forwarding and FlexCAN modules managing legacy bus translation. Use Value: Hardware TSN scheduling, IEEE 1588 timestamping, and dual-GbE throughput (≥1.4 Gbps aggregate) ensure deterministic latency (<100 μs) for critical ADAS messages. |
| General-Purpose Automotive Compute | In-Vehicle Infotainment (IVI) Companion |
Use Scenario: Running lightweight containerized services (OTA update agent, telematics stack, diagnostics server) in head-unit or zone controller ECUs. IC Role / Device Role / Timing Role: MIMX9332AVTYMAB provides scalable application compute with Linux support, while Cortex-M33 isolates safety-critical watchdog and secure boot verification. Use Value: 640 KB on-chip RAM with ECC eliminates need for external SRAM in safety-monitored boot path; LPDDR4X interface ensures >3.7 GT/s memory bandwidth for multi-service concurrency. |
Use Scenario: Secondary display controller driving rear-seat entertainment screens via MIPI DSI or LVDS, synchronized with main IVI head-unit. IC Role / Device Role / Timing Role: MIMX9332AVTYMAB operates as offload engine for display composition, video decode, and audio mixing-freeing main IVI SoC resources. Use Value: Integrated LCDIF, PXP graphics accelerator, and 7x I2S/TDM audio interfaces enable independent 1080p60 display output with multi-channel audio playback without external codecs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive applications processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIMX9352AVTXMBC | Same package and pinout; adds enabled NPU (256 MAC @ 1.0 GHz) and third Cortex-A55 core; higher thermal envelope (2.5 W typical vs. 2.1 W) | Required for ML-based DMS with on-device neural net inference; not suitable where NPU is unused and thermal budget is constrained | Select MIMX9352AVTXMBC only when NPU acceleration is mandatory and PCB layout accommodates higher power dissipation. |
| S32G399A | ARM Cortex-A53/A72 + Cortex-M7; includes hardware virtualization, ASIL-D capable safety island, and integrated 10/100/1000BASE-T1 Ethernet PHY | Targeted at zonal gateway with Ethernet switch functionality and AUTOSAR Adaptive/Classic coexistence; lacks MIPI CSI/DSI native support | Choose S32G399A for full zonal gateway with time-triggered networking and functional safety certification; MIMX9332AVTYMAB better fits vision-centric edge nodes. |
Compared with MIMX9352AVTXMBC, MIMX9332AVTYMAB offers identical dual-A55/M33 architecture and TSN capability at lower power and cost-ideal for non-NPU automotive edge compute. Versus S32G399A, it trades ASIL-D safety islands and 1000BASE-T1 for superior camera/display integration and lower BOM complexity in vision gateway roles.
Availability
MIMX9332AVTYMAB is available at Aetrix Electronics and suitable for driver monitoring systems, automotive gateways, and general-purpose automotive compute applications requiring stable component supply, AEC-Q100 Grade 2 qualification, and long-term industrial lifecycle support.
Supply support for MIMX9332AVTYMAB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Arm-based applications processors and automotive functional safety.
The i.MX 93 family-including MIMX9332AVTYMAB-is designed specifically for power-optimized, safety-aware automotive edge computing, targeting driver monitoring, cost-sensitive gateways, and vision-enabled cockpit systems with integrated security and TSN.
FAQ
What is the operating temperature range for MIMX9332AVTYMAB?
MIMX9332AVTYMAB is qualified to AEC-Q100 Grade 2 with a junction temperature range of -40°C to +125°C. This rating is validated per automotive environmental stress testing standards and supports under-hood and instrument cluster deployment. The device's thermal resistance (RθJA = 21.7°C/W) assumes JEDEC JESD51-9 2s2p test board conditions. Derating curves and thermal pad recommendations are provided in the i.MX 93 Applications Processor Reference Manual (IMX93RM).
Does MIMX9332AVTYMAB include a Neural Processing Unit (NPU)?
No, MIMX9332AVTYMAB does not include an enabled Neural Processing Unit. Per Table 2 of the IMX93AEC datasheet, the "32" sub-family (e.g., MIMX9332AVTYMAB) is defined as "Without NPU", whereas "52" variants (e.g., MIMX9352AVTXMBC) explicitly list NPU as "Enabled". The MIMX9332AVTYMAB retains all other i.MX 93 features-including dual Cortex-A55, Cortex-M33, TSN Ethernet, and MIPI interfaces-but omits NPU logic to reduce die size, power, and cost for non-ML automotive edge use cases.
What memory types and capacities does MIMX9332AVTYMAB support?
MIMX9332AVTYMAB supports 16-bit LPDDR4X and LPDDR4 memory with inline ECC, enabling up to 2 GB of external DRAM. It also integrates 640 KB of on-chip RAM (OCRAM) with ECC, 256 KB boot ROM for Cortex-A55, and 256 KB boot ROM for Cortex-M33. The DRAM interface operates at 3.7 GT/s and complies with JEDEC JESD209-4B specifications. No DDR3, DDR4, or LPDDR3 support is provided-only LPDDR4(X) is electrically and protocol-compatible.
Which camera interfaces are supported by MIMX9332AVTYMAB?
MIMX9332AVTYMAB supports one 2-lane MIPI CSI-2 interface compliant with v1.3 specification, capable of up to 1.5 Gbps per lane (200 MPixel/s aggregate), and a parallel camera interface supporting up to 2K resolution. It does not support 4-lane MIPI CSI-2. The ISI subsystem provides hardware-accelerated image downscaling, color space conversion (RGB/YUV), and interlaced-to-progressive conversion-making it suitable for driver monitoring systems using single-lens IR cameras.
Is MIMX9332AVTYMAB pin-compatible with other i.MX 93 family members?
MIMX9332AVTYMAB uses the 306-ball FCBGA package (14 mm × 14 mm, 0.65 mm pitch) shared with MIMX9352AVTXMAC/MBC and MIMX9331AVTXMAC. Pin assignments for power, clocks, reset, and major peripherals (Ethernet, USB, CAN, MIPI) are identical across these variants. However, ball functions for certain GPIOs and debug signals may differ due to silicon configuration-always verify against the specific variant's pinmux spreadsheet (IMX93RM Appendix A) before PCB reuse.
MIMX9332AVTYMAB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- -
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Core Processor:
- -
- Number of Cores/Bus Width:
- -
- Speed:
- -
- Co-Processors/DSP:
- -
- RAM Controllers:
- -
- Graphics Acceleration:
- -
- Display & Interface Controllers:
- -
- Ethernet:
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- SATA:
- -
- USB:
- -
- Voltage - I/O:
- -
- Operating Temperature:
- -
- Grade:
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- Qualification:
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- Security Features:
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- Mounting Type:
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- Supplier Device Package:
- -
- Additional Interfaces:
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MIMX9332AVTYMAB FAQ
1.How can I place an order for MIMX9332AVTYMAB through Aetrix?
Please submit a Request for Quotation (RFQ) for MIMX9332AVTYMAB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIMX9332AVTYMAB reliable?
The price and inventory of MIMX9332AVTYMAB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMX9332AVTYMAB is usually 5 days.
3.What payment methods are accepted for MIMX9332AVTYMAB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMX9332AVTYMAB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIMX9332AVTYMAB?
MIMX9332AVTYMAB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIMX9332AVTYMAB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIMX9332AVTYMAB?
For technical support, including MIMX9332AVTYMAB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMX9332AVTYMAB requirements.
6.How does Aetrix verify that MIMX9332AVTYMAB is sourced from the original manufacturer or authorized distributors?
All MIMX9332AVTYMAB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMX9332AVTYMAB meets industry standards.
7.What is the process for return or replacement of MIMX9332AVTYMAB?
All MIMX9332AVTYMAB units undergo pre-shipment inspection (PSI). If there is an issue with MIMX9332AVTYMAB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIMX9332AVTYMAB part is unused and in its original packaging.
Return procedure for MIMX9332AVTYMAB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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