NXP Semiconductors MIMX9351AVTYMAB
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- MIMX9351AVTYMAB
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Product details
Overview
MIMX9351AVTYMAB from NXP Semiconductors is an automotive-qualified i.MX 93 applications processor featuring a single Arm® Cortex®-A55 core operating at up to 1.7 GHz, integrated Arm® Cortex®-M33 real-time controller (250 MHz), and neural processing unit (NPU) disabled. It supports LPDDR4X/LPDDR4 memory (up to 2 GB), dual Gigabit Ethernet with TSN support, MIPI CSI-2 (2-lane, 1080p30), and MIPI DSI (4-lane, 1080p60), targeting cost-optimized automotive gateways and driver monitoring systems.
For engineers reviewing the MIMX9351AVTYMAB datasheet, MIMX9351AVTYMAB pinout, MIMX9351AVTYMAB application, or MIMX9351AVTYMAB equivalent, key selection criteria include its AEC-Q100 Grade 2 qualification (-40°C to +125°C), absence of NPU acceleration, 14 × 14 mm FCBGA306 package with 0.65 mm pitch, and dual Ethernet with IEEE 1588/TSN timing precision for deterministic automotive networking.
Technical Context
The MIMX9351AVTYMAB implements a heterogeneous compute architecture: the Cortex-A55 handles Linux-based application processing while the Cortex-M33 manages real-time tasks including power state coordination and safety-critical monitoring. Its memory subsystem includes 256 KB cluster L3 cache with ECC, 640 KB on-chip RAM, and boot ROMs for both cores.
Connectivity is built around two FlexCAN modules supporting CAN-FD, dual GbE controllers (one with TSN), three uSDHC interfaces (eMMC 5.1, SDXC, SDIO), and eight LPUARTs. Security relies on Arm TrustZone-A/M, EdgeLock® secure enclave, TRDC with 16 domains, and BBSM with tamper detection and secure RTC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Single Arm® Cortex®-A55 @ up to 1.7 GHz - enables Linux-capable gateway compute without dual-core overhead |
| Real-time Core | Arm® Cortex®-M33 @ up to 250 MHz - provides deterministic low-power control for wake-up, monitoring, and safety functions |
| NPU Support | Disabled - eliminates NPU-related power, thermal, and software stack complexity in cost-sensitive applications |
| Memory Interface | 16-bit LPDDR4X/LPDDR4 with inline ECC - supports up to 2 GB DDR space with error correction for automotive reliability |
| Ethernet | Dual 1 Gbps controllers: one with TSN, both with IEEE 1588/AVB/EEE - enables time-synchronized gateway bridging between CAN, Ethernet, and legacy buses |
| Automotive Qualification | AEC-Q100 Grade 2 (–40°C to +125°C junction) - certified for under-hood and cabin-mounted automotive ECUs |
| Package | FCBGA306, 14 × 14 mm, 0.65 mm pitch - standard automotive-compatible footprint with validated thermal resistance (RθJA = 21.7°C/W) |
Pinout & Package
Package: 306-ball Fine-Pitch Chip Scale Ball Grid Array (FCBGA), 14 mm × 14 mm, 0.65 mm ball pitch, RoHS-compliant, automotive-grade reflow profile.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_SOC | Main SoC logic supply | 0.61–0.95 V adjustable rail; voltage scaling enables dynamic power/performance trade-offs |
| CLKIN1/CLKIN2 | External clock inputs | Accept 24 MHz crystal or oscillator reference; no internal pull-up/down - external 10 kΩ pull-down required if unused |
| ONOFF | Power state control | Active-low signal triggering ON/OFF transitions and software-controllable power-down interrupts |
| POR_B | Power-on reset input | No internal pull-up/down - requires external pull-up to NVCC_BBSM_1P8 for reliable reset assertion |
| MIPI_CSI1_CLK_P/N | MIPI CSI-2 clock differential pair | Supports 80 Mbps–1.5 Gbps per lane; compliant with MIPI D-PHY v1.2 for camera sensor interfacing |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot & TrustZone | Hardware-enforced chain-of-trust with Arm TrustZone-A/M isolation and EdgeLock® secure enclave for firmware integrity and runtime protection |
| Time-Sensitive Networking | IEEE 802.1AS/1588/TSN support in dedicated Ethernet controller - enables sub-microsecond time synchronization for ADAS and domain controller gateways |
| Flexible Power Management | Multiple power domains with internal switches and programmable trip points on integrated temperature sensor - allows fine-grained power gating of Cortex-A55, Cortex-M33, and peripherals |
| Automotive I/O Robustness | GPIOs with ±1000 V HBM ESD rating and latch-up immunity per JESD78 Class II - meets stringent automotive board-level reliability requirements |
| Camera & Display Integration | MIPI CSI-2 (2-lane, 1080p30) + MIPI DSI (4-lane, 1080p60) + LVDS Tx + parallel interface - supports multi-sensor DMS and multi-display HMI without external bridge ICs |
Applications
| Driver Monitoring System (DMS) | Cost-Optimized Automotive Gateway |
|---|---|
Use Scenario: Real-time facial landmark detection and eye-gaze tracking using front-facing cabin camera. IC Role / Device Role / Timing Role: MIMX9351AVTYMAB acts as the primary vision processing unit, coordinating camera capture via MIPI CSI-2 and running lightweight ML inference on Cortex-A55 while offloading sensor fusion to Cortex-M33. Use Value: Eliminates need for discrete NPU by leveraging optimized Cortex-A55 Neon™ engine for 8-bit integer CNN workloads, reducing BOM cost and thermal load. | Use Scenario: Aggregating CAN-FD messages from body control, infotainment, and ADAS domains into a unified Ethernet backbone. IC Role / Device Role / Timing Role: MIMX9351AVTYMAB serves as the central protocol translator and time-synchronized message router, using dual Ethernet with TSN to guarantee latency-bound communication across vehicle domains. Use Value: Achieves deterministic <100 µs end-to-end latency for safety-critical diagnostics and OTA update orchestration without requiring external TSN switch hardware. |
| General-Purpose In-Vehicle Compute | Smart Cockpit Domain Controller (Entry Tier) |
Use Scenario: Running Android Automotive OS for HVAC control, climate UI, and voice assistant backend services. IC Role / Device Role / Timing Role: MIMX9351AVTYMAB provides single-core application processing with Linux support, driving parallel RGB display and audio via SAI/SPDIF while managing USB OTG for diagnostics. Use Value: Delivers sufficient performance for non-graphically intensive cockpit functions while maintaining AEC-Q100 compliance and lower power consumption than dual-core variants. | Use Scenario: Consolidating instrument cluster rendering, rear-seat entertainment streaming, and wireless phone projection onto a single SoC platform. IC Role / Device Role / Timing Role: MIMX9351AVTYMAB manages LCDIF display output to MIPI DSI and LVDS, decodes video streams via Pixel Pipeline (PXP), and routes audio through three SAI interfaces with glue-less PCM/DSD switching. Use Value: Integrates display composition, image scaling, and color space conversion in hardware - reduces GPU dependency and simplifies BSP development for entry-tier digital cockpits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive applications processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIMX9352AVTXMBC | Dual Cortex-A55 cores, NPU enabled, same package and pinout | Supports higher ML inference throughput and concurrent application workloads | Select when DMS or gateway requires parallel vision + natural language processing or real-time multi-domain orchestration |
| MIMX9331AVTXMAC | Single Cortex-A55 core, no NPU, 3-core sub-family (reduced peripheral count) | Fewer Ethernet MACs, no TSN, reduced uSDHC and audio interfaces | Select for simpler body electronics or telematics modules where dual GbE and TSN are unnecessary |
Compared with MIMX9351AVTYMAB, MIMX9352AVTXMBC adds NPU acceleration and dual A55 cores for scalable ML workloads but increases power and thermal design complexity; MIMX9331AVTXMAC reduces peripheral count and removes TSN, making it suitable only for non-gateway roles where deterministic Ethernet timing is not required.
Availability
MIMX9351AVTYMAB is available at Aetrix Electronics and suitable for automotive gateways, driver monitoring systems, and in-vehicle compute modules requiring stable component supply, AEC-Q100 qualification, and long-term lifecycle support.
Supply support for MIMX9351AVTYMAB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with leadership in automotive processors and edge AI.
The i.MX 93 family, including MIMX9351AVTYMAB, was designed specifically for automotive-grade edge computing - balancing high-performance application processing, real-time responsiveness, functional safety readiness, and robust security for next-generation vehicle architectures.
FAQ
What is the maximum operating temperature range for MIMX9351AVTYMAB?
MIMX9351AVTYMAB is qualified to AEC-Q100 Grade 2 with a junction temperature range of –40°C to +125°C. This specification ensures reliable operation in under-hood and cabin-mounted automotive environments where thermal stress is significant. The device's thermal resistance (RθJA = 21.7°C/W) and flexible power domain partitioning support thermal management in compact enclosures without active cooling.
Does MIMX9351AVTYMAB include a neural processing unit (NPU)?
No, MIMX9351AVTYMAB has the NPU disabled. This configuration is explicitly defined in NXP's ordering information table and confirmed in the i.MX 93 Automotive Data Sheet (IMX93AEC Rev. 8). The absence of NPU reduces silicon area, power consumption, and software stack complexity - making MIMX9351AVTYMAB ideal for cost-sensitive automotive gateways where ML inference is handled externally or omitted entirely.
Which Ethernet features are supported by MIMX9351AVTYMAB?
MIMX9351AVTYMAB integrates two independent Gigabit Ethernet controllers: one supports Energy Efficient Ethernet (EEE), AVB, and IEEE 1588; the second adds Time-Sensitive Networking (TSN) capabilities including IEEE 802.1AS timestamping and 802.1Qbv time-aware shaping. Both controllers operate simultaneously and are fully accessible via Linux drivers in the NXP Yocto BSP, enabling deterministic inter-domain communication in automotive gateways.
What camera interfaces does MIMX9351AVTYMAB support?
MIMX9351AVTYMAB supports one 2-lane MIPI CSI-2 interface compliant with MIPI D-PHY v1.2 and CSI-2 v1.3, capable of up to 1.5 Gbps per lane (1080p30). It also supports parallel RGB/YUV camera input. The Image Sensor Interface (ISI) provides hardware-accelerated image downscaling, color space conversion, and interlaced-to-progressive processing - all essential for driver monitoring system (DMS) preprocessing pipelines.
Is MIMX9351AVTYMAB pin-compatible with other i.MX 93 variants?
Yes, MIMX9351AVTYMAB shares the same 306-ball FCBGA package (14 × 14 mm, 0.65 mm pitch) and identical pinout with MIMX9352AVTXMAC, MIMX9352AVTXMBC, and MIMX9331AVTXMAC. This enables hardware reuse across product tiers - for example, upgrading from MIMX9351AVTYMAB to MIMX9352AVTXMBC requires only firmware and BOM changes, with no PCB redesign needed.
MIMX9351AVTYMAB Specifications
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- Manufacturer:
- NXP Semiconductors
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MIMX9351AVTYMAB FAQ
1.How can I place an order for MIMX9351AVTYMAB through Aetrix?
Please submit a Request for Quotation (RFQ) for MIMX9351AVTYMAB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIMX9351AVTYMAB reliable?
The price and inventory of MIMX9351AVTYMAB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMX9351AVTYMAB is usually 5 days.
3.What payment methods are accepted for MIMX9351AVTYMAB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMX9351AVTYMAB transactions.
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4.How is shipping managed for MIMX9351AVTYMAB?
MIMX9351AVTYMAB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIMX9351AVTYMAB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIMX9351AVTYMAB?
For technical support, including MIMX9351AVTYMAB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMX9351AVTYMAB requirements.
6.How does Aetrix verify that MIMX9351AVTYMAB is sourced from the original manufacturer or authorized distributors?
All MIMX9351AVTYMAB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMX9351AVTYMAB meets industry standards.
7.What is the process for return or replacement of MIMX9351AVTYMAB?
All MIMX9351AVTYMAB units undergo pre-shipment inspection (PSI). If there is an issue with MIMX9351AVTYMAB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIMX9351AVTYMAB part is unused and in its original packaging.
Return procedure for MIMX9351AVTYMAB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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