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NXP Semiconductors MIMX9352XVTXMAB

Part No.:
MIMX9352XVTXMAB
Manufacturer:
NXP Semiconductors
Category:
Microprocessors
Package:
306-LFBGA, FCBGA
Datasheet:
AetrixMIMX9352XVTXMAB.pdf
Description:
MIMX9352XVTXMAB
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,283

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Product details

Overview

MIMX9352XVTXMAB from NXP Semiconductors is a dual-core Arm® Cortex®-A55 (1.7 GHz) + Cortex®-M33 (250 MHz) applications processor with integrated Neural Processing Unit (NPU), dual 1 Gbps Ethernet (one with TSN), MIPI CSI-2 and DSI interfaces, and extended industrial temperature support (–40°C to +125°C). It targets industrial HMI, vision systems, EV charging controllers, and touchless access control where real-time responsiveness, ML inference acceleration, and robust connectivity are required.

For engineers reviewing the MIMX9352XVTXMAB datasheet, MIMX9352XVTXMAB pinout, MIMX9352XVTXMAB application, or MIMX9352XVTXMAB equivalent, key selection considerations include its 14 × 14 mm FCBGA306 package, LPDDR4X support with inline ECC, disabled NPU configuration, dual Gigabit Ethernet with TSN capability, and extended industrial qualification for harsh environments.

Technical Context

The MIMX9352XVTXMAB implements a heterogeneous compute architecture: two Cortex-A55 cores handle high-throughput Linux-based application workloads, while the Cortex-M33 core manages real-time tasks, low-power monitoring, and secure boot coordination. Its memory subsystem includes 256 KB cluster L3 cache with ECC, 640 KB on-chip RAM, and a 16-bit LPDDR4X interface supporting up to 2 GB with inline ECC.

Connectivity is built around dual Gigabit Ethernet controllers (one IEEE 802.1AS/TSN-capable), two FlexCAN-FD modules, two I3C interfaces, eight LPUARTs, and three uSDHC interfaces supporting eMMC 5.1, SDXC, and SDIO. The imaging pipeline supports 2-lane MIPI CSI-2 at up to 1080p30 and 4-lane MIPI DSI at 1080p60, with Pixel Pipeline (PXP) for hardware-accelerated image composition and rotation.

Key Specifications

Parameter Value and Actual Design Meaning
CPU Cores Dual Arm® Cortex®-A55 @ up to 1.7 GHz + single Cortex®-M33 @ up to 250 MHz - enables concurrent Linux OS execution and deterministic real-time control.
NPU Status Disabled - reduces power consumption and simplifies thermal design for non-ML-intensive applications.
Memory Interface 16-bit LPDDR4X/LPDDR4 with inline ECC - supports up to 2 GB DRAM with error correction for industrial reliability.
Ethernet Dual 1 Gbps controllers: one with Time-Sensitive Networking (TSN), IEEE 1588, AVB, and EEE - enables deterministic networking in gateways and automation nodes.
Camera & Display 2-lane MIPI CSI-2 (1080p30) + 4-lane MIPI DSI (1080p60) - delivers full HD camera input and display output without external bridge ICs.
Package FCBGA306, 14 × 14 mm, 0.65 mm pitch - provides high I/O count and thermal performance suitable for extended industrial operation.
Temperature Grade Extended Industrial: –40°C to +125°C junction - qualified for deployment in EV charging stations, energy grid equipment, and factory-floor HMIs.

Pinout & Package

Package: 306-ball Fine-Pitch Chip Scale Ball Grid Array (FCBGA), 14 mm × 14 mm, 0.65 mm ball pitch, 1.15 mm height (JEDEC MO-275AC). Thermal pad on underside requires solder paste stencil opening per NXP AN12222.

Pin/Terminal Circuit Role Design Meaning
VDD_SOC Core supply voltage 1.0 V ± 3% nominal; powers Cortex-A55/M33 cores and L1/L2 caches - requires low-noise regulation and local decoupling.
XTALI_24M / XTALO_24M Primary system clock input 24 MHz crystal oscillator reference - mandatory for USB, Ethernet, and system timing; cannot be replaced by external oscillator.
RTC_XTALI / RTC_XTALO Real-time clock oscillator 32.768 kHz crystal interface - powers battery-backed security module (BBSM) and secure RTC; board capacitance must compensate for parasitics.
MIPI_CSI1_CLK_P/N MIPI CSI-2 clock differential pair High-speed clock lane for 2-lane camera interface - supports 80 Mbps–1.5 Gbps/lane; requires controlled impedance (100 Ω differential).
MIPI_DSI1_D0_P/N to D3_P/N MIPI DSI data lanes Four high-speed data lanes for display interface - enables 1080p60 @ 24-bit RGB with 140 Mpixel/s active pixel rate.
ENET1_MDC / MDIO IEEE 802.3 management interface Serial bus for PHY register access - used for configuration and status monitoring of first Gigabit Ethernet controller.
USB1_D_P / USB1_D_N USB 2.0 differential data pair Full-speed/low-speed signaling interface - supports host/peripheral mode; requires 90 Ω differential impedance and ESD protection.

Key Features

Feature Design Value
Arm TrustZone-A & TrustZone-M Hardware-enforced isolation between secure and non-secure worlds for both A55 and M33 domains - enables secure boot, encrypted firmware updates, and confidential computing.
EdgeLock® Secure Enclave Dedicated tamper-resistant security subsystem with cryptographic accelerators, secure key storage, and runtime attestation - meets PSA Certified Level 3 requirements.
Unified Debug & Trace CoreSight™ infrastructure with ETF (4 KB trace buffer) and Cross Triggering Interface (CTI) - allows synchronized debug across A55 and M33 cores during development.
Flexible Power Domains Independent power gating for CPU clusters, GPU, NPU, and peripherals - enables fine-grained power management for extended battery life in portable industrial devices.
On-Chip Memory Protection MPU on Cortex-M33 and MMU on Cortex-A55 with parity/ECC on L1/L2 caches and TLBs - prevents memory corruption in safety-critical control loops.

Applications

Industrial HMI EV Charging Controller

Use Scenario: Touch-enabled panel in factory automation or building management systems operating continuously in ambient temperatures up to +70°C.

IC Role / Device Role / Timing Role: Main applications processor executing Linux-based GUI stack, managing CAN-FD communication with PLCs, and driving LVDS/parallel displays.

Use Value: Dual Cortex-A55 cores deliver smooth 1080p UI rendering while Cortex-M33 handles real-time CAN messaging and watchdog supervision - eliminating need for companion microcontroller.

Use Scenario: Control unit in AC/DC EV charging station requiring secure OTA updates, metering integration, and TSN-synchronized communication with grid infrastructure.

IC Role / Device Role / Timing Role: Central processing unit running real-time charging protocol stack (OCPP), managing dual Ethernet interfaces (one TSN for grid timing sync), and enforcing secure boot via EdgeLock enclave.

Use Value: Extended industrial temperature rating (–40°C to +125°C) ensures reliable operation inside outdoor charging enclosures; TSN support enables precise time synchronization with utility substations.

Industrial Vision System Touchless Access Control

Use Scenario: Embedded vision node performing barcode scanning, OCR, or anomaly detection in warehouse logistics or printing equipment.

IC Role / Device Role / Timing Role: Image acquisition and preprocessing engine using MIPI CSI-2 input, PXP hardware scaler/rotator, and optional NPU offload (disabled in this variant for deterministic latency).

Use Value: 200 MPixel/s image sensor interface bandwidth and dedicated Pixel Pipeline enable real-time 1080p30 frame processing without CPU load - reducing end-to-end latency below 50 ms.

Use Scenario: Contactless entry terminal using facial recognition or gesture sensing in healthcare or cleanroom facilities.

IC Role / Device Role / Timing Role: Secure edge AI processor handling biometric inference locally, interfacing with IR/ToF sensors via MIPI CSI-2, and enforcing access policy via secure enclave.

Use Value: On-chip OCRAM (640 KB) with ECC and EdgeLock secure enclave allow sensitive biometric templates to remain isolated from main OS - meeting GDPR and HIPAA data residency requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar applications processor applications.

Alternative Part Technical Difference Application Difference Selection Advice
MIMX9352XVVXMAB Same dual A55 + M33 core configuration and feature set, but in 11 × 11 mm FCBGA306 (0.5 mm pitch) - smaller footprint, higher thermal resistance (RθJA = 22.5°C/W vs. 21.7°C/W). Preferred for space-constrained designs where board area is critical and thermal headroom remains sufficient. Select MIMX9352XVVXMAB when PCB real estate is limited and peak power dissipation stays below 8 W; choose MIMX9352XVTXMAB for higher thermal margin in sealed enclosures.
MIMX9352XVTXMAC Identical package and core specs, but with NPU enabled - adds 1 TOPS (INT8) neural inference capability at ~1.5 W additional dynamic power. Suitable for edge AI applications requiring on-device model inference (e.g., defect classification, occupancy detection). Choose MIMX9352XVTXMAC only if ML workload justifies added power and software complexity; MIMX9352XVTXMAB offers lower BOM cost and simpler validation for non-AI use cases.

Compared with MIMX9352XVVXMAB, MIMX9352XVTXMAB provides better thermal performance in thermally constrained environments; compared with MIMX9352XVTXMAC, it eliminates NPU-related power, security, and software overhead for deterministic real-time applications.

Availability

MIMX9352XVTXMAB is available at Aetrix Electronics and suitable for industrial HMI, EV charging infrastructure, and energy grid equipment requiring stable component supply across extended temperature ranges and multi-year production cycles.

Supply support for MIMX9352XVTXMAB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, IoT, and mobile applications.

The i.MX 93 family - including MIMX9352XVTXMAB - was designed specifically for power-optimized, secure edge intelligence in extended industrial environments, integrating real-time control, ML acceleration, and deterministic networking into a single SoC.

FAQ

What is the maximum operating temperature for the MIMX9352XVTXMAB?

The MIMX9352XVTXMAB is qualified for extended industrial operation with a junction temperature range of –40°C to +125°C. This specification is validated per JEDEC JESD22-A108 and applies to continuous operation under specified power and cooling conditions outlined in the IMX93XEC datasheet Section 4.1.3.

Does the MIMX9352XVTXMAB support LPDDR4X memory with inline ECC?

Yes, the MIMX9352XVTXMAB supports 16-bit LPDDR4X and LPDDR4 memory with inline ECC enabled. The memory controller implements ECC encoding/decoding on-the-fly for all DRAM transactions, protecting against single-bit errors and detecting double-bit errors - critical for industrial uptime and data integrity.

Is the NPU enabled on the MIMX9352XVTXMAB?

No, the NPU is disabled on the MIMX9352XVTXMAB. As confirmed in Table 2 of the IMX93XEC datasheet, this part number is marked "NPU Disabled" - meaning the neural processing unit is powered down and not accessible to software, reducing static power and simplifying thermal design.

What camera interfaces does the MIMX9352XVTXMAB support?

The MIMX9352XVTXMAB supports a 2-lane MIPI CSI-2 interface compliant with v1.3 (up to 1.5 Gbps per lane) and parallel camera input. It processes image data at up to 200 MPixel/s and supports programmable resolutions up to 2K, with hardware features including color space conversion and interlaced-to-progressive conversion.

Which Ethernet features are supported by the MIMX9352XVTXMAB's dual controllers?

The MIMX9352XVTXMAB integrates two Gigabit Ethernet controllers: one supports Energy Efficient Ethernet (EEE), Audio Video Bridging (AVB), and IEEE 1588; the second adds Time-Sensitive Networking (TSN) capabilities including IEEE 802.1AS (gPTP), 802.1Qbv (time-aware shaper), and 802.1Qci (per-stream filtering and policing).

MIMX9352XVTXMAB Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Package/Case:
306-LFBGA, FCBGA
Series:
i.MX 93
Packaging:
Bulk
Product Status:
Active
Core Processor:
ARM® Cortex®-A55, ARM® Cortex®-M33
Number of Cores/Bus Width:
2, 1 Core, 64-Bit
Speed:
250MHz, 1.7GHz
Co-Processors/DSP:
Multimedia; NEON™ MPE
RAM Controllers:
LPDDR4
Graphics Acceleration:
No
Display & Interface Controllers:
LCD, LVDS, MIPI-CSI, MIPI-DSI
Ethernet:
GBE (2)
SATA:
-
USB:
USB 2.0 (2)
Voltage - I/O:
1.8V
Operating Temperature:
-40°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Security Features:
Boot Security, Cryptography, eFuse, Random Number Generator, Secure RTC, Tamper Detection
Mounting Type:
Surface Mount
Supplier Device Package:
306-FCBGA (14x14)
Additional Interfaces:
CANbus, DMA, GPIO, I2C, I2S, MMC/SD/SDIO, PCIe, QSPI, SAI, SPDIF, SPI, UART

MIMX9352XVTXMAB FAQ

1.How can I place an order for MIMX9352XVTXMAB through Aetrix?

Please submit a Request for Quotation (RFQ) for MIMX9352XVTXMAB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MIMX9352XVTXMAB reliable?

The price and inventory of MIMX9352XVTXMAB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMX9352XVTXMAB is usually 5 days.

3.What payment methods are accepted for MIMX9352XVTXMAB?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMX9352XVTXMAB transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MIMX9352XVTXMAB?

MIMX9352XVTXMAB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MIMX9352XVTXMAB order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MIMX9352XVTXMAB?

For technical support, including MIMX9352XVTXMAB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMX9352XVTXMAB requirements.

6.How does Aetrix verify that MIMX9352XVTXMAB is sourced from the original manufacturer or authorized distributors?

All MIMX9352XVTXMAB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMX9352XVTXMAB meets industry standards.

7.What is the process for return or replacement of MIMX9352XVTXMAB?

All MIMX9352XVTXMAB units undergo pre-shipment inspection (PSI). If there is an issue with MIMX9352XVTXMAB, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MIMX9352XVTXMAB part is unused and in its original packaging.

Return procedure for MIMX9352XVTXMAB:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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