NXP Semiconductors MIMXRT105SDVL6B

Overview

MIMXRT105SDVL6B from NXP Semiconductors is a 600 MHz Arm Cortex-M7-based crossover processor with MPU/FPU, 512 KB on-chip RAM (configurable as TCM/OCRAM), integrated DCDC/LDO power management, and hardware-accelerated local voice recognition (phoneme-based). It supports LCD/CSI/PXP multimedia subsystems and targets embedded HMI, motor control, and smart appliance applications requiring real-time responsiveness and audio-aware edge processing.

For engineers reviewing the MIMXRT105SDVL6B datasheet, MIMXRT105SDVL6B pinout, MIMXRT105SDVL6B application, or MIMXRT105SDVL6B equivalent, key selection considerations include its 10 × 10 mm 196-pin MAPBGA package, 0–95 °C junction temperature rating, boot ROM size (92 KB), FlexSPI dual-channel QuadSPI interface, and dedicated local voice control firmware support per nxp.com/mcu-local2.

Technical Context

The MIMXRT105SDVL6B implements a single Arm Cortex-M7 core with 32 KB I-cache, 32 KB D-cache, VFPv5 FPU, and MPU supporting up to 16 protection regions. Its memory subsystem includes 92 KB boot ROM, 512 KB flexible on-chip RAM, and SEMC for SDRAM/NAND/NOR/PSRAM interfacing.

It integrates security accelerators (HAB, DCP with AES-128/SHA-256, BEE, TRNG, SNVS), dual USB 2.0 OTG with PHY, two uSDHC controllers (eMMC 4.5/SD 3.0), Ethernet with IEEE 1588, four FlexCAN modules, and three SAI interfaces for I2S/TDM/AC97 audio - all while maintaining full compatibility with the i.MX RT1050 family's clock, reset, and power architecture.

Key Specifications

Pinout & Package

196-pin MAPBGA, 10 × 10 mm, 0.65 mm pitch - thermally and electrically optimized for high-speed signal integrity and thermal dissipation in space-constrained designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar crossover processor applications.

Compared with MIMXRT1052DVL6B, the MIMXRT105SDVL6B trades no hardware difference but adds certified phoneme-based voice firmware - enabling faster time-to-market for voice UIs without SDK integration effort. Against MIMXRT1051DVL6B, it retains identical voice capability while adding LCD/CSI/PXP, making it optimal for voice + visual HMI convergence.

Availability

MIMXRT105SDVL6B is available at Aetrix Electronics and suitable for industrial HMI, motor control, and smart home appliance applications requiring stable component supply, long-term lifecycle assurance, and qualified sourcing for production ramp.

Supply support for MIMXRT105SDVL6B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure, connected, and intelligent edge solutions for automotive, industrial, IoT, and consumer markets.

The MIMXRT105SDVL6B belongs to the i.MX RT1050 crossover processor family - designed to bridge the performance gap between microcontrollers and application processors for real-time, feature-rich embedded systems with integrated AI/voice and multimedia capabilities.

FAQ

What distinguishes MIMXRT105SDVL6B from other i.MX RT1050 variants?

The MIMXRT105SDVL6B is uniquely configured with turnkey local voice (phoneme-based) recognition firmware, as documented in NXP's IMXRT1050CEC datasheet Table 1. Unlike MIMXRT1051DVL6B or MIMXRT1052DVL6B, it retains full LCD/CSI/PXP multimedia support while embedding voice processing - making it the only i.MX RT1050 variant with factory-provisioned phoneme engine support.

Does MIMXRT105SDVL6B support external SDRAM, and what are the timing constraints?

Yes, MIMXRT105SDVL6B supports 8/16-bit SDRAM up to SDRAM-166 via its SEMC interface, as specified in Section 4.5 of the IMXRT1050CEC datasheet. It requires precise address/data bus routing and controlled impedance traces; setup/hold times are validated for 166 MHz operation under 0–95 °C junction conditions with VDD_SOC = 1.2 V.

Is the boot ROM size of MIMXRT105SDVL6B different from other RT1050 parts?

Yes - MIMXRT105SDVL6B has 92 KB boot ROM, whereas most RT1050 variants (e.g., MIMXRT1051DVL6B, MIMXRT1052DVL6B) specify 96 KB. This reduction accommodates voice firmware partitioning within the ROM layout, confirmed in Table 1 of the IMXRT1050CEC datasheet Rev. 2.

Can MIMXRT105SDVL6B operate without external power regulators?

Yes - MIMXRT105SDVL6B integrates a programmable DCDC converter and multiple LDOs, enabling direct connection to a 3.3 V input supply. The internal DCDC generates VDD_SOC (1.0–1.3 V) and VDDA (3.3 V), eliminating need for discrete buck regulators in most designs, as detailed in Section 4.2 of the IMXRT1050CEC datasheet.

What debug interfaces does MIMXRT105SDVL6B support, and are they accessible in secure mode?

MIMXRT105SDVL6B supports both SWD and 5-pin JTAG debug interfaces, selectable via eFuse. In secure mode (HAB enabled), debug access is restricted by the Secure JTAG Controller (SJC); full CoreSight trace via TPIU remains available only when security fuses permit, as defined in Section 1.1 and Chapter 6 of the IMXRT1050CEC datasheet.