NXP Semiconductors MIMXRT1064CVJ5B
- Part No.:
- MIMXRT1064CVJ5B
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 196-LFBGA
- Datasheet:
-
MIMXRT1064CVJ5B.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 196LFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:190
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MIMXRT1064CVJ5B from NXP Semiconductors is an Arm Cortex-M7-based crossover processor operating at 528 MHz, integrating 4 MB on-chip Flash, 1 MB on-chip RAM (512 KB configurable as TCM), dual USB 2.0 HS OTG with PHY, two 10/100M Ethernet controllers with IEEE 1588 support, and a full suite of industrial I/O including FlexCAN FD, Quad SPI, SAI, and LCDIF - deployed in HMI, motor control, and smart appliance edge nodes.
For engineers reviewing the MIMXRT1064CVJ5B datasheet, MIMXRT1064CVJ5B pinout, MIMXRT1064CVJ5B application, or MIMXRT1064CVJ5B equivalent, key selection criteria include its 12×12 mm 196-pin MAPBGA package, -40°C to +105°C industrial temperature rating, integrated DCDC/LDO power management, and hardware-accelerated security features (HAB, DCP, BEE, TRNG, SNVS).
Technical Context
The MIMXRT1064CVJ5B implements a single Arm Cortex-M7 core with 32 KB L1 instruction cache, 32 KB L1 data cache, and VFPv5 FPU, enabling deterministic real-time execution at 528 MHz. Its memory subsystem includes boot ROM (128 KB), 4 MB Flash, and 1 MB SRAM split into 512 KB OCRAM and 512 KB flexibly allocatable TCM/OCRAM.
It integrates SEMC for SDRAM/NAND/NOR/PSRAM, dual uSDHC supporting eMMC 4.5 (200 MB/s) and SD 3.0 (100 MB/s), and four FlexPWM modules with 16-bit resolution and fault protection - all coordinated via eDMA (32-channel) and XBAR/AOI interconnect, with hardware debug via CoreSight, SWD, and JTAG.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M7 @ 528 MHz - delivers high-throughput deterministic real-time processing for closed-loop motor control and GUI rendering. |
| On-chip Memory | 4 MB Flash + 1 MB SRAM (512 KB OCRAM + 512 KB TCM/OCRAM) - enables XIP from Flash and low-latency TCM execution for time-critical ISR handling. |
| Package | 196-pin MAPBGA, 12 × 12 mm, 0.8 mm pitch - supports high I/O density while maintaining thermal performance in industrial PCB layouts. |
| Temperature Range | -40°C to +105°C junction - qualified for uncontrolled ambient environments in factory automation and outdoor HMI enclosures. |
| Security Acceleration | HAB, DCP (AES-128/SHA-256), BEE (on-the-fly QSPI decryption), TRNG, SNVS - enables secure boot, encrypted firmware updates, and tamper-resistant RTC operation. |
| Connectivity | Dual 10/100M Ethernet w/ IEEE 1588, FlexCAN FD (2x), USB OTG HS (2x), uSDHC (2x), SAI (3x), SPDIF - supports synchronized multi-protocol industrial networking and audio/video edge processing. |
| Analog Peripherals | 2× ADC (16-channel, 1 MSPS total), 4× ACMP, TSC - provides sensor signal acquisition and resistive touch interface without external components. |
Pinout & Package
196-pin MAPBGA, 12 × 12 mm, 0.8 mm pitch - thermally optimized for industrial convection cooling and compatible with standard reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_SOC | Core Power Supply | 1.0–1.3 V supply for Cortex-M7 core and internal logic; regulated by on-chip DCDC. |
| VDDA | Analog Reference | 3.3 V analog supply for ADC, ACMP, and TSC - requires dedicated filtering per datasheet layout guidelines. |
| BOOT_MODE[1:0] | Boot Configuration | Strapped inputs determining boot source (FlexSPI, SD, UART); must be stable during reset assertion. |
| ENET1_RX_DATA[3:0] | Ethernet Receive Data | 4-bit RMII receive path for first Ethernet controller - routed with matched length and controlled impedance. |
| FLEXCAN1_TX | CAN Transmitter Output | Differential CAN bus driver output - requires external CAN transceiver and termination per ISO 11898-2. |
| USB_OTG1_DP/DM | USB 2.0 Differential Pair | High-speed USB OTG physical interface - routed as 90 Ω differential pair with ESD protection. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated DCDC + LDO | Reduces external power components by >50% and eliminates complex power sequencing - simplifies BOM and layout for cost-sensitive industrial designs. |
| Hardware Crypto Engines | DCP and BEE offload AES/SHA operations from CPU, enabling concurrent encryption and real-time control - critical for OTA firmware integrity verification. |
| FlexPWM with Fault Protection | Four independent PWM modules, each with up to 8 channels and hardware fault shutdown - supports three-phase motor drives with cycle-by-cycle overcurrent response. |
| PXP Graphics Accelerator | Pixel Processing Pipeline handles alpha blending, rotation, and color-space conversion at 1 pixel/clock - enables smooth 800×480 GUI rendering without CPU load. |
| Quad Timer Quadrature Decoding | Four dedicated Qtimer modules with integrated quadrature decoder - directly interfaces rotary encoders and resolvers for position feedback in servo systems. |
Applications
| Industrial HMI | Motor Control Drive |
|---|---|
Use Scenario: Touch-enabled operator panel with real-time status display, alarm logging, and parameter configuration in factory machinery. IC Role / Device Role / Timing Role: Main application processor executing FreeRTOS-based UI stack, driving RGB LCD via LCDIF, sampling touch via TSC, and communicating via Ethernet/CAN. Use Value: Integrated 4 MB Flash stores firmware and graphics assets; PXP accelerates GUI composition; dual Ethernet enables redundant PLC communication links. | Use Scenario: Closed-loop field-oriented control (FOC) of BLDC motors in HVAC compressors or robotic joints. IC Role / Device Role / Timing Role: Real-time controller managing PWM generation, current sensing (ADC), encoder feedback (Qtimer), and safety monitoring (WDOG). Use Value: 528 MHz Cortex-M7 executes FOC loop in <1 µs; FlexPWM fault pins trigger immediate gate shutdown; on-chip DCDC powers gate drivers directly. |
| Smart Home Appliance | Edge Audio Gateway |
Use Scenario: Voice-controlled washing machine with local speech recognition, display, and cloud connectivity. IC Role / Device Role / Timing Role: Application host running lightweight ML inference, interfacing microphone array via SAI, driving OLED via SPI, and connecting to Wi-Fi module via UART/USB. Use Value: Dual USB OTG supports simultaneous debug and peripheral attachment; TRNG seeds secure voice model authentication; SNVS RTC maintains accurate scheduling across power cycles. | Use Scenario: Multi-room audio synchronizer receiving streaming audio over Ethernet and distributing to local speakers via I2S/SPDIF. IC Role / Device Role / Timing Role: Audio routing hub with IEEE 1588 time synchronization, sample rate conversion (SAI), and jitter-free SPDIF output. Use Value: Three SAI modules handle independent input/output streams; hardware timestamping enables sub-microsecond inter-device sync; MQS provides auxiliary mono audio via GPIO. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar crossover processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIMXRT1064CVL5B | Same core, memory, and peripherals but in 10×10 mm, 0.65 mm pitch 196-pin MAPBGA - smaller footprint, tighter routing constraints. | Better suited for space-constrained portable HMIs; thermal dissipation margin reduced vs. CVJ5B. | Select CVL5B when board area is critical and thermal headroom allows. |
| MIMXRT1052CVL5B | Same package but lacks 4 MB Flash (only 0 MB on-die), no DCDC regulator, and reduced peripheral set (no second Ethernet, no SPDIF, no PXP). | Targeted at cost-optimized motor control or sensor gateway where external Flash and discrete power are acceptable. | Choose CVL5B only if Flash size, integrated power, and multimedia features are not required. |
Compared with MIMXRT1064CVJ5B, the CVL5B offers identical functionality in a smaller package but with lower thermal mass, while the RT1052CVL5B sacrifices Flash, power integration, and multimedia acceleration to reduce cost - making the CVJ5B optimal for thermally demanding, feature-complete industrial edge nodes.
Availability
MIMXRT1064CVJ5B is available at Aetrix Electronics and suitable for industrial HMI, motor control, and smart appliance applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized NXP channels.
Supply support for MIMXRT1064CVJ5B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Arm-based microcontrollers and crossover processors.
The i.MX RT series targets high-performance real-time edge applications, bridging the gap between MCUs and application processors - designed specifically for deterministic control, rich human interfaces, and secure connectivity in industrial and consumer edge devices.
FAQ
What is the maximum operating frequency of the MIMXRT1064CVJ5B?
The MIMXRT1064CVJ5B operates at a maximum core frequency of 528 MHz, as specified in the i.MX RT1064 datasheet (Rev. 3, 03/2021). This frequency is guaranteed across the full industrial temperature range (-40°C to +105°C) and supported by the on-chip PLL and voltage regulation. The MIMXRT1064CVJ5B does not support the 600 MHz variant - that option is reserved for other part numbers in the family.
Does the MIMXRT1064CVJ5B include on-chip Flash memory?
Yes, the MIMXRT1064CVJ5B integrates 4 MB of on-chip Flash memory, enabling execute-in-place (XIP) operation and eliminating the need for external non-volatile storage in many applications. This Flash is accessible via the FlexSPI interface and supports hardware encryption through the Bus Encryption Engine (BEE), which is fully functional in the MIMXRT1064CVJ5B.
What package type and pin count does the MIMXRT1064CVJ5B use?
The MIMXRT1064CVJ5B uses a 196-pin MAPBGA package measuring 12 mm × 12 mm with 0.8 mm ball pitch. This package is explicitly listed in Table 1 of the i.MX RT1064 datasheet for the CVJ5A/CVJ5B variants and is distinct from the 10×10 mm variant used by CVL5A/CVL5B. The pinout is documented in Section 7.2 of the datasheet.
Which security features are implemented in hardware on the MIMXRT1064CVJ5B?
The MIMXRT1064CVJ5B includes hardware-accelerated security features: High Assurance Boot (HAB) for authenticated boot, Data Co-Processor (DCP) supporting AES-128 and SHA-256, Bus Encryption Engine (BEE) for on-the-fly QSPI Flash decryption, True Random Number Generator (TRNG), and Secure Non-Volatile Storage (SNVS) with secure RTC. All are active and verified in the CVJ5B variant per the datasheet feature table.
Can the MIMXRT1064CVJ5B support dual Ethernet with IEEE 1588 precision time protocol?
Yes, the MIMXRT1064CVJ5B integrates two independent 10/100M Ethernet controllers (ENET1 and ENET2), both with full hardware support for IEEE 1588-2008 Precision Time Protocol, including timestamping of frames at the MAC layer. This capability is confirmed in the "Features" section of Table 1 and the Ethernet chapter of the reference manual for the MIMXRT1064CVJ5B.
MIMXRT1064CVJ5B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 196-LFBGA
- Series:
- RT1064
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 528MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT
- Number of I/O:
- 127
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1M x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 3.6V
- Data Converters:
- A/D 20x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MIMXRT1064CVJ5B FAQ
1.How can I place an order for MIMXRT1064CVJ5B through Aetrix?
Please submit a Request for Quotation (RFQ) for MIMXRT1064CVJ5B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIMXRT1064CVJ5B reliable?
The price and inventory of MIMXRT1064CVJ5B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMXRT1064CVJ5B is usually 5 days.
3.What payment methods are accepted for MIMXRT1064CVJ5B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMXRT1064CVJ5B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIMXRT1064CVJ5B?
MIMXRT1064CVJ5B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIMXRT1064CVJ5B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIMXRT1064CVJ5B?
For technical support, including MIMXRT1064CVJ5B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMXRT1064CVJ5B requirements.
6.How does Aetrix verify that MIMXRT1064CVJ5B is sourced from the original manufacturer or authorized distributors?
All MIMXRT1064CVJ5B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMXRT1064CVJ5B meets industry standards.
7.What is the process for return or replacement of MIMXRT1064CVJ5B?
All MIMXRT1064CVJ5B units undergo pre-shipment inspection (PSI). If there is an issue with MIMXRT1064CVJ5B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIMXRT1064CVJ5B part is unused and in its original packaging.
Return procedure for MIMXRT1064CVJ5B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MIMXRT1064CVJ5B Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

