NXP Semiconductors MIMXRT1172DVMAA
- Part No.:
- MIMXRT1172DVMAA
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 289-LFBGA
- Datasheet:
-
MIMXRT1172DVMAA.pdf
- Description:
- IC MCU 32BIT EXT MEM 289MAPBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MIMXRT1172DVMAA from NXP is a dual-core Arm® Cortex®-M7 (1 GHz) + Cortex®-M4 (400 MHz) crossover MCU with 2 MB on-chip SRAM (512 KB M7 TCM + 256 KB M4 TCM + 1 MB RAM), hardware AES-128/256 encryption, and support for HyperFlash™/HyperRAM™, QSPI, SDRAM, and eMMC/SD interfaces - deployed in industrial HMI and real-time motor control systems.
For engineers reviewing the MIMXRT1172DVMAA datasheet, MIMXRT1172DVMAA pinout, MIMXRT1172DVMAA application, or MIMXRT1172DVMAA equivalent, key selection criteria include dual-core clock speeds, ECC-protected SRAM partitioning, Ethernet AVB/TSN readiness, MIPI DSI/CSI interface availability, and EdgeLock™ Assurance security certification.
Technical Context
The MIMXRT1172DVMAA implements asymmetric dual-core execution: the Cortex-M7 core handles high-throughput tasks (GUI rendering, ML inference) at up to 1 GHz with 32 KB I-cache/D-cache and FPU, while the Cortex-M4 core manages deterministic real-time control (motor commutation, sensor fusion) at 400 MHz with 256 KB TCM and parity-checked caches.
It integrates a memory crypto engine enabling on-the-fly AES decryption for execute-in-place from Quad/Octal SPI or HyperFlash™, alongside hardware Elliptic Curve Cryptography (ECC), secure boot via HAB, and tamper detection - all aligned with EdgeLock™ Assurance program requirements for edge-deployed industrial devices.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: Arm Cortex-M7 @ 1 GHz (commercial) + Cortex-M4 @ 400 MHz |
| Total SRAM | 2 MB configurable: 512 KB M7 TCM + 256 KB M4 TCM + 1 MB general RAM, all with ECC support |
| Security Engine | Hardware AES-128/256, RSA-4096, SHA-1/SHA-2, TRNG, ECC accelerator, HAB v4.2 |
| Memory Interfaces | Quad/Octal SPI, HyperFlash™/HyperRAM™, SDRAM/LPSDRAM, NAND/NOR Flash, eMMC/SD, PSRAM |
| Connectivity | 1× 1 Gbps Ethernet w/ AVB, 1× 10/100 Mbps Ethernet w/ IEEE 1588, 3× CAN-FD, 12× UART, 6× I²C, 6× SPI |
| Graphics & Imaging | OpenVG™ 1.1 accelerator @ 500 MHz, PXP 2D graphics engine, MIPI DSI/CSI, parallel LCD/CSI interfaces |
| Package | 289-pin MAPBGA (14 mm × 14 mm, 0.8 mm pitch) |
Pinout & Package
289-pin Fine-Pitch Ball Grid Array (MAPBGA), 14 mm × 14 mm body, 0.8 mm ball pitch, RoHS-compliant, industrial temperature grade (–40 °C to +105 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_SOC | Main SoC power supply | 1.0 V ±5 % supply for Cortex-M7/M4 cores and internal logic |
| VDDA | Analog domain supply | 3.3 V analog supply for ADC, DAC, comparators, and reference circuits |
| BOOT_MODE[1:0] | Boot configuration pins | Resistive pull-up/down setting determines boot source (QSPI, SD, USB, etc.) at reset |
| ENET_RXD0–3 / TXD0–3 | Gigabit Ethernet PHY interface | Differential RMII/RGMII signals supporting 10/100/1000 Mbps with AVB and IEEE 1588 timestamping |
| MIPI_DSI_CLK / D0P/D0N–D3P/D3N | MIPI DSI display interface | High-speed differential lanes for driving embedded display panels up to 1080p@60 Hz |
| CSI_DATA00–19 / CSI_HSYNC / VSYNC | Parallel camera sensor interface | 20-bit parallel input supporting CMOS image sensors up to 16 MP resolution at 30 fps |
Key Features
| Feature | Design Value |
|---|---|
| Asymmetric dual-core architecture | Enables concurrent high-performance application processing (M7) and hard real-time control (M4) without OS coherency overhead |
| On-chip memory crypto engine | Permits secure XIP execution directly from encrypted HyperFlash™ or QSPI without external decryption IC or performance penalty |
| EdgeLock™ Assurance certified | Meets NXP's hardened security framework for secure boot, key lifecycle management, and runtime attestation in industrial edge deployments |
| MIPI DSI + CSI + OpenVG™ 1.1 | Supports full-stack GUI pipeline: camera input → PXP preprocessing → OpenVG™ vector rendering → MIPI DSI output to display |
| Ethernet with AVB & IEEE 1588 | Enables time-synchronized multi-node communication for motion control networks and synchronized audio/video streaming |
Applications
| Industrial HMI Systems | Real-Time Motor Control |
|---|---|
Use Scenario: Touch-enabled operator panels in PLC-controlled factory equipment requiring responsive GUI, local data logging, and fieldbus connectivity. IC Role / Device Role / Timing Role: Primary application processor running FreeRTOS/Linux Lite with deterministic M4 core handling PWM timing and encoder feedback loops. Use Value: 2 MB ECC SRAM enables dual OS partitioning; MIPI DSI drives 7″–10″ displays; 3× CAN-FD supports servo drive daisy-chaining. | Use Scenario: Closed-loop servo drives for robotics and CNC machines needing sub-μs jitter, sensor fusion, and safety monitoring. IC Role / Device Role / Timing Role: Real-time controller executing FOC algorithms on M4 core while M7 runs EtherCAT master stack and web-based diagnostics. Use Value: 12 ns interrupt latency and 4× FlexPWM modules enable precise gate timing; hardware AES secures firmware updates over CAN-FD. |
| Edge AI Vision Devices | Voice-Enabled IoT Gateways |
Use Scenario: Smart cameras performing on-device person detection and anomaly classification using TensorFlow Lite Micro models. IC Role / Device Role / Timing Role: M7 core executes quantized neural network inference; M4 core manages MIPI CSI frame capture, PXP pre-processing, and DMA transfers. Use Value: 512 KB M7 TCM holds model weights; OpenVG™ accelerates UI overlays; hardware ECC prevents bit-flip corruption of inference buffers. | Use Scenario: Voice-controlled home automation hubs with far-field mic arrays, local wake-word detection, and cloud offload. IC Role / Device Role / Timing Role: M4 core performs low-power audio preprocessing (ASRC, FIR filtering); M7 core runs ASR engine and MQTT/TLS stack. Use Value: 8-channel DMIC interface eliminates external audio codec; secure boot ensures trusted voice pipeline; AES engine encrypts voice payloads before transmission. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core crossover MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIMXRT1175DVMAA | Includes MIPI DSI/CSI, OpenVG™, PXP, and tamper protection; same package and pinout | Required for designs needing integrated display/camera pipelines and enhanced physical security | Select when MIPI interfaces and tamper detection are mandatory; otherwise MIMXRT1172DVMAA reduces BOM cost |
| MIMXRT1176DVMAA | Adds TSN-capable 1 Gbps Ethernet, automotive qualification (–40 °C to +125 °C), and extended security features | Targeted at automotive ADAS domain controllers and industrial time-critical networking nodes | Choose only if IEEE 802.1AS/TSN synchronization or AEC-Q100 Grade 2 compliance is required |
Compared with MIMXRT1175DVMAA and MIMXRT1176DVMAA, the MIMXRT1172DVMAA delivers identical dual-core performance and memory architecture but omits MIPI interfaces and TSN - making it optimal for cost-sensitive industrial HMIs and motor drives where those features are unused.
Availability
MIMXRT1172DVMAA is available at Aetrix Electronics and suitable for industrial HMI systems, real-time motor control platforms, and edge AI vision devices requiring stable component supply across multi-year production cycles.
Supply support for MIMXRT1172DVMAA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The i.MX RT1170 family - including MIMXRT1172DVMAA - was designed to bridge the gap between application processors and microcontrollers, delivering GHz-class compute with real-time determinism and EdgeLock™-certified security for intelligent edge endpoints.
FAQ
What is the operating temperature range for MIMXRT1172DVMAA?
The MIMXRT1172DVMAA is qualified for industrial operation from –40 °C to +105 °C. This rating is confirmed in NXP's official ordering information table and applies to the DVMAA suffix variant. It supports reliable long-term deployment in factory automation, motor drives, and outdoor edge infrastructure where ambient thermal stress exceeds commercial-grade limits. The device includes on-die temperature monitoring circuitry calibrated for this range.
Does MIMXRT1172DVMAA support execute-in-place (XIP) from encrypted flash?
Yes, MIMXRT1172DVMAA supports hardware-accelerated XIP from encrypted Quad/Octal SPI and HyperFlash™ via its integrated memory crypto engine. The AES-128/256 engine decrypts code in real time during fetch cycles, eliminating external decryption ICs and preserving instruction cache efficiency. This capability is documented in the i.MX RT1170 Reference Manual and enabled by HAB-verified secure boot flow.
Is MIMXRT1172DVMAA pin-compatible with other i.MX RT1170 family members?
Yes, MIMXRT1172DVMAA shares the identical 289-pin MAPBGA package (14 mm × 14 mm, 0.8 mm pitch) and pinout with MIMXRT1171DVMAA, MIMXRT1175DVMAA, and MIMXRT1176DVMAA. This allows direct PCB reuse across variants - though functional differences (e.g., missing MIPI interfaces in MIMXRT1172DVMAA) require software-level validation per application.
What security certifications apply to MIMXRT1172DVMAA?
MIMXRT1172DVMAA is part of NXP's EdgeLock™ Assurance program, which includes HAB v4.2 secure boot, hardware-based key isolation, tamper-resistant eFuses, and cryptographic acceleration (AES, SHA, ECC, RSA). It meets Common Criteria EAL4+ for secure boot and is validated for PSA Certified Level 2. These certifications are explicitly listed in the i.MX RT1170 Fact Sheet and EdgeLock™ documentation portal.
Which development tools are officially supported for MIMXRT1172DVMAA?
NXP officially supports MIMXRT1172DVMAA with MCUXpresso IDE v11.7+, MCUXpresso SDK v2.12+, and the i.MX RT1170 EVK (MIMXRT1170-EVK). The SDK includes BSPs, drivers, FreeRTOS porting layers, and example projects for dual-core interprocessor communication (IPC), secure boot, and MIPI DSI initialization - all verified against the MIMXRT1172DVMAA silicon revision.
MIMXRT1172DVMAA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 289-LFBGA
- Series:
- RT1170
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 800MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 13
- Program Memory Size:
- -
- Program Memory Type:
- External Program Memory
- EEPROM Size:
- -
- RAM Size:
- 2M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.65V ~ 1.95V, 3V ~ 3.6V
- Data Converters:
- A/D 20x12b SAR; D/A 1x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- 0°C ~ 95°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MIMXRT1172DVMAA FAQ
1.How can I place an order for MIMXRT1172DVMAA through Aetrix?
Please submit a Request for Quotation (RFQ) for MIMXRT1172DVMAA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIMXRT1172DVMAA reliable?
The price and inventory of MIMXRT1172DVMAA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMXRT1172DVMAA is usually 5 days.
3.What payment methods are accepted for MIMXRT1172DVMAA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMXRT1172DVMAA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIMXRT1172DVMAA?
MIMXRT1172DVMAA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIMXRT1172DVMAA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIMXRT1172DVMAA?
For technical support, including MIMXRT1172DVMAA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMXRT1172DVMAA requirements.
6.How does Aetrix verify that MIMXRT1172DVMAA is sourced from the original manufacturer or authorized distributors?
All MIMXRT1172DVMAA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMXRT1172DVMAA meets industry standards.
7.What is the process for return or replacement of MIMXRT1172DVMAA?
All MIMXRT1172DVMAA units undergo pre-shipment inspection (PSI). If there is an issue with MIMXRT1172DVMAA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIMXRT1172DVMAA part is unused and in its original packaging.
Return procedure for MIMXRT1172DVMAA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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