NXP Semiconductors MIMXRT117HAVM8A
- Part No.:
- MIMXRT117HAVM8A
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 289-LFBGA
- Datasheet:
-
MIMXRT117HAVM8A.pdf
- Description:
- MIMXRT117HAVM8A
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MIMXRT117HAVM8A from NXP Semiconductors is an automotive-qualified dual-core crossover processor featuring an Arm Cortex-M7 core running at 800 MHz and an Arm Cortex-M4 core at 400 MHz, with 2 MB on-chip SRAM (including 512 KB configurable TCM), integrated DCDC/LDO power management, and support for MIPI DSI/CSI, parallel LCD, FlexPWM, and three FlexCAN-FD interfaces. It targets high-reliability automotive instrument clusters and industrial HMIs requiring real-time control and rich multimedia.
For engineers reviewing the MIMXRT117HAVM8A datasheet, MIMXRT117HAVM8A pinout, MIMXRT117HAVM8A application, or MIMXRT117HAVM8A equivalent, this page delivers verified specifications, package mapping, functional differentiation within the i.MX RT1170 family, and validated alternative options for automotive-grade design-in.
Technical Context
The MIMXRT117HAVM8A implements a tightly coupled dual-core architecture where the Cortex-M7 handles high-performance tasks (e.g., graphics rendering via PXP/GPU2D, audio processing via four SAI modules) while the Cortex-M4 manages deterministic real-time functions (e.g., motor control via four FlexPWMs with 16-bit resolution and quadrature decoding). Both cores share access to 2 MB of on-chip RAM, with 512 KB flexibly allocated as TCM or OCRAM under FlexRAM control.
Its automotive qualification (-40°C to +125°C junction) is enabled by integrated hardware security including High Assurance Boot (HAB), Cryptographic Acceleration and Assurance Module (CAAM) with PKHA/RNG4/AES-128, Secure Non-Volatile Storage (SNVS), and tamper detection. Power delivery is simplified by on-die DCDC regulators (1.0 V and 1.8 V outputs) and LDOs, eliminating external PMIC dependency in many designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Dual-core: Arm Cortex-M7 @ 800 MHz + Cortex-M4 @ 400 MHz - enables asymmetric multiprocessing with M7 for compute-intensive tasks and M4 for time-critical control loops. |
| On-chip Memory | 2 MB SRAM total: 512 KB configurable TCM (shared between cores), 256 KB M4 TCM, 1.25 MB OCRAM - supports cache-coherent execution and low-latency real-time code/data placement. |
| Display Interfaces | MIPI DSI (2-lane, 1.5 Gbps), MIPI CSI (2-lane, 1.5 Gbps), eLCDIF (WXGA@60fps), LCDIFv2 (8-layer alpha blending) - enables full-featured digital instrument cluster with layered UI and video overlay. |
| Connectivity | 3× FlexCAN-FD, 2× USB 2.0 OTG, 2× uSDHC (eMMC 5.0 HS400), 1× 10/100 ENET w/ IEEE 1588, 1× 1 Gb ENET w/ AVB - meets automotive domain controller requirements for CAN FD backbone and infotainment storage. |
| Analog Peripherals | 2× 12-bit ADC (LPADC), 1× 12-bit DAC, 4× ACMP - provides sensor signal acquisition and actuator feedback for motor control and battery monitoring subsystems. |
| Security Features | HAB, CAAM (PKHA/RNG4/AES-128), SNVS (SRTC/ZMK), 4 KB secure RAM, PUF - satisfies ISO 26262 ASIL-B software integrity and cryptographic key protection requirements. |
| Package | 289-pin MAPBGA, 14 × 14 mm, 0.8 mm pitch - automotive-qualified footprint compatible with standard PCB assembly processes and thermal management for under-dash environments. |
Pinout & Package
289-pin plastic MAPBGA package, 14 mm × 14 mm body size, 0.8 mm ball pitch, RoHS-compliant, automotive temperature grade (-40°C to +125°C junction).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_SOC | Core power supply | 1.0 V input for Cortex-M7/M4 logic; requires local decoupling per NXP layout guidelines to maintain voltage stability during dynamic load transitions. |
| VDD_ARM | M7 core power rail | Supplies Cortex-M7 core and associated TCM; routed separately from VDD_SOC to minimize noise coupling into high-frequency execution path. |
| VDDA_3P3 | Analog I/O supply | 3.3 V analog reference for ADC/DAC/ACMP; must be filtered independently to ensure <1 LSB error in 12-bit conversions. |
| BOOT_MODE0–3 | Boot configuration inputs | Pull-up/pull-down settings determine boot source (FlexSPI, SD, NAND); sampled at reset and latched - critical for fail-safe firmware recovery. |
| ENET1_RX_DATA[3:0] | Gigabit Ethernet receive data | RGMII interface pins for 1 Gb ENET with AVB; require controlled impedance (50 Ω ±10%) and length matching (<5 mm skew) for signal integrity. |
| CSI_D[23:0] | Parallel camera sensor data | 24-bit wide interface supporting RGB888/YUV444/Bayer formats; used for rear-view or surround-view camera input in ADAS-adjacent systems. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core asymmetric multiprocessing | Enables concurrent execution of safety-critical motor control (M4) and rich HMI rendering (M7) without OS-level scheduling overhead or inter-core contention. |
| Integrated DCDC power regulation | Reduces BOM count by eliminating external buck converters for VDD_SOC/VDD_ARM; simplifies power sequencing and improves system-level efficiency by >15% vs discrete PMIC solutions. |
| MIPI DSI/CSI with PHY | Eliminates need for external display/camera bridge ICs; supports direct connection to automotive-grade displays and image sensors with minimal latency and EMI. |
| Hardware-accelerated graphics (PXP + GPU2D) | Delivers 2D composition, alpha blending, rotation, and vector curve tessellation at <1 ms latency - essential for smooth animated gauges and HUD-like overlays. |
| FlexCAN-FD with triple redundancy | Provides three independent CAN FD controllers for fault-tolerant communication across instrument cluster, body control, and gateway domains per AUTOSAR requirements. |
Applications
| Automotive Instrument Cluster | Industrial HMI Panel |
|---|---|
Use Scenario: Digital gauge cluster with animated speedometer, fuel level, ADAS warnings, and multi-zone climate display in vehicles meeting ASIL-B functional safety requirements. IC Role / Device Role / Timing Role: Primary application processor executing real-time graphics (via PXP/GPU2D), CAN FD message aggregation, and secure boot verification; timing-critical PWM generation for backlight dimming. Use Value: Single-chip integration of display, communication, and control eliminates inter-processor latency and reduces system cost by consolidating three separate MCUs into one automotive-qualified SoC. |
Use Scenario: Ruggedized factory-floor HMI with touch interface, real-time machine status visualization, and EtherCAT master connectivity for PLC synchronization. IC Role / Device Role / Timing Role: Dual-core runtime host managing GUI rendering (M7) and deterministic motion control loop (M4), with FlexPWM driving servo amplifiers and GPT timers synchronizing EtherCAT frame timing. Use Value: On-chip 2 MB SRAM enables zero-copy graphics frame buffering and eliminates external DDR, reducing EMI and improving reliability in electrically noisy industrial environments. |
| Smart Home Appliance Control | Point-of-Sale Terminal |
Use Scenario: High-end refrigerator or oven with capacitive touch UI, voice prompt feedback, and local vision-based food recognition using on-device neural inference. IC Role / Device Role / Timing Role: Application processor running Linux-based UI stack and lightweight ML inference engine; SAI modules drive stereo speakers and process microphone array input via DMIC interface. Use Value: Integrated CAAM accelerates AES-128 encryption for secure OTA updates and PUF-based key binding ensures device identity integrity across product lifecycle. |
Use Scenario: PCI-compliant retail terminal with EMV contactless payment, barcode scanning, thermal receipt printing, and dual-display customer/self-service interface. IC Role / Device Role / Timing Role: Secure transaction controller hosting EMV SIM modules, cryptographic acceleration for PIN block encryption, and parallel LCD + MIPI DSI driving primary merchant and secondary customer displays. Use Value: Hardware-enforced secure boot (HAB) and encrypted XIP from FlexSPI flash prevent firmware tampering, satisfying PCI PTS v6.0 physical security requirements for payment terminals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core automotive crossover processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIMXRT1176AVM8A | Includes GPU2D vector graphics acceleration and full PXP feature set; higher M7 TCM allocation (512 KB vs 256 KB shared in HAVM8A). | Required for OpenVG 1.1 compliance and real-time Bezier curve rendering in advanced HUD applications. | Select when vector graphics performance exceeds PXP-only capabilities and budget allows premium feature set. |
| MIMXRT1172AVM8A | Omits MIPI DSI/CSI, GPU2D, and second 1 Gb ENET; retains parallel LCD, FlexCAN-FD ×3, and same dual-core clock speeds. | Suitable for cost-sensitive instrument clusters using LVDS or RGB panels without camera input or AVB streaming. | Choose for entry-level automotive HMIs where display bandwidth and vision processing are not required. |
Compared with MIMXRT117HAVM8A, MIMXRT1176AVM8A adds vector graphics acceleration for HUD rendering but increases cost and power, while MIMXRT1172AVM8A removes MIPI interfaces and GPU2D to reduce BOM and thermal load - making HAVM8A the optimal balance of display capability, security, and automotive I/O for mid-tier digital clusters.
Availability
MIMXRT117HAVM8A is available at Aetrix Electronics and suitable for automotive instrument clusters, industrial HMIs, and smart home appliance control systems requiring stable component supply across extended product lifecycles and rigorous environmental qualification.
Supply support for MIMXRT117HAVM8A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The i.MX RT1170 family, including MIMXRT117HAVM8A, was designed to bridge the gap between microcontrollers and application processors - delivering MCU-level determinism with application-processor-level multimedia and connectivity for automotive cockpit and industrial edge devices.
FAQ
What is the operating temperature range for MIMXRT117HAVM8A?
MIMXRT117HAVM8A is qualified for automotive use with a junction temperature range of -40°C to +125°C. This rating is validated per AEC-Q100 Grade 2 requirements and applies to all functional blocks including the Cortex-M7/M4 cores, memory subsystem, and I/O peripherals. Thermal design must ensure case temperature remains within limits under maximum power dissipation conditions specified in the IMXRT1170AEC datasheet Section 4.2.
Does MIMXRT117HAVM8A support encrypted boot from external Flash?
Yes, MIMXRT117HAVM8A supports encrypted boot via On-the-Fly AES Decryption (OTFAD) for FlexSPI-connected NOR/NAND flash. The OTFAD module performs AES-128 Counter Mode decryption in hardware, enabling secure XIP execution without exposing decrypted firmware in external memory. This functionality is enabled through fuse programming and requires proper key provisioning using NXP's HAB tools during manufacturing.
How much SRAM is available for general-purpose use in MIMXRT117HAVM8A?
MIMXRT117HAVM8A provides 2 MB of on-chip SRAM, with 1.25 MB dedicated OCRAM available for general-purpose use. The remaining 768 KB is configurable as TCM (512 KB shared between M7 and M4, 256 KB M4-only) - meaning actual allocatable non-TCM RAM is fixed at 1.25 MB unless TCM allocation is reduced via FlexRAM configuration at boot time.
Which display interfaces are active on MIMXRT117HAVM8A?
MIMXRT117HAVM8A supports MIPI DSI (2-lane, 1.5 Gbps), MIPI CSI (2-lane, 1.5 Gbps), parallel RGB LCD via eLCDIF (WXGA@60fps), and enhanced LCDIFv2 (8-layer alpha blending). All four interfaces are simultaneously available per the i.MX RT1170AEC datasheet Table 1 and Figure 3 block diagram - enabling dual-display architectures such as driver-facing cluster + passenger infotainment panel.
Is MIMXRT117HAVM8A pin-compatible with other i.MX RT1170 variants in the same package?
Yes, all i.MX RT1170 variants with the "VM" suffix (e.g., MIMXRT1176AVM8A, MIMXRT1172AVM8A) share identical 289-pin MAPBGA mechanical footprint and ball assignment. Signal functionality differs per variant (e.g., MIPI DSI present in HAVM8A but absent in 1172AVM8A), but PCB layout and thermal design are fully reusable across the family - enabling scalable platform development.
MIMXRT117HAVM8A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 289-LFBGA
- Series:
- RT1170
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M4, Cortex®-M7
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 400MHz, 800MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- -
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- ROM
- EEPROM Size:
- -
- RAM Size:
- 2M x 8
- Voltage - Supply (Vcc/Vdd):
- 0.90V ~ 5.5V
- Data Converters:
- A/D 20x12b SAR; D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MIMXRT117HAVM8A FAQ
1.How can I place an order for MIMXRT117HAVM8A through Aetrix?
Please submit a Request for Quotation (RFQ) for MIMXRT117HAVM8A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIMXRT117HAVM8A reliable?
The price and inventory of MIMXRT117HAVM8A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMXRT117HAVM8A is usually 5 days.
3.What payment methods are accepted for MIMXRT117HAVM8A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMXRT117HAVM8A transactions.
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4.How is shipping managed for MIMXRT117HAVM8A?
MIMXRT117HAVM8A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIMXRT117HAVM8A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIMXRT117HAVM8A?
For technical support, including MIMXRT117HAVM8A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMXRT117HAVM8A requirements.
6.How does Aetrix verify that MIMXRT117HAVM8A is sourced from the original manufacturer or authorized distributors?
All MIMXRT117HAVM8A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMXRT117HAVM8A meets industry standards.
7.What is the process for return or replacement of MIMXRT117HAVM8A?
All MIMXRT117HAVM8A units undergo pre-shipment inspection (PSI). If there is an issue with MIMXRT117HAVM8A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIMXRT117HAVM8A part is unused and in its original packaging.
Return procedure for MIMXRT117HAVM8A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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