NXP Semiconductors MIMXRT1189CVM8B
- Part No.:
- MIMXRT1189CVM8B
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 289-LFBGA
- Datasheet:
-
MIMXRT1189CVM8B.pdf
- Description:
- MIMXRT1189CVM8B
- Quantity:
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Product details
Overview
MIMXRT1189CVM8B from NXP is a dual-core crossover MCU featuring an Arm Cortex-M7 core at 800 MHz and a Cortex-M33 core at 300 MHz, integrated 4-port TSN switch with 1 Gbps per port, 1.5 MB on-chip SRAM with ECC, and support for HyperRAM/HyperFlash via dual-channel FlexSPI - deployed in industrial gateways requiring deterministic networking and real-time motor control.
For engineers reviewing the MIMXRT1189CVM8B datasheet, MIMXRT1189CVM8B pinout, MIMXRT1189CVM8B application, or MIMXRT1189CVM8B equivalent, key selection criteria include TSN switch port count, EtherCAT SubDevice capability, dual-core clock domain isolation, 289-ball MAPBGA package compatibility, and secure boot enforcement via EdgeLock® Secure Enclave.
Technical Context
The MIMXRT1189CVM8B implements a hardware-accelerated 4+1 port TSN switch compliant with IEC 60802, supporting time-aware shaping, frame preemption, and scheduled traffic for Profinet over TSN and OPC UA Pub-Sub. Its dual-core architecture separates real-time control (M33) from high-performance processing (M7), with dedicated TCM (512 KB + 256 KB w/ECC) and shared OCRAM.
It integrates three CAN-FD controllers, six LPSPI interfaces, twelve LPUARTs, and two 16-bit ADCs sampling at 3.5 Msps - all synchronized to the TSN timing domain. The device supports secure boot via TRDC, TrustZone-M, PUF, and EdgeLock® Secure Enclave, enabling IEC 62443-compliant system design without external security ICs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Arm Cortex-M7 @ 800 MHz + Cortex-M33 @ 300 MHz - enables hard real-time control on M33 while offloading compute-intensive tasks to M7 |
| TSN Switch | 4-port + 1 endpoint, 1 Gbps per port, IEC 60802-compliant - delivers deterministic latency for Profinet over TSN and EtherCAT SubDevice operation |
| On-chip Memory | 1.5 MB SRAM w/ECC, 512 KB + 256 KB TCM w/ECC - provides low-latency, fault-tolerant memory for safety-critical control loops |
| Analog Peripherals | 2 × 16-bit ADC @ 3.5 Msps, 4 × ACMP, 3 × SINC filters - supports multi-axis servo drive current sensing and position feedback |
| Connectivity | 3 × CAN-FD, 6 × LPSPI, 12 × LPUART, 6 × I²C, 2 × USB 2.0 OTG w/PHY - enables heterogeneous industrial fieldbus bridging |
| Security | EdgeLock® Secure Enclave, TRDC, TrustZone-M, PUF, AES-256/GCM, SHA-2/384, PKC - meets IEC 62443-3-3 SL2 requirements out-of-box |
| Package | 289-ball MAPBGA, 14 × 14 mm, 0.8 mm pitch - matches standard PCB routing rules for industrial-grade thermal and signal integrity |
Pinout & Package
289-ball Monolithic Array Plastic Ball Grid Array (MAPBGA), 14 mm × 14 mm body, 0.8 mm ball pitch, 1.2 mm max height, RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_SOC | Main SoC power supply | 1.0 V ±3% supply for CPU cores, TCM, and digital logic - requires low-noise regulation and local decoupling |
| VDDA_1P0 | Analog 1.0 V supply | Independent 1.0 V rail for ADC, ACMP, and analog peripherals - must be isolated from digital noise sources |
| TSN_TXD[3:0] | TSN switch data output | LVDS-compatible differential outputs for 1 Gbps TSN port transmission - routed as controlled-impedance pairs |
| TSN_RXD[3:0] | TSN switch data input | Differential inputs for TSN port reception - require matched trace lengths and 100 Ω termination |
| ENET_MDC / MDIO | IEEE 802.3 management interface | Shared with TSN switch for PHY configuration and status monitoring - operates at ≤2.5 MHz |
| ADC0_SE0 / ADC1_SE0 | Dedicated analog input channels | Single-ended inputs for 16-bit ADC0/ADC1 - referenced to VREFH/VREFL and supported by internal calibration |
Key Features
| Feature | Design Value |
|---|---|
| EtherCAT SubDevice support | Hardware-accelerated EtherCAT slave stack running on Cortex-M33 - eliminates need for external ASIC or FPGA in compact motion controllers |
| Dual-channel FlexSPI with OTFAD | Enables encrypted, authenticated boot from HyperFlash and runtime code execution from HyperRAM - reduces BOM cost vs. external secure memory |
| Delta-sigma demodulator with 3× SINC filters | Direct interface to sigma-delta sensors (e.g., current shunt monitors) - replaces external modulator and digital filter ICs in servo drives |
| Secure JTAG with lifecycle control | Debug access disabled after secure boot lock - prevents firmware extraction during field deployment and enables secure OTA updates |
| ASRC (Asynchronous Sample Rate Converter) | Hardware audio resampling between independent clock domains - supports multi-source audio streaming in industrial HMIs without CPU overhead |
Applications
| Industrial Gateway | Compact Motion Controller |
|---|---|
Use Scenario: Bridging legacy fieldbuses (CANopen, Modbus RTU) to TSN-based IIoT infrastructure with real-time protocol translation. IC Role / Device Role / Timing Role: Central protocol translator and TSN timing master - synchronizes distributed clocks across Profinet over TSN and EtherCAT networks. Use Value: Eliminates need for separate gateway SoC and TSN switch IC, reducing latency by 120 ns and board area by 35%. | Use Scenario: Closed-loop control of 3-axis servo motors in collaborative robot joints with synchronized current, position, and velocity loops. IC Role / Device Role / Timing Role: Real-time motion controller with hardware EtherCAT SubDevice and delta-sigma demodulation - executes control law at 20 kHz with jitter < 50 ns. Use Value: Replaces dual-MCU + FPGA architecture, cutting component count by 40% and enabling sub-μs current loop response. |
| AC Drive Interface Module | In-Vehicle Networking Bridge |
Use Scenario: High-voltage AC drive control module interfacing with motor encoder, current sensors, and safety PLC via TSN. IC Role / Device Role / Timing Role: Safety-monitored motor controller - runs functional safety software on Cortex-M33 while M7 handles HMI and diagnostics. Use Value: Achieves SIL2 compliance using on-chip TRDC and lockstep-capable peripherals - no external safety monitor required. | Use Scenario: In-vehicle Ethernet bridge connecting ADAS camera clusters, infotainment head unit, and vehicle control domain via TSN. IC Role / Device Role / Timing Role: Automotive-grade TSN endpoint - provides time-synchronized video streaming and control message prioritization across domains. Use Value: Meets ISO 21111-2 timing accuracy (< 1 μs sync error) without external grandmaster clock - simplifies ECU synchronization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar crossover MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MIMXRT1187CVM8B | No EtherCAT SubDevice; identical TSN switch (4+1 port), same dual-core clocks and memory map | Lacks hardware EtherCAT slave acceleration - requires software stack and higher M33 utilization | Select when EtherCAT is not required but full TSN switching and dual-core performance are critical |
| MIMXRT1182CVM8B | 2+1 port TSN switch, 1 MB SRAM, 120 GPIOs, no USB PHY, no EtherCAT SubDevice | Reduced port count limits use in multi-protocol gateways; lower pin count eases layout but restricts I/O expansion | Select for cost-sensitive, space-constrained edge nodes where single TSN domain suffices |
Compared with MIMXRT1187CVM8B and MIMXRT1182CVM8B, the MIMXRT1189CVM8B uniquely delivers EtherCAT SubDevice hardware acceleration alongside full 4+1 port TSN switching - making it the only option in the i.MX RT1180 family qualified for compact, safety-certified motion controllers requiring both protocols simultaneously.
Availability
MIMXRT1189CVM8B is available at Aetrix Electronics and suitable for industrial gateways, compact motion controllers, AC/servo drives, and in-vehicle networking bridges requiring stable component supply across extended product lifecycles.
Supply support for MIMXRT1189CVM8B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The i.MX RT1180 family - including MIMXRT1189CVM8B - was engineered specifically for Industry 4.0 networked control systems requiring deterministic TSN switching, hardware-accelerated industrial protocols, and root-of-trust security in a single chip.
FAQ
What is the TSN switch configuration supported by the MIMXRT1189CVM8B?
The MIMXRT1189CVM8B integrates a 4-port + 1 endpoint TSN switch compliant with IEC 60802, supporting time-aware shaping, frame preemption, and scheduled traffic. All five ports operate at 1 Gbps line rate, with hardware timestamping and synchronization via IEEE 802.1AS-2020. This configuration enables simultaneous Profinet over TSN and EtherCAT SubDevice operation without external switch ICs.
Does the MIMXRT1189CVM8B include hardware support for EtherCAT SubDevice functionality?
Yes, the MIMXRT1189CVM8B includes dedicated hardware acceleration for EtherCAT SubDevice operation, implemented within the Cortex-M33 subsystem. It supports full EtherCAT slave stack execution with cycle times down to 100 μs, integrated process data mapping, and DC synchronization - eliminating the need for external EtherCAT ASICs or FPGAs in motion control designs.
What memory interfaces does the MIMXRT1189CVM8B support for external storage?
The MIMXRT1189CVM8B supports dual-channel FlexSPI for HyperRAM™ and HyperFlash™ with OTFAD encryption, plus a full SEMC (SDRAM/DDR/LPSDRAM/NAND/Parallel NOR) controller with 8/16/32-bit bus width. It also includes SRAMC for async 8/16-bit ADMUX/non-ADMUX SRAM, enabling flexible memory expansion for real-time buffering and firmware storage.
How does the MIMXRT1189CVM8B implement security for industrial applications?
The MIMXRT1189CVM8B implements security through EdgeLock® Secure Enclave, TRDC-based resource partitioning, TrustZone-M on Cortex-M33, Physical Unclonable Function (PUF), and cryptographic accelerators (AES-GCM, SHA-2/384, PKC). These features collectively provide secure boot, runtime attestation, and IEC 62443-3-3 SL2 compliance without external security components.
What is the package type and thermal specification of the MIMXRT1189CVM8B?
The MIMXRT1189CVM8B uses a 289-ball MAPBGA package measuring 14 mm × 14 mm with 0.8 mm ball pitch. Its thermal resistance (θJA) is 24°C/W under JEDEC JESD51-2 conditions, and it supports industrial temperature range (–40°C to +105°C) operation with junction temperature monitoring via on-die sensor.
MIMXRT1189CVM8B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 289-LFBGA
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33, ARM® Cortex®-M7
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 240MHz, 800MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG
- Peripherals:
- Crypto - AES, DMA, PWM, RSA, SHA, TRNG, WDT
- Number of I/O:
- 173
- Program Memory Size:
- -
- Program Memory Type:
- ROM
- EEPROM Size:
- -
- RAM Size:
- 1.5M x 8
- Voltage - Supply (Vcc/Vdd):
- -
- Data Converters:
- D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MIMXRT1189CVM8B FAQ
1.How can I place an order for MIMXRT1189CVM8B through Aetrix?
Please submit a Request for Quotation (RFQ) for MIMXRT1189CVM8B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MIMXRT1189CVM8B reliable?
The price and inventory of MIMXRT1189CVM8B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MIMXRT1189CVM8B is usually 5 days.
3.What payment methods are accepted for MIMXRT1189CVM8B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MIMXRT1189CVM8B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MIMXRT1189CVM8B?
MIMXRT1189CVM8B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MIMXRT1189CVM8B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MIMXRT1189CVM8B?
For technical support, including MIMXRT1189CVM8B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MIMXRT1189CVM8B requirements.
6.How does Aetrix verify that MIMXRT1189CVM8B is sourced from the original manufacturer or authorized distributors?
All MIMXRT1189CVM8B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MIMXRT1189CVM8B meets industry standards.
7.What is the process for return or replacement of MIMXRT1189CVM8B?
All MIMXRT1189CVM8B units undergo pre-shipment inspection (PSI). If there is an issue with MIMXRT1189CVM8B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MIMXRT1189CVM8B part is unused and in its original packaging.
Return procedure for MIMXRT1189CVM8B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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