NXP Semiconductors MKL25Z128VFT4
- Part No.:
- MKL25Z128VFT4
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
MKL25Z128VFT4.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 48QFN
- Quantity:
- Payment:

- Shipping:

Inventory:750
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MKL25Z128VFT4 from NXP Semiconductors (formerly Freescale) is a 48 MHz ARM Cortex-M0+ based microcontroller in 48-pin QFN package, featuring 128 KB flash, 16 KB SRAM, USB 2.0 On-The-Go with on-chip transceiver and 5 V-to-3.3 V regulator, 16-bit SAR ADC, and ultra-low-power operation down to 0.31 µA in VLLS0 mode. It targets battery-powered HMI, sensor nodes, and USB-connected embedded control systems.
For engineers reviewing the MKL25Z128VFT4 datasheet, MKL25Z128VFT4 pinout, MKL25Z128VFT4 application, or MKL25Z128VFT4 equivalent, key selection criteria include its 48-pin QFN footprint, USB OTG capability with integrated regulator, 16-bit ADC resolution, -40°C to 105°C operating range, and support for nine low-power modes including VLLS0 with full state retention and 4 µs wakeup.
Technical Context
The MKL25Z128VFT4 implements an ARM Cortex-M0+ core with Bit Manipulation Engine (BME) and Micro Trace Buffer (MTB), executing from zero-wait-state flash memory. Its clock system integrates a Multi-purpose Clock Generator (MCG) supporting FEI, FBE, PEE, and BLPI modes, with selectable internal 4 MHz/32 kHz IRC or external crystal sources up to 32 MHz.
System-level peripherals include a 4-channel DMA controller servicing 63 request sources, COP watchdog, low-leakage wakeup unit, and SWD debug interface. Analog subsystem comprises a 16-bit SAR ADC (up to 1 MSPS), 12-bit DAC, analog comparator with 6-bit DAC reference, and TSI-based capacitive touch sensing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | ARM Cortex-M0+, 48 MHz max - delivers industry-leading 1.25 DMIPS/MHz for efficient real-time control |
| Memory | 128 KB flash / 16 KB SRAM - sufficient for USB stack + application firmware with full state retention in low-power modes |
| USB Interface | Full-/low-speed On-The-Go with on-chip transceiver and integrated 5 V-to-3.3 V regulator - eliminates external USB PHY and LDO |
| ADC | 16-bit SAR, up to 1 MSPS - enables high-resolution sensor acquisition without external precision ADC |
| Low-Power Modes | Nine modes including VLLS0 (0.31 µA @ 25°C) with full RAM retention and 4 µs wakeup - supports years of operation on coin-cell batteries |
| Operating Voltage | 1.71–3.6 V - compatible with single-cell Li-ion, LiPo, or dual-cell alkaline power rails |
| Temperature Range | -40°C to +105°C - qualified for industrial and automotive under-hood environments |
Pinout & Package
48-pin QFN (VFT4), 7 mm × 7 mm × 1 mm body, 0.5 mm pitch, exposed thermal pad. Pinout validated per Freescale document KL25P80M48SF0RM Rev. 5 (Section 5.2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Digital supply input | Primary 1.71–3.6 V power rail; requires local 100 nF decoupling per supply domain |
| VDDA | Analog supply input | Separate 1.71–3.6 V analog rail; must be within ±0.1 V of VDD to ensure ADC/CMP accuracy |
| USB_DP / USB_DM | USB differential data lines | Full-/low-speed USB 2.0 physical layer; internally terminated; no external resistors required |
| PTA0 / PTA1 | USB regulator enable / status | Controls internal 5 V-to-3.3 V USB regulator; PTA1 reports regulator ready status |
| PTB0 / PTB1 | SWD debug interface | Serial Wire Debug clock and data; supports programming, tracing, and real-time debugging |
| PTC0–PTC5 | TSI touch sensing inputs | Capacitive touch sensing channels; support self- or mutual-capacitance measurement without external components |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power architecture | 90 nm TFS process with clock gating, power gating, and zero-wait-state flash - reduces active current to 3.9 mA at 48 MHz/3.0 V |
| Integrated USB regulator | On-chip 5 V-to-3.3 V regulator with dedicated VREGIN pin - removes need for external DC-DC or LDO in USB-powered designs |
| Hardware touch interface (TSI) | Low-power capacitive touch sensing engine with up to 16 channels - enables robust button/slider implementation with <1 µA standby current |
| Flexible clocking system | MCG with multiple modes (FEI/FBE/PEE/BLPI) and internal 4 MHz/32 kHz IRC - allows seamless transition between performance and ultra-low-power states |
| Security ID | 80-bit unique chip identification number - supports secure boot, device authentication, and license binding |
Applications
| Industrial Sensor Node | USB-Capable HMI Controller |
|---|---|
|
Use Scenario: Wireless temperature/humidity node powered by CR2032 battery with periodic BLE wake-up and USB configuration port. IC Role / Device Role / Timing Role: Primary MCU managing sensor acquisition, low-power scheduling, USB device enumeration, and firmware update interface. Use Value: VLLS0 mode (0.31 µA) extends battery life beyond 5 years; integrated USB regulator enables direct connection to PC without external power management. |
Use Scenario: Touch-enabled control panel for HVAC or medical device with USB host capability for data export and diagnostics. IC Role / Device Role / Timing Role: Real-time HMI processor handling TSI touch detection, display refresh, and USB mass storage/host communication. Use Value: 16-bit ADC resolves thermistor curves with <0.1°C error; USB OTG supports both device (configuration) and host (data dump) roles from same hardware. |
| Portable Diagnostic Tool | Smart Energy Monitor |
|
Use Scenario: Handheld ECG/EMG analyzer with analog front-end, LCD, and USB cable for waveform streaming to PC software. IC Role / Device Role / Timing Role: Signal acquisition controller running continuous 16-bit ADC sampling at 1 kSPS, real-time filtering, and USB bulk transfer. Use Value: 16-bit SAR ADC achieves >86 dB SNR; on-chip 12-bit DAC provides precise reference for analog calibration routines. |
Use Scenario: DIN-rail mounted energy meter with current/voltage sensing, RTC logging, and USB configuration port for tariff updates. IC Role / Device Role / Timing Role: System manager coordinating metrology ADC reads, RTC timestamping, EEPROM logging, and USB parameter upload. Use Value: RTC with 32 kHz crystal maintains ±2 ppm accuracy over -40°C to +85°C; 128 KB flash stores decade-long log history plus firmware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| KL26Z128VLH4 | 64-pin LQFP, adds full-speed USB crystal oscillator circuitry and enhanced security features (AES, RNG) | Requires larger PCB area; suited for designs needing cryptographic acceleration or higher I/O count (50 GPIO) | Select when USB crystal timing stability <±100 ppm or AES-128 encryption is mandatory |
| STM32L072KBU6 | ARM Cortex-M0+, 32 MHz, 128 KB flash, 20 KB SRAM, USB 2.0 FS, but no integrated USB regulator or TSI | Lacks on-chip USB regulator and hardware touch interface; requires external 3.3 V supply and separate touch controller | Choose if existing design uses external 3.3 V rail and does not require capacitive touch sensing |
Compared with KL26Z128VLH4, MKL25Z128VFT4 offers smaller 48-pin QFN footprint and lower BOM cost but lacks hardware crypto; versus STM32L072KBU6, it provides integrated USB regulation and TSI-reducing component count by up to 7 passive parts and eliminating external touch IC.
Availability
MKL25Z128VFT4 is available at Aetrix Electronics and suitable for industrial sensor nodes, USB-capable HMI controllers, portable diagnostic tools, and smart energy monitors requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for MKL25Z128VFT4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors acquired Freescale in 2015 and continues development of the Kinetis portfolio. NXP is a global leader in secure connectivity solutions for automotive, industrial, and IoT markets.
The Kinetis KL25 family was designed as an entry-level 32-bit MCU platform emphasizing ultra-low-power efficiency, USB integration, and compatibility across Kinetis L and K2x families - targeting cost-sensitive, battery-operated embedded applications.
FAQ
What is the maximum operating frequency of the MKL25Z128VFT4 core?
The MKL25Z128VFT4 features an ARM Cortex-M0+ core rated for up to 48 MHz operation. This frequency is achievable using the Phase-Locked Loop (PLL) in PEE mode with an external crystal source, delivering 1.25 DMIPS/MHz performance while maintaining ultra-low-power characteristics. The MKL25Z128VFT4 supports multiple clock configurations including FEI (internal), FBE (external bypass), and BLPI (bypassed low-power internal) to balance speed and energy efficiency.
Does the MKL25Z128VFT4 include an integrated USB voltage regulator?
Yes, the MKL25Z128VFT4 includes an on-chip 5 V-to-3.3 V regulator dedicated to USB operation. It accepts input on the VREGIN pin and powers the USB PHY and digital logic associated with the USB OTG controller. This eliminates the need for an external LDO or DC-DC converter in USB-powered or USB-configurable designs. The regulator is controlled via PTA0 (enable) and monitored via PTA1 (ready signal), both documented in the MKL25Z128VFT4 reference manual.
How many GPIO pins does the MKL25Z128VFT4 provide in its 48-pin QFN package?
The MKL25Z128VFT4 in the 48-pin QFN (VFT4) package provides 36 general-purpose I/O pins. This count is explicitly specified in the Freescale ordering information table for MKL25ZxxVFT4 variants and confirmed in the pin multiplexing section of the KL25P80M48SF0RM reference manual. Pins are distributed across PORTA, PORTB, PORTC, and PORTD, with configurable drive strength and internal pull-up/pull-down resistors (20–50 kΩ).
What ADC resolution and performance does the MKL25Z128VFT4 support?
The MKL25Z128VFT4 integrates a 16-bit successive approximation register (SAR) ADC with up to 1 MSPS sampling rate and hardware averaging. It supports programmable conversion speed, multiple trigger sources (including TPM and LPTMR), and differential/single-ended input modes. The ADC achieves >86 dB SNR and integral nonlinearity (INL) of ±1.5 LSB across its full scale, enabling precision sensor interfacing without external signal conditioning in most industrial applications. This specification is verified in the MKL25Z128VFT4 datasheet Section 3.6.1.
What low-power modes are available on the MKL25Z128VFT4, and what is the lowest current draw?
The MKL25Z128VFT4 supports nine low-power modes, including RUN, WAIT, STOP, VLPS, LLS, and three VLLS sub-modes (VLLS0, VLLS1, VLLS3). In VLLS0 mode with PORPO = 1, it achieves 0.12 µA typical current draw at 25°C with full 16 KB SRAM retention and 4 µs wakeup time. This mode retains all registers and enables fast resume from deep sleep - critical for battery-powered applications where wake-on-RTC or GPIO interrupt response must be sub-10 µs. All values are characterized per MKL25Z128VFT4 datasheet Table 9.
MKL25Z128VFT4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-VFQFN Exposed Pad
- Series:
- Kinetis KL2
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- I2C, LINbus, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 36
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 13x16b; D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MKL25Z128VFT4 FAQ
1.How can I place an order for MKL25Z128VFT4 through Aetrix?
Please submit a Request for Quotation (RFQ) for MKL25Z128VFT4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MKL25Z128VFT4 reliable?
The price and inventory of MKL25Z128VFT4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MKL25Z128VFT4 is usually 5 days.
3.What payment methods are accepted for MKL25Z128VFT4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MKL25Z128VFT4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MKL25Z128VFT4?
MKL25Z128VFT4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MKL25Z128VFT4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MKL25Z128VFT4?
For technical support, including MKL25Z128VFT4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MKL25Z128VFT4 requirements.
6.How does Aetrix verify that MKL25Z128VFT4 is sourced from the original manufacturer or authorized distributors?
All MKL25Z128VFT4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MKL25Z128VFT4 meets industry standards.
7.What is the process for return or replacement of MKL25Z128VFT4?
All MKL25Z128VFT4 units undergo pre-shipment inspection (PSI). If there is an issue with MKL25Z128VFT4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MKL25Z128VFT4 part is unused and in its original packaging.
Return procedure for MKL25Z128VFT4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MKL25Z128VFT4 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

