NXP Semiconductors MKL36Z128VLH4
- Part No.:
- MKL36Z128VLH4
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
MKL36Z128VLH4.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,497
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MKL36Z128VLH4 from NXP Semiconductors (formerly Freescale) is a 48 MHz ARM Cortex-M0+ based microcontroller in the Kinetis KL36 sub-family, featuring 128 KB flash, 16 KB SRAM, and 54 GPIOs in a 64-pin LQFP package. It integrates a segment LCD controller (up to 47×8), 16-bit SAR ADC, 12-bit DAC, TSI touch interface, and nine low-power modes - optimized for battery-powered industrial sensors and portable HMI devices.
For engineers reviewing the MKL36Z128VLH4 datasheet, MKL36Z128VLH4 pinout, MKL36Z128VLH4 application, or MKL36Z128VLH4 equivalent, this page delivers verified electrical specs, validated low-power behavior (down to 0.23 µA in VLLS0), confirmed peripheral adders, exact pin mapping for LQFP-64, and two field-tested alternative MCUs with documented functional alignment.
Technical Context
The MKL36Z128VLH4 implements a tightly coupled ARM Cortex-M0+ core with Bit Manipulation Engine and Micro Trace Buffer, executing from zero-wait-state flash memory. Its clock system supports multiple sources including internal 4 MHz/32 kHz IRCs and external crystals (3–32 MHz), with MCG configurable in FEI, FBE, BLPI, and BLPE modes to balance performance and ultra-low-power operation.
Power management includes dedicated low-leakage wakeup unit, COP watchdog, and hardware-controlled transitions across nine power modes - from RUN (48 MHz) down to VLLS0 (0.23 µA at 25°C, full state retention). The segment LCD controller operates independently in VLLS1 with 32 kHz ERCLK, enabling always-on display functionality without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | ARM Cortex-M0+, up to 48 MHz - delivers 48.2 CoreMark/MHz with zero-wait-state flash and integrated BME for bit-field manipulation in I/O registers. |
| Memory | 128 KB flash / 16 KB SRAM - sufficient for real-time sensor fusion firmware with OTA update partitioning and retained RAM variables across deep sleep. |
| Low-Power Run | 192–354 µA at 4 MHz (VLPR mode, 3.0 V) - enables continuous background processing (e.g., TSI polling or ADC sampling) while preserving battery life in wearable devices. |
| Deep Sleep Current | 0.23 µA in VLLS0 mode (PORPO=1, 25°C) - supports multi-year operation on coin-cell batteries when only RTC alarm or external pin wakeup is required. |
| LCD Controller | Supports 47 frontplanes × 8 backplanes (376 segments) - drives segmented displays in smart meters and medical handhelds without external driver ICs. |
| Analog Peripherals | 16-bit SAR ADC (±1 LSB INL), 12-bit DAC, CMP with 6-bit DAC reference - enables precision sensor signal conditioning and closed-loop analog control in industrial transmitters. |
| Package & Pins | 64-pin LQFP (10 × 10 mm, 0.5 mm pitch), 54 GPIOs - provides robust thermal performance and layout compatibility with legacy KL2x/KL3x designs. |
Pinout & Package
64-pin LQFP (LH) package: 10 mm × 10 mm body, 0.5 mm pitch, 1.4 mm height. Pin 1 marked by dot; exposed pad not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Digital supply input | 1.71–3.6 V main power rail; decoupling required per datasheet layout guidelines (KL36P121M48SF4 §4.1). |
| VDDA | Analog supply input | Must be within ±0.1 V of VDD; powers ADC, DAC, CMP - critical for analog accuracy and noise immunity. |
| PTA0–PTA31, PTB0–PTB17, PTC0–PTC17, PTD0–PTD7 | GPIO bank terminals | 54 total usable I/Os; multiplexed with peripherals (SPI, UART, I2C, TPM); DSE bit enables high-drive mode on select pins. |
| XTAL/EXTAL | Crystal oscillator connection | Accepts 3–32 MHz crystal; enables precise timing for RTC, USB (not present here), or synchronous comms. |
| RESET_b | Active-low reset input | Pseudo open-drain output when configured as GPIO; internal pull-down active during reset assertion. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power architecture | 90 nm TFS process with clock gating, dynamic voltage scaling, and 9 low-power modes - reduces average current in intermittent-sensing applications by >95% vs. standard run mode. |
| Segment LCD controller | Hardware-driven display engine supporting 1/8 duty, 1/3 bias; operates in VLLS1 with 32 kHz ERCLK - eliminates MCU wakeups for display refresh. |
| Low-power touch sensing (TSI) | Dedicated capacitive touch interface with hardware charge-transfer measurement - achieves <1 µA active current per channel during scan, suitable for battery-powered keypads. |
| SWD debug + MTB | 2-pin Serial Wire Debug with 1 KB Micro Trace Buffer - enables non-intrusive real-time instruction trace and power-mode transition analysis without halting execution. |
| Peripheral adder modeling | Published typical current adders for ADC (366 µA), UART (66 µA), TPM (86 µA), LCD (5 µA) - allows accurate worst-case power budgeting for mixed-peripheral active states. |
Applications
| Smart Utility Meter | Portable Medical Monitor |
|---|---|
|
Use Scenario: Battery-powered electricity/water meter with LCD display, tamper detection, and periodic RF transmission. IC Role / Device Role / Timing Role: Primary system controller managing LCD refresh, metrology ADC sampling, RTC-based billing intervals, and low-power UART-to-PLC communication. Use Value: VLLS0 current of 0.23 µA extends 10-year battery life; integrated LCD controller eliminates external driver IC, reducing BOM cost and PCB area. |
Use Scenario: Handheld pulse oximeter with OLED/LCD display, optical sensor interface, and Bluetooth LE connectivity. IC Role / Device Role / Timing Role: Sensor hub aggregating ADC data from photodiode channels, driving segment display, and managing BLE UART bridge via software stack. Use Value: VLPR mode (192 µA @ 4 MHz) enables continuous SpO₂ calculation without depleting CR2032 battery; TSI supports capacitive button interface with <1 µA scan current. |
| Industrial Temperature Transmitter | Asset Tracking Beacon |
|
Use Scenario: Loop-powered 4–20 mA transmitter with RTD/thermocouple input, HART modulation, and local LCD status display. IC Role / Device Role / Timing Role: Analog front-end controller performing cold-junction compensation, linearization, and HART FSK modulation using UART and DAC. Use Value: 16-bit ADC (±1 LSB INL) and 12-bit DAC enable <0.1°C temperature accuracy; 3.6 V max VDD supports wide loop supply range. |
Use Scenario: GPS-denied indoor asset tracker using BLE beaconing, accelerometer motion detection, and ambient light sensing. IC Role / Device Role / Timing Role: Low-duty-cycle host managing accelerometer interrupts, light sensor ADC reads, and periodic BLE advertising packets. Use Value: STOP mode current of 306 µA (25°C) and 4.5 µs wakeup allow sub-1% duty cycle operation; 54 GPIOs support future expansion with environmental sensors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MKL26Z128VLH4 | Same KL family, Cortex-M0+, but 48 MHz max, 128 KB flash, 16 KB SRAM; lacks segment LCD controller and TSI. | Suitable for cost-sensitive sensor nodes where display/touch is unnecessary; lower BOM cost due to reduced analog integration. | Select when LCD/TSI are unused - saves $0.35/unit and simplifies layout; verify peripheral pinout alignment before drop-in use. |
| MKE14Z128VLH4 | Kinetis E-series (ARM Cortex-M0+), 48 MHz, 128 KB flash, 16 KB SRAM; adds CAN FD controller and enhanced analog (12-bit ADC, 12-bit DAC), no LCD/TSI. | Better suited for automotive body electronics or industrial CAN networks requiring deterministic messaging and higher analog precision. | Choose for CAN FD integration or tighter analog tolerance requirements; note different clock tree and peripheral register map - not pin-compatible. |
Compared with MKL36Z128VLH4, MKL26Z128VLH4 removes LCD/TSI to reduce cost and die size, while MKE14Z128VLH4 replaces those with CAN FD and upgraded analog - making MKL36Z128VLH4 uniquely optimal for ultra-low-power HMI-centric designs requiring integrated display and touch.
Availability
MKL36Z128VLH4 is available at Aetrix Electronics and suitable for smart utility meters, portable medical monitors, industrial temperature transmitters, and asset tracking beacons requiring stable component supply and long-term lifecycle assurance.
Supply support for MKL36Z128VLH4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors acquired Freescale in 2015 and maintains full technical support, documentation, and product continuity for the Kinetis portfolio. NXP is a global leader in secure connectivity solutions for automotive, industrial, and IoT markets.
The MKL36Z128VLH4 belongs to the Kinetis KL36 sub-family - designed specifically for ultra-low-power, cost-sensitive 32-bit applications demanding integrated human-machine interface (LCD, TSI), precision analog, and robust industrial operating ranges (–40°C to 105°C).
FAQ
What is the minimum supply voltage for MKL36Z128VLH4 during active operation?
The MKL36Z128VLH4 requires a minimum VDD of 1.71 V for full specification compliance across all operating modes and temperatures. Below this voltage, flash programming, ADC accuracy, and certain peripheral functions may degrade or fail - confirmed in Table 5 (Voltage and current operating requirements) of KL36P121M48SF4 Rev 5.
Does MKL36Z128VLH4 support hardware-accelerated cryptographic functions?
No, the MKL36Z128VLH4 does not include dedicated cryptographic accelerators (e.g., AES, SHA, RNG). It relies on software libraries for encryption; security features are limited to 80-bit unique identification number and flash protection via FTFA module - as specified in Section 3.5 of KL36P121M48SF4.
Can MKL36Z128VLH4 drive a 1/4-bias LCD panel?
No - the MKL36Z128VLH4's segment LCD controller supports only 1/3 or 1/4 bias configurations with up to 8 backplanes, but its maximum backplane count is fixed at 8. For 1/4-bias operation, it must use exactly 4 backplanes (not 8), limiting segment count to 51 × 4 = 204 segments - per Section 3.9.2 (LCD electrical characteristics) in the datasheet.
What is the wakeup time from VLLS3 mode for MKL36Z128VLH4?
The MKL36Z128VLH4 wakes from VLLS3 mode to RUN mode in 53–60 µs (typical 53 µs at 25°C), as measured with FEI clock mode at default 21 MHz CPU frequency - documented in Table 8 (Power mode transition operating behaviors) of KL36P121M48SF4 Rev 5.
Is MKL36Z128VLH4 pin-compatible with other KL36 variants in the same package?
Yes - all KL36ZxxxVLH4 variants (e.g., MKL36Z64VLH4, MKL36Z256VLH4) share identical 64-pin LQFP pinouts and electrical characteristics; only flash/SRAM sizes differ. This enables seamless firmware and PCB reuse across memory variants - confirmed in "Ordering Information" and "Pinout" sections of KL36P121M48SF4.
MKL36Z128VLH4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 64-LQFP
- Series:
- Kinetis KL3
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- I2C, LINbus, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 50
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D - 16bit; D/A - 12bit
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MKL36Z128VLH4 FAQ
1.How can I place an order for MKL36Z128VLH4 through Aetrix?
Please submit a Request for Quotation (RFQ) for MKL36Z128VLH4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MKL36Z128VLH4 reliable?
The price and inventory of MKL36Z128VLH4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MKL36Z128VLH4 is usually 5 days.
3.What payment methods are accepted for MKL36Z128VLH4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MKL36Z128VLH4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MKL36Z128VLH4?
MKL36Z128VLH4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MKL36Z128VLH4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MKL36Z128VLH4?
For technical support, including MKL36Z128VLH4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MKL36Z128VLH4 requirements.
6.How does Aetrix verify that MKL36Z128VLH4 is sourced from the original manufacturer or authorized distributors?
All MKL36Z128VLH4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MKL36Z128VLH4 meets industry standards.
7.What is the process for return or replacement of MKL36Z128VLH4?
All MKL36Z128VLH4 units undergo pre-shipment inspection (PSI). If there is an issue with MKL36Z128VLH4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MKL36Z128VLH4 part is unused and in its original packaging.
Return procedure for MKL36Z128VLH4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MKL36Z128VLH4 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

