My Inquiry
My Account
onsemi MM74HC86M
- Part No.:
- MM74HC86M
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MM74HC86M.pdf
- Description:
- IC GATE XOR 4CH 2-INP 14SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,766
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MM74HC86M from onsemi is a quad 2-input exclusive-OR (XOR) gate IC in SOIC-14 package, operating from 2 V to 6 V supply, with typical propagation delay of 12 ns at 5 V and output drive capability of 10 LS-TTL loads. It implements A ⊕ B = AB + AB logic per gate and is used in digital arithmetic, error detection, and signal comparison circuits.
For engineers reviewing the MM74HC86M datasheet, pinout, applications, or equivalent options, key selection criteria include supply voltage range (2–6 V), propagation delay (≤30 ns over full temperature range), input/output voltage thresholds, fanout capability, and SOIC-14 mechanical compatibility.
Technical Context
The MM74HC86M integrates four independent XOR gates using silicon-gate CMOS technology, ensuring compatibility with both 74LS TTL logic levels and pinouts. Each gate features fully buffered outputs and internal diode clamps on all inputs for ESD protection.
It operates across –55 °C to +125 °C, supports CL = 50 pF load conditions, and maintains guaranteed VOH ≥ 4.4 V and VOL ≤ 0.4 V at VCC = 4.5 V with 4 mA output current - enabling robust interfacing in mixed-voltage digital systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input XOR (A ⊕ B = AB + AB), fully independent gates |
| Supply Voltage Range | 2 V to 6 V - supports battery-powered, 3.3 V, and 5 V logic systems |
| Propagation Delay | ≤30 ns at VCC = 6 V, TA = –55 °C to +125 °C, CL = 50 pF - ensures timing predictability in wide-temp environments |
| Output Drive | ±25 mA per pin - drives 10 LS-TTL loads without external buffering |
| Input Thresholds | VIH = 3.15 V, VIL = 1.35 V at VCC = 4.5 V - compatible with standard TTL input levels |
| Quiescent Current | ≤40 µA at VCC = 6 V, TA = –55 °C to +125 °C - enables low-power standby operation |
| ESD Protection | Internal diode clamps to VCC and GND - eliminates need for external transient suppression |
Pinout & Package
MM74HC86M is housed in a 14-pin SOIC-14 package (Case 751A-03), 8.75 mm × 3.95 mm body, 1.27 mm pitch, with gull-wing leads and Pb-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 4, 5, 8, 9, 12, 13 | Input (A/B) | Two inputs per XOR gate; all inputs have identical VIH/VIL thresholds and clamp protection |
| 3, 6, 10, 11 | Output (Y) | Active-high XOR result per gate; capable of sourcing/sinking ±25 mA |
| 7 | GND | Ground reference for all logic and power domains; must be low-impedance connection |
| 14 | VCC | Positive supply rail; decoupling capacitor (0.1 µF) required within 10 mm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| CMOS + TTL compatibility | Pin- and function-compatible with 74LS86; allows drop-in replacement in legacy TTL designs |
| Wide temperature operation | Specified from –55 °C to +125 °C - suitable for automotive under-hood and industrial control applications |
| Low dynamic power | CPD = 25 pF per gate - enables predictable power estimation (PD = CPD·VCC²·f + ICC·VCC) |
| Input noise immunity | High noise margin (>1.3 V at VCC = 4.5 V) due to rail-to-rail VIH/VIL separation |
| Pb-free & RoHS compliant | Meets EU RoHS Directive 2011/65/EU and halide-free packaging requirements |
Applications
| Parity Generator/Checker | Digital Comparator |
|---|---|
Use Scenario: Generating or verifying even/odd parity bits across 4-bit data buses in UART, SPI, or memory interfaces. IC Role / Device Role / Timing Role: Each XOR gate computes bit-wise XOR of two inputs; cascaded gates produce cumulative parity output. Use Value: Enables real-time error detection with <30 ns latency per stage and no external biasing or level-shifting components. | Use Scenario: Detecting equality between two 2-bit binary words in microcontroller peripheral handshaking or sensor data validation. IC Role / Device Role / Timing Role: Two XOR gates compare corresponding bits; NOR of outputs yields match signal. Use Value: Delivers sub-60 ns comparison time at 5 V with single-supply operation - eliminates need for discrete transistor logic. |
| Controlled Inverter | Pulse Width Modulation (PWM) Signal Mixing |
Use Scenario: Selectively inverting one data line based on a control signal in programmable I/O routing or test-mode logic. IC Role / Device Role / Timing Role: One input driven by data, other by enable/invert control; output toggles polarity when control is HIGH. Use Value: Provides deterministic inversion with 12 ns typical delay and rail-compatible thresholds - avoids timing skew in synchronous paths. | Use Scenario: Combining two PWM signals (e.g., motor phase A/B) to generate complementary edge-aligned waveforms in H-bridge drivers. IC Role / Device Role / Timing Role: XOR gate performs bitwise combination of synchronized PWM edges to produce phase-shifted outputs. Use Value: Achieves precise 50% duty cycle symmetry and <30 ns inter-channel skew - critical for minimizing shoot-through risk. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar XOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC86DR | Same logic function and AC/DC specs; TSSOP-14 package (4.4 mm × 5.0 mm), lower thermal resistance | Better suited for space-constrained PCBs; requires rework of footprint and solder profile | Select when board area is limited and thermal performance is prioritized over legacy SOIC compatibility |
| 74VHC86M | Higher speed (tPD ≤ 7.5 ns at 5 V), but narrower VCC range (2 V–5.5 V); same SOIC-14 pinout | Enables higher-frequency clock domain crossing; not rated for 6 V operation or extended temperature range | Choose for timing-critical 3.3 V/5 V systems where propagation delay dominates over voltage flexibility |
Compared with SN74HC86DR and 74VHC86M, the MM74HC86M offers the widest supply range (2–6 V) and highest temperature rating (–55 °C to +125 °C), making it optimal for industrial and automotive environments where voltage transients and ambient extremes are present.
Availability
MM74HC86M is available at Aetrix Electronics and suitable for industrial control panels, automotive body electronics, and legacy system upgrades requiring stable component supply and long-term manufacturability.
Supply support for MM74HC86M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The MM74HC86M belongs to the 74HC high-speed CMOS logic family, designed for direct replacement of bipolar TTL in cost-sensitive, low-power, and wide-temperature digital systems.
FAQ
What logic function does the MM74HC86M implement?
The MM74HC86M implements four independent 2-input exclusive-OR (XOR) gates, each computing Y = A ⊕ B = AB + AB. Its truth table delivers LOW output when inputs match and HIGH when they differ. This behavior is confirmed in the onsemi datasheet truth table and applies identically across all four gates in the MM74HC86M device.
What is the maximum operating temperature range for the MM74HC86M?
MM74HC86M is specified for operation from –55 °C to +125 °C, as defined in the Recommended Operating Conditions table of the onsemi datasheet. This extended range supports deployment in under-hood automotive modules, industrial PLCs, and outdoor equipment where ambient extremes occur.
Does the MM74HC86M require external pull-up or pull-down resistors on its inputs?
No, the MM74HC86M does not require external pull-up or pull-down resistors. Its CMOS inputs have high impedance and defined switching thresholds (VIH/VIL), and internal diode clamps provide ESD protection. Unused inputs should be tied to VCC or GND to prevent floating states - a design practice explicitly recommended in the onsemi datasheet for MM74HC86M stability.
Is the MM74HC86M pin-compatible with the 74LS86 TTL device?
Yes, the MM74HC86M is pin- and function-compatible with the 74LS86. The onsemi datasheet states "functionally as well as pin-out compatible with the standard 74LS logic family", and the pin assignments (e.g., VCC on pin 14, GND on pin 7, gate inputs/outputs mapped identically) confirm direct substitution without PCB modification for the MM74HC86M.
What is the typical propagation delay of the MM74HC86M at 5 V supply?
The typical propagation delay of the MM74HC86M is 12 ns at VCC = 5.0 V, CL = 15 pF, and tR/tF = 6 ns, as stated in the AC Characteristics table of the onsemi datasheet. This value is measured per gate and represents the average of tPHL and tPLH under those exact conditions.
MM74HC86M Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74HC
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Logic Type:
- XOR (Exclusive OR)
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 6V
- Current - Quiescent (Max):
- 2 µA
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Input Logic Level - Low:
- 0.5V ~ 1.8V
- Input Logic Level - High:
- 1.5V ~ 4.2V
- Max Propagation Delay @ V, Max CL:
- 20ns @ 6V, 50pF
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
MM74HC86M FAQ
1.How can I place an order for MM74HC86M through Aetrix?
Please submit a Request for Quotation (RFQ) for MM74HC86M on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MM74HC86M reliable?
The price and inventory of MM74HC86M are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MM74HC86M is usually 5 days.
3.What payment methods are accepted for MM74HC86M?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MM74HC86M transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MM74HC86M?
MM74HC86M orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MM74HC86M order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MM74HC86M?
For technical support, including MM74HC86M datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MM74HC86M requirements.
6.How does Aetrix verify that MM74HC86M is sourced from the original manufacturer or authorized distributors?
All MM74HC86M products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MM74HC86M meets industry standards.
7.What is the process for return or replacement of MM74HC86M?
All MM74HC86M units undergo pre-shipment inspection (PSI). If there is an issue with MM74HC86M, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MM74HC86M part is unused and in its original packaging.
Return procedure for MM74HC86M:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MM74HC86M Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
