onsemi MM80C98N

Overview

MM80C98N from Fairchild Semiconductor is a 3-STATE hex inverter IC with CMOS logic architecture, providing logical inversion and high-impedance output control for bus interfacing. It operates across 3.0V–15V supply, delivers 40 ns typical propagation delay into 150 pF at VCC = 10V, and supports TTL-compatible drive (1 TTL load). It is used in bidirectional data bus isolation and address/data line buffering in industrial control systems.

For engineers reviewing the MM80C98N datasheet, pinout, applications, or equivalent options, key selection criteria include its dual 3-STATE control structure (DIS1 for outputs 1–4, DIS2 for outputs 5–6), guaranteed 1.0V noise margin, −40°C to +85°C operating range, and PDIP-16 package compatibility with legacy through-hole designs.

Technical Context

The MM80C98N implements six independent CMOS inverters, each with active-low enable logic routed through two separate 3-STATE control inputs: DIS1 governs outputs Y1–Y4, DIS2 governs Y5–Y6. Its input protection includes diode clamps to VCC and GND, enabling robust ESD tolerance without external components.

It functions as a level-translating bus interface device-compatible with both CMOS and TTL logic families-supporting wide-voltage operation (3.0V–15V) and delivering ±20 mA output sink/source capability at VCC = 10V, with input thresholds scaling proportionally to VCC (e.g., VIN(1) = 0.7×VCC min).

Key Specifications

Pinout & Package

MM80C98N is housed in a 16-lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" wide, with 0.100" lead pitch and through-hole mounting compatibility.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar hex inverter with dual 3-STATE control applications.

Compared with CD40107BE and 74HC240N, the MM80C98N uniquely supports 3.0V–15V operation with dual independent 3-STATE controls and rail-scaled thresholds-making it the only option for mixed-voltage bus arbitration where supply headroom exceeds 6V and group-level isolation is required.

Availability

MM80C98N is available at Aetrix Electronics and suitable for industrial bus arbitration, legacy system data buffering, mixed-voltage sensor interface, and test equipment signal conditioning requiring stable component supply and long-lifecycle support.

Supply support for MM80C98N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Fairchild Semiconductor was a U.S.-based semiconductor company specializing in analog and discrete power products, acquired by ON Semiconductor in 2016.

The MM80C98N belongs to Fairchild's 80C-series radiation-tolerant CMOS logic family, designed for industrial and military-grade applications demanding wide supply range, high noise immunity, and extended temperature operation.

FAQ

What logic function does the MM80C98N implement?

The MM80C98N implements six independent CMOS inverters, each with active-high 3-STATE enable via two separate control inputs: DIS1 enables Y1–Y4, DIS2 enables Y5–Y6. Unlike non-inverting variants (e.g., MM80C95), the MM80C98N inverts input signals before presenting them at outputs, making it suitable for polarity-corrected bus driving. All logic thresholds scale with VCC, ensuring consistent behavior across its 3.0V–15V operating range.

Does the MM80C98N support TTL-level inputs?

Yes, the MM80C98N supports TTL-level inputs across its full supply range. At VCC = 4.75V, it guarantees VIN(0) ≤ 0.8V and VIN(1) ≥ VCC − 1.5V, meeting standard TTL thresholds. Its input clamps and rail-proportional design allow direct connection to 5V TTL outputs without level shifters, while still accepting CMOS inputs up to 15V. This dual compatibility is confirmed in the "TTL INTERFACE" section of the official Fairchild datasheet DS005907.

What is the maximum capacitive load the MM80C98N can drive reliably?

The MM80C98N is characterized for reliable operation with up to 150 pF capacitive load, exhibiting 40 ns typical propagation delay at VCC = 10V under that condition. Its output drive strength (±20 mA at VCC = 10V) supports heavier loads than standard TTL, but sustained operation beyond 150 pF may increase delay nonlinearly and risk timing violations in synchronous buses. For loads >150 pF, external series termination or buffer staging is recommended per Fairchild AN-90 guidance.

How does the dual 3-STATE control of the MM80C98N improve bus management?

The dual 3-STATE control (DIS1 for Y1–Y4, DIS2 for Y5–Y6) allows independent gating of two output subsets, enabling segmented bus arbitration-e.g., isolating address nibbles from data lines or separating control/status bits. This reduces bus contention windows and eliminates need for additional logic gates or multiplexers. In contrast, single-control hex buffers require full bus release even when only part of the data path needs isolation, increasing latency in multi-master systems.

Is the MM80C98N RoHS compliant?

The MM80C98N was manufactured prior to RoHS Directive enforcement (2006) and is not RoHS compliant. It contains lead in its PDIP package solder finish and die attach materials. For new designs requiring RoHS compliance, consider modern alternatives like SN74LVC240APWR (Pb-free SOIC) - though these lack the MM80C98N's 15V tolerance and dual DIS architecture. Legacy replacements must be sourced as exempt "existing use" components under EU Directive 2011/65/EU Annex III.