Monolithic Power Systems Inc. MP023GS-Z

Overview

MP023GS-Z from Monolithic Power Systems is a primary-side constant-current/constant-voltage (CC/CV) flyback controller for offline AC/DC power supplies, eliminating optocouplers and secondary feedback. It integrates a 700V high-voltage start-up current source, supports programmable cable compensation via CP pin, delivers ≤30mW no-load power consumption, and operates in discontinuous conduction mode (DCM) with variable off-time peak current control. It is used in low-power battery chargers and USB adapters requiring precise output regulation.

For engineers reviewing the MP023GS-Z datasheet, MP023GS-Z pinout, MP023GS-Z application, or MP023GS-Z equivalent, key selection criteria include its primary-side regulation architecture, 700V HV pin capability, programmable FB sampling timing, CS-based current limit configuration, and SOIC8-7A package compatibility with compact flyback designs.

Technical Context

The MP023GS-Z implements variable off-time peak current control to maintain DCM operation across load and line variations, using zero-current detection (ZCD) with 55–145mV threshold to ensure accurate cycle initiation. Its FB pin samples auxiliary winding voltage at programmable timing (tFBS-Min to tFBS-Max), enabling adaptive CV regulation under varying diode forward drop and cable loss.

Current limiting is set via CS pin resistor configuration, directly determining VLimit-Min (220–280mV) and VLimit-Max (464–496mV); secondary duty cycle (DS-Max) is selected by external resistor on CP pin (0.3–0.5), while cable compensation requires CP connected to 1µF capacitor - disabling DS-Max programming when active.

Key Specifications

Pinout & Package

MP023GS-Z is housed in a SOIC8-7A package - an industry-standard 8-pin surface-mount outline with 7 functional pins and 1 NC (pin 7). The package features gull-wing leads, 1.27mm pitch, and thermal pad omitted (θ_JA = 96°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar primary-side CC/CV flyback controller applications.

Compared with MP023GS-Z, MP021GS-Z offers lower system cost but forfeits cable compensation and DS-Max tuning, while INN3265C provides higher integration and safety features at the expense of SOIC8 compatibility and increased PCB area - making MP023GS-Z optimal for cost-sensitive, space-constrained 5–12W USB adapters requiring programmable compensation.

Availability

MP023GS-Z is available at Aetrix Electronics and suitable for USB wall chargers, smartphone fast charging adapters, appliance standby supplies, and IoT device auxiliary power requiring stable component supply, consistent parametric performance, and long-term production continuity.

Supply support for MP023GS-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP023 belongs to MPS's primary-side regulation controller product line, engineered specifically for low-power offline AC/DC converters where optocoupler elimination, ultra-low no-load power, and programmable cable compensation are critical design requirements.

FAQ

What is the purpose of the HV pin on the MP023GS-Z?

The HV pin connects directly to the rectified AC bus (up to 700V) and powers an internal high-voltage current source that charges the VCC capacitor during startup. This eliminates the need for an auxiliary winding during initial power-up, enabling faster start time and simplified transformer design in low-power adapters.

How does the MP023GS-Z achieve constant current regulation without secondary sensing?

It uses primary-side peak current modulation combined with programmable secondary duty cycle (DS-Max) and FB sampling timing. During CC mode, the IC fixes Ipk at VLimit-Max and regulates output current by controlling the secondary diode conduction time ratio, inferred from auxiliary winding voltage and timing - no secondary current sensor required.

Can the MP023GS-Z support both cable compensation and programmable DS-Max simultaneously?

No. When CP is connected to a 1µF capacitor for cable compensation, the internal cable compensation circuit activates and disables DS-Max programming. To configure DS-Max, CP must be connected via resistor only (e.g., 10kΩ for DS-Max = 0.3); capacitor connection forces default DS-Max = 0.4 and disables resistor-based configuration.

What is the minimum recommended FB resistor divider value for stable operation?

MPS specifies 10kΩ–100kΩ total divider resistance. Lower values increase noise susceptibility and substrate injection current; higher values degrade sampling accuracy. A 47kΩ upper + 47kΩ lower resistor pair (94kΩ total) is commonly used to balance noise immunity, power loss (<100µW), and FB input current error (<1.2µA).

Does the MP023GS-Z require an external ZCD winding on the transformer?

No. The MP023GS-Z detects zero-current condition internally using the FB pin signal - it monitors the auxiliary winding voltage decay after secondary diode turn-off. No separate ZCD winding or external circuit is needed, simplifying transformer design and reducing component count.

How is overload protection (OLP) triggered and recovered?

OLP activates when the sampled FB voltage remains below 1.38V for 128 consecutive switching cycles - indicating sustained overcurrent or short-circuit. The IC shuts down, enters hiccup mode (periodic restart attempts), and resumes normal operation only after FB voltage rises above the threshold for ≥128 cycles post-fault clearance.

What is the maximum allowable RCS value for FB sampling time configuration?

The datasheet specifies RCS up to 4kΩ for tFBS-Max = 9.20µs. Exceeding 4kΩ risks violating the minimum secondary on-time requirement (TS_ON > tFBS-Max + tFB_SD), potentially causing unstable CV regulation or premature OLP triggering due to insufficient sampling window.