Monolithic Power Systems Inc. MP100LGN

Overview

MP100LGN from Monolithic Power Systems is an inductor-less offline AC/DC regulator IC designed to generate a stable, adjustable DC bias voltage (1.5V–15V) directly from universal AC mains (85–305V_AC). It integrates a smart charging window control, internal LDO, active bleeder, and comprehensive protection (TSD, VD OVP, SCP, OLP), delivering <100mW standby power for low-power off-line systems.

For engineers reviewing the MP100LGN datasheet, MP100LGN pinout, MP100LGN application, or MP100LGN equivalent, this device is selected for ultra-low-BOM, compact wall-switch and wireless node power supplies where transformerless operation, EMI compliance with minimal external components, and thermal robustness are critical design constraints.

Technical Context

The MP100LGN employs a proprietary inductor-less topology that charges the VD capacitor only during precise low-voltage windows of the AC cycle (31.5–34V input threshold with 2.5V hysteresis), minimizing conduction loss and enabling <100mW no-load consumption. Its internal NMOS switch features controlled slew rates (130–200 μs/A) to meet conducted EMI standards using only a 220nF X-capacitor.

Regulation is achieved via a two-stage architecture: first, energy storage on VD (with 19–23V OVP clamp); second, an internal LDO stage (12V nominal, adjustable via FB pin) delivering up to 220mA output current with ±0.3% load regulation and 0.75V typical dropout. Power-good signaling (open-drain PG pin, 245μs delay, 1.12V threshold) confirms valid output startup.

Key Specifications

Pinout & Package

MP100LGN is housed in an SOIC-8 EP (exposed pad) package, where the exposed thermal pad must be soldered to a large GND copper area for effective heat dissipation (θ_JA = 50°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar offline inductor-less regulator applications.

Compared with MP101LGN, the MP100LGN trades 100mA output headroom for lower quiescent current and reduced thermal stress in sub-20mA applications; versus LNK3206P, it eliminates transformer cost and EMI filtering complexity but sacrifices galvanic isolation and high-current capability.

Availability

MP100LGN is available at Aetrix Electronics and suitable for smart wall switches, Zigbee/Z-Wave wireless modules, and AC/DC auxiliary supplies requiring stable component supply, long lifecycle support, and RoHS-compliant packaging.

Supply support for MP100LGN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over 20 years of leadership in DC/DC conversion, AC/DC regulation, and motor control solutions.

The MP100LGN belongs to MPS's EasyPower™ offline regulator product line, engineered specifically for ultra-compact, transformerless, low-power AC-mains applications where size, BOM cost, and standby efficiency are primary constraints.

FAQ

What is the minimum VD capacitance required for stable 12V/20mA operation?

A minimum 220μF/35V aluminum electrolytic capacitor is required on the VD pin for 12V/20mA operation with full-bridge rectification. This value ensures ≤3V ripple and sufficient energy storage across the 10ms discharge interval between AC peaks. Using a parallel 470pF ceramic capacitor further improves high-frequency stability.

Can MP100LGN operate with half-wave rectification?

Yes - MP100LGN supports both full-bridge and half-wave rectification. With half-wave input, the VD capacitor must be doubled (e.g., 470μF for 12V/20mA) to maintain equivalent energy delivery, as the charging interval extends to 20ms. Output power capability drops ~30% compared to full-bridge mode.

How does the active bleeder improve system reliability during power cycling?

The active bleeder pulls VIN toward GND when VD falls below 14.4V, discharging parasitic input capacitance. This ensures rapid VD recharge at next power-on, eliminating startup delays or failure-to-boot issues common in transformerless supplies with high-impedance AC sources or long cable runs.

Is the PG pin compatible with 3.3V logic microcontrollers?

Yes - the open-drain PG pin is rated for 14V maximum and requires an external pull-up resistor to VOUT (not VDD). When VOUT is 3.3V, use a 10kΩ pull-up to 3.3V; PG asserts high (≥0.7×VOUT) after 245μs once VOUT reaches 80% of its target, making it directly interfaceable with 3.3V GPIO inputs.

What PCB layout practices are critical for thermal performance?

The exposed thermal pad must be soldered to a ≥200mm² GND copper pour with ≥4 thermal vias (0.3mm diameter) connecting to inner/ground planes. VIN–VB–VD loop area must be minimized, and feedback resistors placed within 2mm of FB/GND pins. Deviation from the reference EVB layout increases θ_JA by >15°C.

Does MP100LGN support output voltages below 1.5V?

No - the internal reference and FB amplifier architecture limit the usable output range to 1.5V–15V. Attempting to set VOUT <1.5V causes instability due to insufficient headroom for the 1.235V reference and internal LDO dropout margin. For sub-1.5V rails, a secondary LDO downstream is required.

How does the slow-switching design affect surge immunity?

The controlled 130–200 μs/A slew rate reduces dI/dt-induced voltage spikes but necessitates external MOV protection (e.g., 275V_AC varistor) and a 20Ω fuse resistor to absorb line surges. Without these, fast transients can exceed the 700V absolute max VIN rating during the slow turn-off phase.