Monolithic Power Systems Inc. MP1038EM-LF

Overview

MP1038EM-LF from Monolithic Power Systems is a fixed-frequency full-bridge CCFL controller IC designed to drive cold cathode fluorescent lamps in LCD backlight systems using four external N-channel MOSFETs. It operates from 10V–32V DC input, delivers lamp current and voltage regulation, supports analog and burst-mode dimming (0–1.2V control range), and integrates open-lamp and secondary over-current protection with dual-mode fault timing. Used in desktop LCD monitors and flat-panel TVs.

For engineers reviewing the MP1038EM-LF datasheet, MP1038EM-LF pinout, MP1038EM-LF application, or MP1038EM-LF equivalent, key selection considerations include its TSSOP28 package, 60kHz typical operating frequency, 1.2V fault threshold on SI/LV/FT pins, soft-on/soft-off burst envelope, and compatibility with unregulated DC supplies for high-efficiency CCFL ignition and sustain.

Technical Context

The MP1038 implements a full-bridge topology with independent gate drive outputs (UGL/UGR/LGL/LGR) and bootstrap bias (BTL/BTR) to control four external N-MOSFETs. Its lamp clock is set by an external resistor on LCS (50kHz typical with 100kΩ), and startup includes frequency sweep up to 140% of nominal to ensure reliable CCFL ignition at varying temperatures.

Fault management uses dedicated analog inputs: SI (secondary peak current detection), LV (open-lamp voltage sensing via capacitive divider), and LI (lamp RMS current feedback). The FT pin hosts a dual-mode timer-charged by 1µA for open-lamp faults or 55µA for secondary over-current-with timeout programmable via external capacitor.

Key Specifications

Pinout & Package

The MP1038EM-LF is housed in a lead-free, RoHS-compliant TSSOP28 package (4.4mm × 9.7mm, 0.65mm pitch) with thermal pad option. Pin numbering follows standard JEDEC TSSOP convention, with Pin 1 at top-left corner marked by dot or bevel.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CCFL controller applications.

Compared with MP1038EM-LF, MP1029EK-LF reduces component count for basic half-bridge inverters but sacrifices lamp count scalability and ignition robustness, while MAX8752ESE+ trades flexibility in dimming and fault timing for integration density and ease of layout.

Availability

MP1038EM-LF is available at Aetrix Electronics and suitable for desktop LCD monitors, flat-panel video displays, and LCD TVs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MP1038EM-LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP1038 belongs to MPS's CCFL backlight controller product line, engineered specifically for high-efficiency, low-noise LCD panel backlighting with emphasis on lamp ignition reliability, multi-mode dimming, and comprehensive fault protection.

FAQ

What is the function of the LCS pin on MP1038EM-LF?

The LCS (Lamp Clock Set) pin sets the nominal operating frequency via an external resistor to AG. With R3 = 100kΩ, the typical frequency is 50kHz. This resistor determines the base switching rate before startup sweep and during steady-state operation, directly impacting transformer size and EMI profile.

How does the MP1038EM-LF handle open-lamp detection?

Open-lamp detection occurs via the LV pin, which connects to a capacitive voltage divider across the lamp's hot end. When lamp voltage exceeds 1.15–1.25V (typical 1.20V), a current pulse pulls down the COMP pin and injects 1µA into the FT capacitor. If FT voltage reaches 1.2V, the IC shuts down and requires re-enable via ENSYNC.

Can MP1038EM-LF operate with both analog and burst dimming simultaneously?

Yes. Connecting valid 0–1.2V signals to both ABRT (analog) and DBRT (burst) pins enables combined dimming, achieving up to 30:1 total range as specified in Table 1. The analog path controls RMS lamp current while burst modulates envelope duty cycle - their effects are multiplicative and independent.

What is the purpose of the LOK pin, and how should it be interfaced?

The LOK (Lamp OK) pin is an open-drain flag that remains high during normal operation and pulls low only during active fault conditions (open lamp or secondary over-current). It requires an external pull-up resistor (≥10kΩ) to logic-high voltage and provides real-time system-level lamp status for host microcontroller monitoring or safety interlocks.

Why must VCCR and VCCL be connected together in the MP1038EM-LF circuit?

VCCR and VCCL are internally separate 6V bias rails for left/right half-bridges but must be externally tied together and connected to ENSYNC via R10/D1 (per Figure 1) to ensure proper startup sequencing and stable gate drive during enable transitions. Omitting this connection causes erratic behavior, failed startup, or asymmetric bridge operation due to rail imbalance.

Does MP1038EM-LF support synchronization to external display timing signals?

Yes. Applying a 1–10µs falling-edge pulse at the desired burst repetition rate (e.g., 200Hz) to the ENSYNC pin synchronizes the internal burst oscillator. Once aligned, each burst starts precisely at the falling edge of the sync pulse - eliminating beat frequencies and scan-line interference in video applications.