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Monolithic Power Systems Inc. MP111DS-LF
- Part No.:
- MP111DS-LF
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- Specialized ICs
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MP111DS-LF.pdf
- Description:
- IC STORAGE CAP CONTROL 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,721
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Product details
Overview
MP111DS-LF from Monolithic Power Systems is a dedicated dying gasp storage and release control IC for telecom power backup systems. It charges an external storage capacitor during normal operation (4.5–18 V input), holds voltage up to 32 V, and dumps up to 2.5 A into VIN when input drops below user-programmed release threshold-enabling sustained operation during AC loss in DSL/PON modems and home gateways.
For engineers reviewing the MP111DS-LF datasheet, MP111DS-LF pinout, MP111DS-LF application, or MP111DS-LF equivalent, this device requires precise resistor programming for storage (VSTRG) and release (VRELEASE) voltages, supports SOIC-8 layout with BST/SW node coupling, and delivers deterministic hold-up time based on CSTRG, IRELEASE, and ΔV (VSTRG − VRELEASE).
Technical Context
The MP111DS-LF integrates a bootstrap-controlled charge pump for high-voltage storage capacitor charging and a regulated dump path with 2.5 A current limit. Its dual feedback architecture uses FB1 (for VSTRG regulation) and FB2 (for VRELEASE detection) with independent hysteresis (50 mV for FB1, 350 mV for VIN UVLO) to prevent chatter during brownout transitions.
It features an open-drain GASP flag that asserts low when VIN falls below VRELEASE × 1.00×VFB2 and deasserts high when VIN rises above VRELEASE × 1.05×VFB2, providing clean system-level power-fail signaling with 2 μs delay. Internal thermal shutdown (150°C, 30°C hysteresis) and 250 mA precharge current limiting ensure robust start-up under high-CSTRG conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - Supports wide-range DC inputs common in telecom power supplies (e.g., 12 V PON, 5 V/9 V adapters). |
| Storage Voltage Range | VIN to 2×VIN−0.8 V (max 32 V) - Enables energy-efficient high-voltage storage to minimize required capacitance (e.g., 23 V at 12 V input). |
| Dump Current Limit | 2.5 A - Sustains ≥1 A load for >20 ms with 2000 µF storage cap (ΔV = 10 V), meeting GR-909/ETSI dying gasp timing requirements. |
| Precharge Current Limit | 250 mA - Limits inrush during initial CSTRG charging, preventing input rail collapse and enabling use with small input bulk caps. |
| Feedback Reference Voltage | 1.0 V (±5%) - Sets precision of programmable VSTRG/VRELEASE via resistor dividers; enables <±1% voltage accuracy with 0.1% resistors. |
| GASP Response Delay | 2 µs - Provides fast, deterministic power-fail assertion for real-time firmware response (e.g., graceful shutdown or status upload). |
| Operating Junction Temp | −40°C to +125°C - Qualified for industrial and outdoor telecom equipment environments without derating. |
Pinout & Package
MP111DS-LF is housed in a standard SOIC-8 package (5.0 mm × 6.2 mm, 1.27 mm pitch) with exposed pad not present; RoHS-compliant, halogen-free, and lead-free per MPS green policy.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - BST | Bootstrap driver output | Connects via RC network to DC/DC switch node (SW) to generate boosted gate drive for internal charge pump; critical for VSTRG > VIN operation. |
| 2 - VIN | Main supply input | 4.5–18 V primary rail; powers internal circuitry and serves as dump target; requires local 22 µF decoupling. |
| 3 - FB2 | Release voltage sense input | Monitors VIN via resistor divider to trigger dump when voltage falls below programmed VRELEASE; hysteresis prevents oscillation. |
| 4 - GND | Analog/digital ground reference | System return for all feedback paths and internal regulators; must be low-impedance plane with multiple vias to minimize noise coupling. |
| 5 - FB1 | Storage voltage sense input | Sets target VSTRG via resistor divider; regulates storage cap voltage during refresh cycles; ±50 mV hysteresis ensures stable hold. |
| 6 - GASP | Open-drain power-fail indicator | Asserts low when VRELEASE threshold breached; pulled high externally (e.g., 10 kΩ to VIN); provides TTL/CMOS-compatible signaling. |
| 7 - STRG | Storage capacitor connection | Direct high-current path to external electrolytic cap (e.g., 2000 µF/25 V); trace must be short/wide to minimize ESR-induced voltage drop. |
| 8 - VMAX | Internal LDO supply | Requires 2.2 nF ceramic decoupling; powers internal logic and gate drivers; isolated from VIN to avoid noise injection. |
Key Features
| Feature | Design Value |
|---|---|
| User-programmable storage voltage | VSTRG set by FB1 resistor divider (e.g., 23 V using R1=845 kΩ, R2=37.4 kΩ); enables optimal energy density and reduced capacitor size. |
| Programmable release voltage with hysteresis | VRELEASE set by FB2 divider (e.g., 10.2 V using R3=464 kΩ, R4=49.9 kΩ); 350 mV UVLO hysteresis prevents false triggering during line sag. |
| Integrated 250 mA precharge limiter | Eliminates need for external inrush limiting components; allows safe charging of large storage capacitors (≥1000 µF) from cold start. |
| 2.5 A regulated dump path | Delivers consistent current into VIN during brownout, extending hold-up time predictably without overloading downstream converters. |
| Dying gasp flag with 2 µs delay | GASP pin provides sub-microsecond power-fail notification to MCU/ASIC, enabling deterministic firmware response before voltage collapse. |
Applications
| Cable Modem Dying Gasp | PON Optical Network Terminal |
|---|---|
Use Scenario: Maintains Ethernet link and DOCSIS registration during brief AC outage (≤100 ms) in HFC networks. IC Role / Device Role / Timing Role: Storage/release controller managing energy transfer from high-voltage cap to 12 V rail; provides precise VRELEASE-triggered dump timing. Use Value: Enables compliance with SCTE-174 and CableLabs® CM-SP-PNMv3.1 hold-up requirements (≥20 ms at full load) using minimal board space. |
Use Scenario: Sustains GPON/EPON optical burst transmission and management traffic during utility power interruption in fiber access nodes. IC Role / Device Role / Timing Role: Dying gasp supervisor coordinating with DC/DC converter SW node via BST pin to regulate 5 V/3.3 V rails during brownout. Use Value: Achieves >30 ms hold-up at 1 A load with 23 V/2000 µF storage, satisfying ITU-T G.984.3/G.987.3 power failure resilience mandates. |
| Home Gateway Power Backup | DSLAM Line Card Hold-Up |
Use Scenario: Preserves Wi-Fi routing state, VoIP call continuity, and cloud sync during momentary grid dips in residential gateways. IC Role / Device Role / Timing Role: Dual-feedback controller setting VSTRG = 20 V and VRELEASE = 9.0 V to maximize energy utilization across varying input conditions. Use Value: Reduces required storage capacitance by 40% vs. 12 V-only solutions, lowering BOM cost and footprint while meeting FCC Part 15 Class B immunity. |
Use Scenario: Prevents line card reset and maintains ADSL2+/VDSL2 synchronization during transient power loss in central office DSLAMs. IC Role / Device Role / Timing Role: High-reliability backup manager interfacing with -48 V DC plant via isolated DC/DC; uses GASP to signal upstream OAM systems. Use Value: Delivers 2.5 A dump current into -48 V derived 12 V rail with <1% voltage droop, ensuring uninterrupted G.992.5 vectoring and bonding. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dying gasp control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ111DS-AEC1-LF-Z | Automotive-grade variant (AEC-Q100 Grade 1); identical electrical specs but qualified for −40°C to +125°C ambient with enhanced ESD (±8 kV HBM). | Required for automotive telematics gateways; not rated for telecom surge immunity (IEC 61000-4-5 Level 3). | Select only if automotive qualification and extended temperature validation are mandatory; otherwise, MP111DS-LF offers lower cost and telecom-optimized layout. |
| TPS6521905RGER | TI integrated PMIC with dying gasp function; includes buck/boost converters and I²C interface; no external BST/SW coupling needed. | Targets space-constrained single-chip designs; lacks programmable VSTRG > 2×VIN and 2.5 A dump capability. | Choose when system integration (power + control) outweighs flexibility; MP111DS-LF preferred for discrete, high-current, high-voltage storage architectures. |
Compared with MPQ111DS-AEC1-LF-Z and TPS6521905RGER, the MP111DS-LF delivers superior high-voltage storage (up to 32 V), higher dump current (2.5 A vs. ≤1.5 A), and simpler resistor-based programming-making it optimal for cost-sensitive, high-reliability telecom infrastructure where discrete control and scalability matter.
Availability
MP111DS-LF is available at Aetrix Electronics and suitable for cable modem dying gasp, PON ONU hold-up, and home gateway backup applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for MP111DS-LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP111 belongs to MPS's Telecom Power Management product line, engineered specifically for reliable, programmable dying gasp functionality in broadband access equipment-prioritizing precision voltage regulation, high-current dump capability, and minimal external component count.
FAQ
What is the maximum storage capacitor voltage the MP111DS-LF can manage?
The MP111DS-LF supports storage capacitor voltages up to 32 V, as specified in its absolute maximum ratings for VSTRG. This allows operation with VSTRG set to 2×VIN − 0.8 V (e.g., 23 V at 12 V input), enabling efficient energy storage and reduced capacitance requirements compared to 12 V-only solutions.
How does the BST pin interface with the DC/DC converter?
The BST pin connects via a series resistor and small ceramic capacitor to the DC/DC converter's switch node (SW). This bootstrap configuration generates the gate drive voltage needed to operate the internal charge pump for VSTRG > VIN. The MP111DS-LF only begins boosting after the DC/DC converter is enabled and SW is active.
Can the MP111DS-LF be used with non-electrolytic storage capacitors?
Yes, but electrolytic capacitors are strongly recommended due to their high volumetric efficiency and cost-effectiveness for the required capacitance (typically 1000–2700 µF). Polymer or tantalum caps may be used if low ESR and long life are critical, but their voltage derating and cost make them less practical for telecom hold-up applications.
What is the purpose of the VMAX pin and its required capacitor?
VMAX supplies the internal LDO that powers the MP111DS-LF's logic and gate drivers. A 2.2 nF ceramic capacitor must be placed directly between VMAX and GND to filter high-frequency noise and stabilize the internal supply-omitting or undersizing this capacitor causes erratic operation and premature thermal shutdown.
How is the GASP flag synchronized to input voltage transitions?
The GASP flag responds to FB2 voltage thresholds: it pulls low when FB2 falls below 1.00×VFB2 (indicating VIN < VRELEASE), and releases high when FB2 rises above 1.05×VFB2 (indicating VIN > VRELEASE + hysteresis). This 5% hysteresis prevents chatter during slow input sags, and the 2 µs propagation delay ensures deterministic timing for firmware response.
Does the MP111DS-LF require external compensation components?
No external compensation is required for basic operation. The MP111DS-LF's internal control loop is factory-tuned for stability with standard external components (e.g., 15 pF on FB2, 2.2 nF on VMAX). Only layout best practices-short FB traces, low-ESR input caps, and wide STRG routing-are needed to ensure robust performance.
What happens if the storage capacitor voltage exceeds the programmed VSTRG during normal operation?
The MP111DS-LF actively regulates VSTRG by disabling the charge pump when the FB1-sensed voltage reaches the programmed threshold (e.g., 23 V). If VSTRG drifts above this value due to leakage or measurement error, the device enters refresh mode-briefly reactivating the charge pump to correct minor deviations-ensuring tight long-term voltage hold within ±1%.
MP111DS-LF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Storage Capacitor Control IC
- Applications:
- Cable/DSL/PON Modems
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
- Grade:
- -
- Qualification:
- -
MP111DS-LF FAQ
1.How can I place an order for MP111DS-LF through Aetrix?
Please submit a Request for Quotation (RFQ) for MP111DS-LF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP111DS-LF reliable?
The price and inventory of MP111DS-LF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP111DS-LF is usually 5 days.
3.What payment methods are accepted for MP111DS-LF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP111DS-LF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP111DS-LF?
MP111DS-LF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP111DS-LF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP111DS-LF?
For technical support, including MP111DS-LF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP111DS-LF requirements.
6.How does Aetrix verify that MP111DS-LF is sourced from the original manufacturer or authorized distributors?
All MP111DS-LF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP111DS-LF meets industry standards.
7.What is the process for return or replacement of MP111DS-LF?
All MP111DS-LF units undergo pre-shipment inspection (PSI). If there is an issue with MP111DS-LF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP111DS-LF part is unused and in its original packaging.
Return procedure for MP111DS-LF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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