Monolithic Power Systems Inc. MP171AGJ-P

Overview

MP171AGJ-P from Monolithic Power Systems is a 700V primary-side constant-voltage offline regulator with integrated MOSFET, supporting buck/boost/buck-boost/flyback topologies in non-isolated AC/DC power supplies. It delivers up to 60mA output current in CCM, achieves <30mW no-load consumption, and features green-mode operation with frequency foldback and peak current compression for high light-load efficiency. It targets standby and low-power auxiliary rails in home appliances and industrial controls.

For engineers reviewing the MP171AGJ-P datasheet, MP171AGJ-P pinout, MP171AGJ-P application, or MP171AGJ-P equivalent, key selection criteria include its 700V drain rating, TSOT23-5 package constraints, primary-side CV regulation without optocoupler, VCC UVLO thresholds (5.1–5.8V), and integrated protection suite (TSD, OLP, SCP, open-loop detection).

Technical Context

The MP171AGJ-P operates in discontinuous conduction mode (DCM) up to 40mA and continuous conduction mode (CCM) up to 60mA, with a maximum output power of 2W. Its internal 700V MOSFET (RON = 20–25Ω, V(BR)DSS = 700V) eliminates external HV switching components, while primary-side feedback via FB pin (2.45–2.65V threshold) enables optocoupler-free regulation.

Green-mode control dynamically reduces switching frequency and peak current under light load: frequency foldback lowers fSW below 36kHz, and peak current compression scales ILIMIT down from 105mA, enabling sub-30mW no-load consumption. Protection logic includes auto-restart OLP (175ms delay), SCP (220–400mA threshold), thermal shutdown at 150°C with 30°C hysteresis, and open-loop detection at VFB < 0.4–0.6V.

Key Specifications

Pinout & Package

MP171AGJ-P is housed in a 5-pin TSOT23-5 package with exposed drain pad for thermal enhancement. Pin 1 is DRAIN (HV MOSFET drain), Pin 2 is VCC (internal regulator supply), Pin 3/4 are SOURCE (MOSFET source, ground reference), and Pin 5 is FB (feedback input). Pins 3 and 4 are internally bonded together and must be connected to system ground.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar primary-side offline regulator applications.

Compared with MP171AGJ-P, MP172AGJ-Z offers superior surge immunity at minor efficiency cost, while LNK3206G trades no-load performance for predictable EMI-making MP171AGJ-P optimal for cost-sensitive, regulation-driven consumer standby supplies.

Availability

MP171AGJ-P is available at Aetrix Electronics and suitable for home appliance standby power, industrial sensor node PSUs, and IoT gateway auxiliary rails requiring stable component supply, RoHS-compliant packaging, and long-lifecycle support.

Supply support for MP171AGJ-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design centers in the US, China, and Taiwan.

The MP171A product line delivers primary-side regulated offline controllers targeting ultra-low-noise, low-BOM-count auxiliary power supplies for consumer and industrial equipment where optocoupler elimination and standby efficiency are critical.

FAQ

What is the maximum continuous output power achievable with MP171AGJ-P in TSOT23-5 package?

The MP171AGJ-P supports up to 2W continuous output power in CCM operation. This is constrained by thermal limits: with θJA = 100°C/W and TJ(MAX) = 150°C, the 1W package power dissipation limit (per ABS MAX table) allows safe 2W output only with adequate PCB copper area and airflow. Derating is required above 70°C ambient.

Can MP171AGJ-P operate in flyback topology with primary-side regulation?

Yes, MP171AGJ-P supports flyback topology with primary-side regulation using indirect feedback. The device samples output voltage via an auxiliary winding and RC network connected to FB pin, eliminating optocoupler need. Design requires careful turns ratio selection to ensure FB voltage stays within 0.4–2.65V range across line/load conditions.

How does the open-loop detection feature function, and what triggers it?

Open-loop detection activates when FB voltage falls below 0.4–0.6V (VOLD), indicating loss of feedback signal-e.g., open feedback resistor or disconnected output. The IC stops switching and enters auto-restart mode, discharging VCC to VCCPRO (2.0–2.8V) before attempting restart. Blanking during first 512 cycles prevents false trips during startup with large output capacitors.

What is the purpose of the two-phase soft-start sequence, and how long does it last?

The two-phase soft-start limits minimum off time (tMINOFF) to prevent inductor current overshoot at startup. Phase 1 holds tMINOFF at 48μs for 256 cycles; Phase 2 reduces it to 18μs for another 256 cycles, then settles to normal 10μs limit. Total duration is ~512 switching cycles-approximately 14ms at 36kHz-ensuring controlled ramp-up without output overshoot.

Is an external VCC supply required when output voltage exceeds 7V?

An external VCC supply is recommended-not required-when VOUT > 7V to maintain <30mW no-load consumption. At higher outputs, internal VCC regulation draws more current from DRAIN, increasing no-load losses. Adding an auxiliary VCC derived from output (via resistor/Zener) reduces total no-load power by bypassing the internal HV regulator.

How does leading-edge blanking (LEB) improve reliability in boost and flyback configurations?

LEB disables the current comparator for 350ns after MOSFET turn-on, suppressing false SCP trips caused by parasitic ringing and freewheeling diode reverse-recovery spikes. This is critical in boost/flyback where high dv/dt at DRAIN induces noise on the current-sense path; LEB ensures only true overcurrent events trigger protection.

What PCB layout practices are essential to meet EMI requirements with MP171AGJ-P?

Minimize high-di/dt loop area (DRAIN–SOURCE–inductor–diode), place FB capacitor (22nF) directly between FB and SOURCE pins, connect exposed DRAIN pad to large copper pour, and add 220–470pF capacitor from FB to SOURCE near IC. These reduce radiated emissions and stabilize feedback against noise coupling-key for passing CISPR-22 Class B.