My Inquiry
My Account
Monolithic Power Systems Inc. MP18831-A4CGY-P
- Part No.:
- MP18831-A4CGY-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
MP18831-A4CGY-P.pdf
- Description:
- DGTL ISO 5KV 2CH GATE DVR 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:233
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MP18831-A4CGY-P from Monolithic Power Systems is an isolated dual-input high-side/low-side half-bridge gate driver with 4A peak source/sink current, 50ns typical propagation delay, and >100kV/µs CMTI. It features configurable dead time via external resistor, dual independent input control (INA/INB), and 5kVRMS isolation in SOIC-16 WB package-designed for robust switching in isolated DC/DC converters.
For engineers reviewing the MP18831-A4CGY-P datasheet, MP18831-A4CGY-P pinout, MP18831-A4CGY-P application, or MP18831-A4CGY-P equivalent, this device delivers precise timing control, shoot-through prevention via overlap protection, and compatibility with 3.3V/5V controllers and up to 30V secondary-side supplies in high-noise industrial power systems.
Technical Context
The MP18831-A4CGY-P implements capacitive-based galvanic isolation between primary and secondary sides, enabling reinforced insulation (5kVRMS per UL 1577) and functional isolation of ±1500V between its two output channels. Its dual-channel architecture supports independent HS/LS control with separate VDDA/VSSA and VDDB/VSSB rails, allowing asymmetric supply configurations.
Dead time is externally set via a resistor on the DT pin (2–150kΩ), yielding programmable delays from 10ns to 1.1µs with <10ns matching error. Input logic accepts TTL/CMOS levels (1.6V high threshold, 1.2V low threshold), and UVLO thresholds are fixed at 3V (A-grade) on both secondary-side supplies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5kVRMS withstand voltage (UL 1577, 60s), SOIC-16 WB package - enables reinforced insulation in AC/DC and DC/DC safety-critical designs. |
| Peak Output Current | 4A source / 4A sink - drives high-Qg MOSFETs and SiC switches with fast Miller plateau transition capability. |
| Propagation Delay | 50ns typical (35–65ns max) - ensures tight timing alignment between HS/LS signals for high-frequency bridge operation. |
| CMTI | >100kV/µs - maintains signal integrity during fast dV/dt transients across isolation barrier in hard-switching topologies. |
| VDDI Range | 2.8V to 5.5V - interoperates directly with 3.3V microcontrollers and 5V FPGA I/O without level-shifting. |
| VDDA/VDDB Range | 4.2V to 30V with 3V UVLO - supports wide-range gate drive voltages including 12V and 15V for SiC/GaN enhancement-mode devices. |
| Operating Temp | −40°C to +125°C junction - qualified for under-hood automotive and industrial ambient environments. |
Pinout & Package
MP18831-A4CGY-P is supplied in SOIC-16 wide-body (WB) package with 1.27mm pitch, 10.3mm × 7.5mm footprint, and creepage/clearance ≥8mm between primary and secondary sides per IEC 60664-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | INA, INB | Independent non-inverting logic inputs for HS and LS drivers; TTL/CMOS-compatible with internal 200kΩ pull-down. |
| 3, 8 | VDDI | Primary-side supply (2.8–5.5V); internally shorted pins require local 0.1µF ceramic decoupling to GNDI. |
| 4 | GNDI | Input-side reference ground for all control signals and internal logic; must be separated from output grounds. |
| 5 | EN | Active-high enable; pulled high internally - tie low to disable outputs and reduce quiescent current to 1.3mA. |
| 6 | DT | Dead time configuration node; connect 2–150kΩ resistor to GNDI to set delay (10ns–1.1µs), with optional 220pF noise filter. |
| 9, 10, 11 | VSSB, OUTB, VDDB | LS driver ground, gate output, and supply rail - forms isolated secondary-side channel B with 30V max VDDB–VSSB. |
| 14, 15, 16 | VSSA, OUTA, VDDA | HS driver ground, gate output, and supply rail - forms isolated secondary-side channel A, fully independent from channel B. |
Key Features
| Feature | Design Value |
|---|---|
| Configurable dead time | 10ns to 1.1µs via single external resistor - eliminates need for external logic or timers to prevent shoot-through. |
| Overlap protection | Hardware-enforced interlock between INA/INB transitions - guarantees zero simultaneous HS/LS conduction regardless of input timing skew. |
| Dual independent secondary supplies | VDDA/VSSA and VDDB/VSSB support asymmetric gate drive (e.g., 15V HS, 12V LS) and floating topology integration. |
| High CMTI & isolation | >100kV/µs transient immunity and 5kVRMS isolation - sustains reliable operation in 650V+ bus applications with fast SiC switching. |
| UVLO with hysteresis | 3V threshold (±0.5V hysteresis) on both VDDA and VDDB - prevents partial turn-on during brownout conditions. |
Applications
| Isolated DC/DC Converters | Offline AC/DC Power Supplies |
|---|---|
|
Use Scenario: 1kW LLC resonant converter with primary-side SiC half-bridge and secondary-side synchronous rectification. IC Role / Device Role / Timing Role: Isolated gate driver controlling high-side and low-side SiC MOSFETs in primary half-bridge, synchronized to ZVS timing. Use Value: 50ns propagation delay and <6ns pulse-width distortion preserve ZVS window; 5kVRMS isolation meets IEC 62368-1 reinforced insulation requirements. |
Use Scenario: 3.3kW telecom rectifier using phase-shifted full-bridge topology with 100kHz switching. IC Role / Device Role / Timing Role: Dual-channel isolated driver operating HS/LS legs with independent VDDA/VDDB rails to accommodate asymmetrical gate drive needs. Use Value: Configurable dead time (via 22kΩ DT resistor) sets 180ns minimum off-time to avoid cross-conduction; >100kV/µs CMTI rejects EMI from transformer leakage spikes. |
| Motor Drive Inverters | Renewable Energy Inverters |
|
Use Scenario: 7.5kW servo drive inverter stage with three-phase IGBT half-bridges and optical encoder feedback loop. IC Role / Device Role / Timing Role: Gate driver for each phase leg's HS/LS IGBTs, referenced to isolated DC-link potentials and controlled by PWM from isolated MCU. Use Value: −40°C to +125°C operation supports sealed motor enclosure environments; 4A peak current ensures fast IGBT turn-on with <100ns rise time into 10nF load. |
Use Scenario: 15kW string solar inverter using dual interleaved full-bridge stages feeding grid-tie transformer. IC Role / Device Role / Timing Role: Isolated half-bridge driver for high-voltage DC-link switching, interfacing with isolated DSP controller via optocoupler-free digital interface. Use Value: SOIC-16 WB package provides 8mm creepage for 1000VDC PV string compliance; 3V UVLO prevents erratic switching during low-light startup. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si823H4BD-IS | 4A peak current, 60ns propagation delay, 5kVRMS isolation, but only single-input (PWM/EN) control - no independent INA/INB. | Lacks dual-input flexibility; requires external logic for dead time generation and overlap protection. | Select when system uses centralized PWM generation and does not require per-leg independent control. |
| ADuM4223BRIZ-RL | 4A peak current, 55ns propagation delay, 5kVRMS isolation, but fixed 100ns dead time - no external configurability. | Fixed dead time limits optimization for varying switch characteristics; no DT pin for tuning. | Select when design prioritizes simplicity over timing precision and operates within fixed 100ns dead time constraints. |
Compared with Si823H4BD-IS and ADuM4223BRIZ-RL, MP18831-A4CGY-P uniquely combines independent dual-input control, externally adjustable dead time, and hardware overlap protection - enabling direct replacement of discrete opto-MOSFET driver pairs while reducing BOM count and layout complexity in high-reliability power converters.
Availability
MP18831-A4CGY-P is available at Aetrix Electronics and suitable for isolated DC/DC converters, offline AC/DC power supplies, and motor drive inverters requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial OEM programs.
Supply support for MP18831-A4CGY-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over 20 years of expertise in DC/DC conversion, gate driving, and isolated control solutions.
The MP18831 product line delivers integrated isolated gate drivers targeting high-efficiency, high-density power conversion systems-including server PSUs, telecom rectifiers, and EV charging infrastructure-where reliability under fast dV/dt and thermal stress is critical.
FAQ
What is the isolation voltage rating for MP18831-A4CGY-P?
The MP18831-A4CGY-P is certified to 5kVRMS isolation (UL 1577, 60 seconds) in the SOIC-16 WB package, with 6000VPK transient isolation and 4242VPK working voltage per DIN EN IEC 60747-17. This qualifies it for reinforced insulation in 1000VAC mains-connected equipment.
Does MP18831-A4CGY-P support independent high-side and low-side supply voltages?
Yes - it provides fully independent secondary-side power domains: VDDA/VSSA for channel A and VDDB/VSSB for channel B, each supporting 4.2V–30V with individual 3V UVLO. This enables asymmetric gate drive (e.g., 15V HS, 10V LS) and floating half-bridge configurations.
How is dead time configured on MP18831-A4CGY-P?
Dead time is set by connecting a resistor (2kΩ–150kΩ) between the DT pin and GNDI. A 22kΩ resistor yields ~180ns typical dead time. Adding a ≥220pF ceramic capacitor in parallel improves noise immunity without affecting nominal delay value.
What logic families are compatible with the INA and INB inputs?
INA and INB accept standard TTL/CMOS logic levels: VIH = 1.6–1.8V min, VIL = 1.0–1.2V max, with 400mV hysteresis. Each pin has an internal 200kΩ pull-down, so unused inputs should be tied to GNDI to prevent floating states.
Can MP18831-A4CGY-P drive SiC MOSFETs effectively?
Yes - its 4A peak source/sink current, 10–20ns rise/fall times (with 1.8nF load), and >100kV/µs CMTI make it suitable for driving medium-power SiC MOSFETs (Qg ≤ 50nC) in hard-switched topologies up to 200kHz, provided gate resistors are optimized for dv/dt control.
What is the minimum recommended PCB creepage for MP18831-A4CGY-P?
The SOIC-16 WB package requires ≥8mm creepage distance between primary-side (pins 1–8) and secondary-side (pins 9–16) copper traces per IEC 60664-1. Recommended land pattern follows MPS AN-127 guidelines to maintain safety margins under pollution degree 2 conditions.
Is there a version of MP18831 with different UVLO thresholds?
Yes - the "A" suffix denotes 3V UVLO on secondary supplies (VDDA/VDDB). Other variants include "B" (5V), "C" (8V), "D" (10V), and "E" (12V) UVLO options. All share identical pinout, timing, and isolation specs - only UVLO thresholds differ.
MP18831-A4CGY-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 65ns, 65ns
- Pulse Width Distortion (Max):
- 6ns
- Rise / Fall Time (Typ):
- 10ns, 10ns
- Current - Output High, Low:
- 4A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 0V ~ 30V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, UL, VDE
MP18831-A4CGY-P FAQ
1.How can I place an order for MP18831-A4CGY-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP18831-A4CGY-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP18831-A4CGY-P reliable?
The price and inventory of MP18831-A4CGY-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP18831-A4CGY-P is usually 5 days.
3.What payment methods are accepted for MP18831-A4CGY-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP18831-A4CGY-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP18831-A4CGY-P?
MP18831-A4CGY-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP18831-A4CGY-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP18831-A4CGY-P?
For technical support, including MP18831-A4CGY-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP18831-A4CGY-P requirements.
6.How does Aetrix verify that MP18831-A4CGY-P is sourced from the original manufacturer or authorized distributors?
All MP18831-A4CGY-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP18831-A4CGY-P meets industry standards.
7.What is the process for return or replacement of MP18831-A4CGY-P?
All MP18831-A4CGY-P units undergo pre-shipment inspection (PSI). If there is an issue with MP18831-A4CGY-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP18831-A4CGY-P part is unused and in its original packaging.
Return procedure for MP18831-A4CGY-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MP18831-A4CGY-P Tags
.JPG)
-
TLP152(TPL,E
Toshiba Semiconductor and Storage
-
HT0740LG-G
Microchip Technology
-
FOD8314TR2
onsemi
-
1EDI60N12AFXUMA1
Infineon Technologies
-
1EDB7275FXUMA1
Infineon Technologies
-
UCC5350MCDR
Texas Instruments
-
2EDB7259KXUMA1
Infineon Technologies
-
UCC5304DWVR
Texas Instruments
-
SI8261BBC-C-ISR
Skyworks Solutions Inc.
-
HT0440LG-G
Microchip Technology
-
HCPL-0302-500E
Broadcom Limited
-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
