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Monolithic Power Systems Inc. MP20043DGT-A-LF-Z

Part No.:
MP20043DGT-A-LF-Z
Manufacturer:
Monolithic Power Systems Inc.
Category:
Voltage Regulators - Linear, Low Drop Out (LDO) Regulators
Package:
8-VFDFN Exposed Pad
Datasheet:
AetrixMP20043DGT-A-LF-Z.pdf
Description:
IC REG LIN POS PROG 300MA 8TQFN
Quantity:
Payment:
Payment
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Shipping

Inventory:2,189

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Product details

Overview

MP20043DGT-A-LF-Z from Monolithic Power Systems is a dual-channel, 300mA low-dropout linear regulator with programmable output voltage (1.2V–3.3V in 100mV steps, ±2.5% accuracy), 75dB PSRR at 1kHz, and 7μVRMS output noise. It uses internal PMOS pass devices, supports independent channel enable via EN1/EN2, and features output discharge on shutdown. It powers dual-rail subsystems in battery-powered wireless devices.

For engineers reviewing the MP20043DGT-A-LF-Z datasheet, MP20043DGT-A-LF-Z pinout, MP20043DGT-A-LF-Z application, or MP20043DGT-A-LF-Z equivalent, key selection criteria include programmable dual-output voltage configuration, 60mV dropout at 100mA, shutdown current <1μA, thermal protection at 140°C, and TQFN8 (2mm×2mm) package compatibility with space-constrained PCB layouts.

Technical Context

The MP20043 implements two independent LDO channels using P-channel MOSFET pass elements, enabling ultra-low dropout (60mV @ 100mA) and near-zero quiescent current in shutdown mode (0.01–1μA). Each channel's output voltage is selected by ternary logic states (High/Low/Open) applied to P1 and P2 pins, yielding nine discrete combinations per configuration set (e.g., Combination A).

It integrates per-channel current limiting (660mA short-circuit limit), thermal shutdown (140°C activation, 10°C hysteresis), and output discharge (20–100Ω resistance when disabled). The device operates from 2.5V–5.5V input and maintains 75dB PSRR up to 1kHz while delivering ≤7μVRMS integrated noise over 10Hz–30kHz.

Key Specifications

ParameterValue and Actual Design Meaning
Output Voltage Range1.2V to 3.3V in 100mV increments; ±2.5% accuracy enables precise rail generation for mixed-signal SoCs.
Max Output Current300mA per channel; sufficient for powering RF transceivers, microcontroller cores, and sensor interfaces simultaneously.
Dropout Voltage60mV @ 100mA load; allows operation with minimal VIN–VOUT margin, extending battery runtime in 3.3V/2.8V systems.
PSRR75dB @ 1kHz; suppresses switching noise from upstream DC/DC converters feeding sensitive analog circuits.
Output Noise7μVRMS (10Hz–30kHz); meets low-noise requirements for ADC references, PLL VCO supplies, and audio codecs.
Quiescent Current150μA @ no load (both channels active); minimizes standby power in always-on IoT endpoints.
Shutdown Current0.01–1μA; enables multi-week battery shelf life in portable medical monitors and remote sensors.

Pinout & Package

MP20043DGT-A-LF-Z is housed in a thermally enhanced TQFN8 package (2mm × 2mm, 0.5mm pitch) with exposed thermal pad. Pin 1 identifier is marked on top surface; recommended land pattern includes solder paste stencil for the exposed paddle to ensure optimal thermal performance.

Pin/TerminalCircuit RoleDesign Meaning
1 VINSupply InputPrimary power rail input (2.5V–5.5V); requires ≥0.47µF ceramic decoupling capacitor.
2 EN1Channel 1 EnableActive-high control (VIH ≥ 1.6V); must be tied to VIN or GND-floating prohibited.
3 P2Voltage Programming Input 2Ternary state selector (High/Low/Open) defining one of nine output voltage pairs per combination.
4 P1Voltage Programming Input 1Ternary state selector (High/Low/Open); paired with P2 to configure both VOUT1 and VOUT2 simultaneously.
5 EN2Channel 2 EnableIndependent active-high control (VIH ≥ 1.6V); enables asymmetric power sequencing.
6 GNDCommon GroundReference node for all circuitry; must connect to large copper pour for thermal dissipation.
7 VOUT2Channel 2 OutputRegulated output (1.2V–3.3V); requires 0.47–10µF ceramic capacitor with ESR <1Ω.
8 VOUT1Channel 1 OutputRegulated output (1.2V–3.3V); electrically isolated from VOUT2 but shares programming interface.

Key Features

FeatureDesign Value
Dual independent enable controlEN1/EN2 allow staggered startup/shutdown sequencing for FPGA I/O banks and core logic rails.
Programmable dual-output voltageNine factory-configurable VOUT1/VOUT2 pairs eliminate need for external resistor networks or multiple BOM variants.
Output discharge on disable20–100Ω internal discharge path prevents floating outputs during sleep mode, avoiding latch-up in downstream logic.
Thermal shutdown with hysteresis140°C trip point + 10°C hysteresis ensures safe recovery after overload without oscillation or thermal stress.
Low-noise PMOS architecture7μVRMS noise and 75dB PSRR support clean power delivery to RF front-ends and high-resolution data converters.

Applications

Cellular PhonesBattery-Powered Equipment

Use Scenario: Dual-rail power for baseband processor (1.8V) and RF transceiver (2.8V) in LTE handsets.

IC Role / Device Role / Timing Role: Primary LDO supplying regulated voltage to digital and RF subsystems with independent enable control.

Use Value: Programmable outputs eliminate discrete regulators; 60mV dropout extends talk time by maintaining regulation down to 2.88V battery voltage.

Use Scenario: Power management for handheld medical glucose meters with LCD display and Bluetooth LE radio.

IC Role / Device Role / Timing Role: Dual-channel LDO generating 3.3V for MCU and 2.5V for analog sensor interface with zero-load quiescent current.

Use Value: 150μA no-load IQ and <1μA shutdown current enable >6-month battery life on CR2032 coin cell.

Laptop SubsystemsWireless LAN Modules

Use Scenario: Standby power rail for embedded controller (EC) and touchpad ASIC in ultrabook platforms.

IC Role / Device Role / Timing Role: Always-on LDO providing 1.2V EC core and 3.3V I/O supply with independent EN control for firmware-initiated power gating.

Use Value: Output discharge prevents floating I/O lines during suspend-to-RAM, eliminating spurious wake events.

Use Scenario: Clean power for 2.4GHz Wi-Fi 5/6 transceiver IC requiring low-noise 1.8V and 3.3V rails.

IC Role / Device Role / Timing Role: Low-noise dual LDO suppressing switching noise from main system DC/DC converter.

Use Value: 75dB PSRR at 1kHz and 7μVRMS noise reduce EVM degradation and improve receiver sensitivity by ≥2dB.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel programmable LDO applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
Torex XC6216D182MR-GSingle-channel, fixed 1.8V output; no programmability or dual-rail capability.Lacks independent enable, output discharge, and voltage flexibility-requires two devices for dual-rail use.Select only if fixed 1.8V/1.8V rails suffice and board area permits dual ICs.
Ricoh RP111Q281D-TR-FSingle-channel, 2.8V fixed output; 250mA max current; no P1/P2 programming interface.No dual output or voltage configurability; limited to single-rail applications with lower current demand.Choose only for cost-sensitive single-rail designs where 2.8V is mandatory and 300mA headroom is unnecessary.

Compared with XC6216D182MR-G and RP111Q281D-TR-F, MP20043DGT-A-LF-Z uniquely delivers dual independently enabled, programmable outputs in one TQFN8 package-reducing BOM count, PCB area, and design complexity for multi-rail battery-powered systems.

Availability

MP20043DGT-A-LF-Z is available at Aetrix Electronics and suitable for cellular phones, battery-powered equipment, laptop subsystems, and wireless LAN modules requiring stable component supply across industrial temperature ranges (–40°C to +85°C).

Supply support for MP20043DGT-A-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP20043 belongs to MPS's precision dual-LDO product line, engineered specifically for space-constrained, battery-operated devices demanding programmable dual-rail power with ultra-low noise and shutdown current.

FAQ

What are the valid logic states for P1 and P2 pins, and how do they affect output voltage?

P1 and P2 each accept three states: High (≥1.6V), Low (≤0.4V), or Open (high-impedance). Their combined states select one of nine pre-defined VOUT1/VOUT2 pairs per configuration set (e.g., Combination A). For example, P1=Open and P2=Open yields VOUT1=2.8V and VOUT2=3.3V. Bias currents are specified: High-state draw ≤5µA, Low-state sink ≤8µA, Open-state leakage <0.7V offset.

Does MP20043DGT-A-LF-Z require external capacitors, and what are the minimum values?

Yes: a minimum 0.47µF ceramic input capacitor (X5R/X7R) is required at VIN, and each output requires 0.47–10µF ceramic capacitors with ESR <1Ω. Larger values improve transient response and noise suppression but increase footprint. Tantalum capacitors are acceptable but less stable than ceramics under bias and temperature.

How does the output discharge function operate during shutdown?

When EN1 or EN2 is driven low, the corresponding output connects internally to GND through a 20–100Ω switch, actively discharging external capacitance. This prevents floating outputs that could cause undefined logic states or parasitic power paths in downstream circuitry, critical for reliable sleep/wake transitions.

What thermal derating applies when operating at maximum ambient temperature?

At TA = +85°C, maximum continuous power dissipation is reduced to PD(MAX) = (125°C − 85°C)/80°C/W = 0.5W. With θJA = 80°C/W (4-layer board), sustained 300mA loads require VIN−VOUT ≤ 1.67V to stay within thermal limits. Use the exposed thermal pad and ground plane to maintain junction temperature ≤125°C.

Can MP20043DGT-A-LF-Z be used with input voltages below 2.5V?

No: the absolute minimum input voltage is 2.5V per datasheet specifications. Operation below this violates recommended conditions and may result in unregulated output, increased dropout, or failure to maintain specified accuracy and PSRR. For sub-2.5V inputs, consider alternative LDOs rated for lower VIN minima.

Is the MP20043DGT-A-LF-Z RoHS-compliant and halogen-free?

Yes: the part carries the "-LF" suffix indicating lead-free, halogen-free construction and full compliance with EU RoHS Directive 2011/65/EU. All MPS products meet these environmental standards, and green status documentation is available on the MPS Quality Assurance webpage.

MP20043DGT-A-LF-Z Specifications

Product attributes
Attribute value
Manufacturer:
Monolithic Power Systems Inc.
Series:
-
Package/Case:
8-VFDFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Not For New Designs
Output Configuration:
Positive
Output Type:
Programmable
Number of Regulators:
2
Voltage - Input (Max):
5.5V
Voltage - Output (Min/Fixed):
1.5V, 2.8V
Voltage - Output (Max):
2.8V, 3.3V
Voltage Dropout (Max):
0.28V @ 300mA, 0.28V @ 300mA
Current - Output:
300mA, 300mA
Current - Quiescent (Iq):
90 µA
Current - Supply (Max):
150 µA
PSRR:
75dB (100Hz ~ 1kHz)
Control Features:
Enable
Protection Features:
Over Current, Over Temperature, Short Circuit
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
8-TQFN (2x2)

MP20043DGT-A-LF-Z FAQ

1.How can I place an order for MP20043DGT-A-LF-Z through Aetrix?

Please submit a Request for Quotation (RFQ) for MP20043DGT-A-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MP20043DGT-A-LF-Z reliable?

The price and inventory of MP20043DGT-A-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP20043DGT-A-LF-Z is usually 5 days.

3.What payment methods are accepted for MP20043DGT-A-LF-Z?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP20043DGT-A-LF-Z transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MP20043DGT-A-LF-Z?

MP20043DGT-A-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MP20043DGT-A-LF-Z order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MP20043DGT-A-LF-Z?

For technical support, including MP20043DGT-A-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP20043DGT-A-LF-Z requirements.

6.How does Aetrix verify that MP20043DGT-A-LF-Z is sourced from the original manufacturer or authorized distributors?

All MP20043DGT-A-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP20043DGT-A-LF-Z meets industry standards.

7.What is the process for return or replacement of MP20043DGT-A-LF-Z?

All MP20043DGT-A-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP20043DGT-A-LF-Z, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MP20043DGT-A-LF-Z part is unused and in its original packaging.

Return procedure for MP20043DGT-A-LF-Z:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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